TI SN74LVCZ245ADB

SN74LVCZ245A
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES275B – JUNE 1999 – REVISED JANUARY 2000
D
D
D
D
D
D
D
EPIC  (Enhanced-Performance Implanted
CMOS) Submicron Process
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot) >2 V
at VCC = 3.3 V, TA = 25°C
Ioff and Power-Up 3-State Support Hot
Insertion
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V VCC)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Package Options Include Shrink
Small-Outline (DB), Plastic Thin Very
Small-Outline (DGV), Small-Outline (DW),
and Thin Shrink Small-Outline (PW)
Packages
DB, DGV, DW, OR PW PACKAGE
(TOP VIEW)
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
description
This octal bus transceiver is designed for 2.7-V to 3.6-V VCC operation.
The SN74LVCZ245A is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are
effectively isolated.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
The SN74LVCZ245A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright  2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74LVCZ245A
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES275B – JUNE 1999 – REVISED JANUARY 2000
logic symbol†
19
OE
1
DIR
2
A1
G3
3 EN1 [BA]
3 EN2 [AB]
18
1
B1
2
A2
A3
A4
A5
A6
A7
A8
3
17
4
16
5
15
6
14
7
13
8
12
9
11
B2
B3
B4
B5
B6
B7
B8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
DIR
1
19
A1
2
18
To Seven Other Channels
2
OE
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• DALLAS, TEXAS 75265
B1
SN74LVCZ245A
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES275B – JUNE 1999 – REVISED JANUARY 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V
Input voltage range, VI: (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, VO
(see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of VCC is provided in the recommended operating conditions table.
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 4)
MIN
MAX
2.7
3.6
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
VO
Output voltage
IOH
High level output current
High-level
VCC = 2.7 V
VCC = 3 V
–12
IOL
Low level output current
Low-level
VCC = 2.7 V
VCC = 3 V
12
∆t/∆v
Input transition rise or fall rate
∆t/∆VCC
TA
Power-up ramp rate
High-level input voltage
VCC = 2.7 V to 3.6 V
VCC = 2.7 V to 3.6 V
2
UNIT
V
V
0.8
V
0
5.5
V
High or low state
0
3-state
0
VCC
5.5
V
Input voltage
Operating free-air temperature
–24
24
–40
mA
mA
6
ns/V
150
µs/V
85
°C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN74LVCZ245A
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES275B – JUNE 1999 – REVISED JANUARY 2000
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
2.7 V to 3.6 V
IOH = –100 µA
VOH
2.7 V
IOH = –12
12 mA
IOH = –24 mA
IOL = 100 µA
VOL
II
Ioff
Control inputs
MIN
TYP†
MAX
VCC–0.2
2.2
3V
2.4
3V
2.2
UNIT
V
2.7 V to 3.6 V
0.2
IOL = 12 mA
IOL = 24 mA
2.7 V
0.4
3V
0.55
VI = 0 to 5.5 V
VI or VO = 5.5 V
3.6 V
±5
µA
0
±5
µA
V
IOZ‡
VO = 0 to 5.5 V
3.6 V
±5
µA
IOZPU
VO = 0.5 V to 2.5 V,
OE = don’t care
0 to 1.5 V
±5
µA
IOZPD
VO = 0.5 V to 2.5 V,
OE = don’t care
1.5 V to 0
±5
µA
ICC
VI = VCC or GND
3.6 V ≤ VI ≤ 5.5 V§
IO = 0
∆ICC
Ci
Control inputs
Cio
A or B ports
100
36V
3.6
One input at VCC – 0.6 V, Other inputs at VCC or GND
100
2.7 V to 3.6 V
VI = VCC or GND
VO = VCC or GND
100
µA
µA
3.3 V
4
pF
3.3 V
6
pF
† All typical values are at VCC = 3.3 V, TA = 25°C.
‡ For I/O ports, the parameter IOZ includes the input leakage current.
§ This applies in the disabled state only.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tpd
A or B
ten
tdis
PARAMETER
VCC = 2.7 V
MIN
VCC = 3.3 V
± 0.3 V
UNIT
MAX
MIN
MAX
B or A
7.3
1.5
6.3
ns
OE
A or B
9.5
1.5
8.5
ns
OE
A or B
8.5
1.7
7.5
ns
operating characteristics, TA = 25°C
TEST
CONDITIONS
PARAMETER
Cpd
4
Outputs enabled
Power dissipation capacitance per transceiver
POST OFFICE BOX 655303
Outputs disabled
• DALLAS, TEXAS 75265
VCC = 3.3 V
TYP
UNIT
42
f = 10 MHz
3
pF
SN74LVCZ245A
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES275B – JUNE 1999 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
VCC = 2.7 V AND 3.3 V ± 0.3 V
2 × VCC
S1
500 Ω
From Output
Under Test
GND
CL = 30 pF
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCC
GND
Open
500 Ω
tw
LOAD CIRCUIT
VCC
VCC
Timing
Input
VCC/2
Input
VCC/2
0V
VCC/2
0V
tsu
VOLTAGE WAVEFORMS
PULSE DURATION
th
VCC
Data
Input
VCC/2
VCC/2
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VCC
Output
Control
(low-level
enabling)
VCC/2
VCC/2
0V
tPLZ
tPZL
VCC
Input
VCC/2
VCC/2
0V
tPLH
VCC/2
VCC
VCC/2
VOL + 0.3 V
VOL
tPHZ
tPZH
tPHL
VOH
Output
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
VCC/2
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
Output
Waveform 2
S1 at GND
(see Note B)
VCC/2
VOH
VOH – 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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• DALLAS, TEXAS 75265
5
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