TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 D D D D D D Li-Ion Battery Charging Control Over-Voltage Shutdown Seven Low-Dropout Low-Noise Linear Voltage Regulators (LDO) Voltage Detectors (With Power-Off Delay) Four-Channel Analog Multiplexer D D D D Three General-Purpose Operational Amplifiers Ringer Driver Power Supply Switch for Accessories Low Quiescent Current 48-pin TQFP VEXT IADJ VG1 ICH+ VOUT7 ICHENOP_MUX TCOUT VB CH VG2 GNDRING PFB PACKAGE (TOP VIEW) 48 47 46 45 44 43 42 41 40 39 38 37 VREF MUXOUT MUXIN0 MUX0 MUX1 MUXIN1 MUXIN2 MUXIN3 OP1I– OP1I+ OP2I– OP2I+ 1 36 2 35 3 34 4 33 5 32 6 31 7 30 8 29 9 28 10 27 11 26 25 12 RINGON RING VOUT6 DET_DELAY VOUT2 VCC VSUP VOUT4 VOUT5 VOUT3 VOUT1 EN3 OP3I+ OP3I– OP1O OP2O OP3O GND DET2 VCH DET1 EN4 EN1 EN2 13 14 15 16 17 18 19 20 21 22 23 24 description The TWL2203 incorporates a complete power-management system for a cellular telephone that uses lithium-ion cells. The device includes circuitry to control the gate voltage of two P-channel MOSFETs. The MOSFETs perform constant-voltage/constant-current charging (CVCC). The TWL2203 has seven low-drop linear voltage regulators (LDO) to regulate the battery power supply to the different sections of the phone, a battery voltage monitor, a ringer driver, an analog multiplexer, and three general-purpose operational amplifiers for signal conditioning. The TWL2203 is packaged in TI’s 48-pin thin-quad flat package (PFB). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. MicroStar is a trademark of Texas Instruments Incorporated. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 AVAILABLE OPTIONS PACKAGE TA PLASTIC THIN-QUAD FLAT PACKAGE (PFB) – 30°C to 85°C TWL2203PFB functional block diagram VG1 VCH ICH- IADJ ICH+ VG2 CVCC Charge Switch Control 4.2 V Regulation TCOUT Trickle Charge Current Control VB Current Limit Control OverVoltage Shutdown VEXT CH VOUT2 VREF VREF LDO REG 7 VOUT7 VDET1 DET1 VDET2 DET2 EN4 VCC EN3 EN2 EN1 DET_DELAY Power Switch VSUP LDO REG 1 VOUT1 RINGON LDO REG 2 VOUT2 MUXOUT LDO REG 3 VOUT3 LDO REG 4 VOUT4 LDO REG 5 VOUT5 LDO REG 6 VOUT6 M U X 2 POST OFFICE BOX 655303 OP3O + _ OP2O OP12+ OP13– OP12+ OP12– + _ OP1O + _ ENOP_MUX MUXIN0 MUXIN1 MUXIN2 MUXIN3 MUX0 MUX1 Ringer Drive OP1I+ OP1I– RING • DALLAS, TEXAS 75265 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION QFB CH 39 I DET_DELAY 33 I/O CMOS signal input set to logic high to enable battery-charging function Delay programming pin for VDET2 DET1 21 O Voltage detector CMOS output DET2 19 O Voltage detector output with 40-kΩ pull–up resistor EN1 23 I Set to logic high to enable LDO regulators 1–4 and power supply switch EN2 24 I Set to logic high to enable LDO regulator 5 EN3 25 I Set to logic high to enable LDO regulator 6 EN4 22 I Set to logic high to enable LDO regulator 7 ENOP_MUX 42 I Set to logic high to enable the op amps and the analog multiplexer GND 18 GNDRING 37 IADJ 47 I/O ICH– 43 I Current-sense input/trickle charge, input/power supply to LDO regulator 7, and reference. ICH+ 45 I Current-sense input MUX0 4 I Analog multiplexer channel selector bit-input (logic high is true) MUX1 5 I Analog multiplexer channel selector bit-input (logic high is true) MUXIN0 3 I Analog multiplexer input 0 MUXIN1 6 I Analog multiplexer input 1 MUXIN2 7 I Analog multiplexer input 2 MUXIN3 8 I Analog multiplexer input 3 MUXOUT 2 O Analog multiplexer output OP1I– 9 I Op amp 1 negative input OP1I+ 10 I Op amp 1 positive input OP1O 15 O Op amp 1 output OP2I– 11 I Op amp 2 negative input OP2I+ 12 I Op amp 2 positive input OP2O 16 O Op amp 2 output OP3I– 14 I Op amp 3 negative input OP3I+ 13 I Op amp 3 positive input OP3O 17 O Op amp 3 output RING 35 I Ringer drive input RINGON 36 I Ringer enable (logic high to enable) TCOUT 41 O Trickle-charge output VB VCC 40 I Battery voltage input for charging control VCH 20 VEXT VG1 Ground for most sections of the device Ringer ground 31 Terminal for gain control of battery-charging current monitor Power supply to most of the device I External power supply input for voltage detection 48 I External voltage input 46 O MOSFET M1 gate drive VG2 38 O MOSFET M2 gate drive VOUT1 26 O LDO REG 1 output 1 VOUT2 32 O LDO REG 2 output 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 Terminal Functions (Continued) TERMINAL NAME NO. I/O DESCRIPTION QFB VOUT3 27 O LDO REG 3 output 3 VOUT4 29 O LDO REG 4 output 4 VOUT5 28 O LDO REG 5 output 5 VOUT6 34 O LDO REG 6 output 6 VOUT7 44 O LDO REG 7 output 7 VREF 1 O Voltage-reference bypass output VSUP 30 O Power-supply switch output detailed description battery-charging control The battery charging control block in the device is a part of the lithium-ion battery (Li-Ion) charging system of the phone. It is capable of regulating the external power source to charge the lithium-ion battery according to the battery-charging requirements. More information on battery-charging control is presented in the application information section. The MOSFET driver and its feedback-control circuit are enabled/disabled by a CMOS control signal provided by the phone’s microprocessor. The maximum-charging current is set by external resistors for design flexibility. overvoltage shutdown The device shuts down the charging circuit in the presence of an overvoltage condition. low-dropout linear voltage regulators The device has seven separate low-dropout linear-voltage regulators. A single enable signal controls four of the regulators. The last three regulators are controlled by their own enable signals. voltage detectors (with power-off delay) The device has two voltage detectors. The voltage detectors monitor the voltage level of the external power and VCC. The external power detector (VDET1) has a CMOS output. The VCC detector (VDET2) activates on the falling edge and has user-adjustable power-off delay. There is an internal pullup resistor on the output. analog multiplexer The device has a four-channel analog multiplexer with two-bit channel-selector signal input and a shutdown function. In the shutdown mode, all the input and output terminals are in the high-impedance state. operational amplifiers The device has three rail-to-rail operational amplifiers with common shutdown control. power supply switch for external phone accessories The device provides current-limited voltage supply to the external phone accessories via the external-interface connector. The power supply switch is controlled by the same enable signal (EN1) that controls the four regulators—LDO1-LDO4. The external phone accessories are resistive in nature. ringer driver The device is capable of driving a ringer. It is controlled by a CMOS signal, and uses an N-channel low-side driver. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 DISSIPATION-RATING TABLE – FREE-AIR TEMPERATURE PACKAGE TA <25°C POWER RATING OPERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING PFB 1962 mW 15.7 mW/°C 1256 mW 1020 mW absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply-voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6.5 V External-voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 15 V Output-voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6.5 V Input-voltage range, all other pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6.5 V Continuous total-power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation-Rating Table Free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30°C to 85°C Storage-temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions PARAMETER TEST CONDITIONS Supply voltage, voltage VCC MIN TYP MAX In regulation 2.85 3.75 4.25 In transient condition 2.85 Allowable range VEXT Normal charging operation 6 0 5.5 12 4.6 5.5 6 VCH 2.1 High-level logic input, VIH 2.1 6 UNIT V V V V Low-level logic input, VIL 0.9 V electrical characteristics over recommended operating junction temperature range, VCC = 3.75 V and VEXT = 5.5 V (unless otherwise specified) current table, TA = –40°C to 85°C PARAMETER TYP MAX Shutdown current EN1 = EN2 = EN3 = EN4 = ENOP_MUX = VCH = CH = RINGON = VEXT = GND TEST CONDITIONS 50 90 Quiescent current LDOreg. 1–4, power-switch quiescent current EN1 = VOUT2, EN2 = EN3 = EN4 = ENOP_MUX = VCH = CH = RINGON = VEXT = GND 210 350 Quiescent current LDOreg. 1–5, power-switch quiescent current EN1 = EN2 = VOUT2, EN3 = EN4 = ENOP_MUX = VCH = CH = RINGON = VEXT = GND 240 400 Quiescent current LDOreg. 1–6, power-switch quiescent current EN1 = EN2 = EN3 = VOUT2, EN4 = ENOP_MUX = VCH = CH = RINGON = VEXT = GND 270 450 Quiescent current LDOreg. 1–7, power-switch quiescent current EN1 = EN2 = EN3 = EN4 = VOUT2, ENOP_MUX = VCH = CH = RINGON = VEXT = GND 300 500 Quiescent current LDOreg. 1–7, Power-switch, MUX, op amp quiescent current EN1 = EN2 = EN3 = EN4 = ENOP_MUX = VOUT2, VCH = CH = RINGON = VEXT = GND 470 800 Quiescent current LDOreg. 1–4, Power-switch, MUX, op amp quiescent current EN1 = ENOP_MUX = VOUT2, EN2 = EN3 = EN4 = RINGON = VCH = CH = VEXT = GND 370 700 LDOreg. 1–7, Power-switch, MUX, op amp, charger quiescent current VCH = 4.8 V, EN1 = EN2 = EN3 = EN4 = ENOP_MUX = CH = VOUT2, RINGON = GND 2.5 4.0 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN UNIT µA mA 5 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 battery charging control, TA = 0°C to 50°C PARAMETER Vtc Ipc TEST CONDITIONS Constant voltage VB Charge current = 50 mA, EN1 = CH = VOUT2, EN2 = EN3 = EN4 = ENOP_MUX = GND, VEXT = 5 – 6 V Voltage drop across sense resistor ICH+ – ICH– CH = VCC Precharge current (VR6 threshold) TCOUT – VB, VB<Vtc Precharge threshold VB = 3.5 V, TCIN = 4.15 V, R6 =2 Ω, Current limit control is disabled Precharge capability MIN TYP MAX UNIT 4.15 4.20 4.25 V 85 100 115 mV 75 125 175 mV 3.30 3.40 3.50 V 50 mA over-voltage shutdown, TA = 0°C to 50°C MIN TYP MAX Vchco Over-voltage cutoff point for VCH PARAMETER 4.7 5.4 6 V Vgco Over-voltage cutoff point for VEXT 6.5 7.5 8.5 V 6 TEST CONDITIONS POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 electrical characteristics over recommended operating junction temperature range, VCC = 3.75 V and VEXT = 5.5 V (unless otherwise specified) (continued) LDO regulator 1 (LCD Module), TA = –20°C to 85°C PARAMETER TEST CONDITIONS Output voltage VOUT1 IOUT1 = 0.5 mA to 3 mA, Dropout voltage IOUT1 = 1 mA VCC = 3.3 V to 4.2 V, EN1 = 3 V Maximum current VOUT1 = 2.85 V Current limit VCC = 3.75 V, VOUT1 shorted to GND Ripple rejection f = 400 Hz, IOUT1 = 1 mA MIN TYP MAX 2.95 3 3.05 V 100 mV 5 UNIT mA 7.5 mA 50 dB LDO regulator 2 (Digital), TA = –30°C to 85°C PARAMETER TEST CONDITIONS Output voltage VOUT2 IOUT2 = 5 mA to 150 mA, VCC = 3.3 V to 4.2 V, EN1 = 3 V Dropout voltage IOUT2 = 80 mA Maximum current VOUT2 = 2.85 V Current limit VCC = 3.75 V, VOUT2 shorted to GND Ripple rejection f = 400 Hz, IOUT2 = 100 mA MIN TYP MAX UNIT 2.825 3 3.175 V 250 mV 200 mA 300 mA 50 dB LDO regulator 3 (TCX0), TA = –30°C to 85°C PARAMETER TEST CONDITIONS Output voltage VOUT3 IOUT3 = 1 mA to 3 mA, Dropout voltage IOUT3 = 3 mA VCC = 3.3 V to 4.2 V, EN1 = 3 V Maximum current VCC = 3.75 V, VOUT3 shorted to GND VOUT3 = 2.85 V Current limit Ripple rejection f = 400 Hz, IOUT3 = 3 mA MIN TYP MAX 2.825 3 3.175 100 5 UNIT V mV mA 7.5 mA 60 dB LDO regulator 4 (Audio), TA = –30°C to 85°C PARAMETER TEST CONDITIONS Output voltage VOUT4 IOUT4 = 5 mA to 40 mA, Dropout voltage IOUT4 = 40 mA Maximum current VOUT4 = 2.85 V Current limit VCC = 3.75 V, VOUT4 shorted to GND Ripple rejection f = 400 Hz, IOUT4 = 30 mA POST OFFICE BOX 655303 VCC = 3.3 V to 4.2 V, EN1 = 3 V MIN TYP MAX UNIT 2.825 3 3.175 V 250 75 mA 112 • DALLAS, TEXAS 75265 mV mA 60 dB 7 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 electrical characteristics over recommended operating junction temperature range, VCC = 3.75 V and VEXT = 5.5 V (unless otherwise specified) (continued) LDO regulator 5 (RX), TA = –30°C to 85°C PARAMETER Output voltage VOUT5 Dropout voltage Maximum current TEST CONDITIONS IOUT5 = 10 mA to 30 mA, VCC = 3.3 V to 4.2 V, EN1 = 3 V IOUT5 = 20 mA VOUT5 = 2.85 V Current limit VCC = 3.75 V, VOUT5 shorted to GND Ripple rejection f = 400 Hz, IOUT5 = 20 mA MIN TYP MAX 2.825 3 3.175 250 40 UNIT V mV mA 60 mA 60 dB LDO regulator 6 (TX), TA = –30°C to 85°C PARAMETER Output voltage VOUT6 Dropout voltage Maximum current TEST CONDITIONS IOUT6 = 30 mA to 70 mA, VCC = 3.3 V to 4.2 V, EN1 = 3 V IOUT6 = 50 mA VOUT6 = 2.85 V Current limit VCC = 3.75 V, VOUT6 shorted to GND Ripple rejection f = 400 Hz, IOUT6 = 50 mA MIN TYP MAX UNIT 2.825 3 3.175 V 250 mV 70 mA 105 mA 60 dB LDO regulator 7 (PLL), TA = –30°C to 85°C PARAMETER Output voltage VOUT7 Dropout voltage Maximum current TEST CONDITIONS IOUT7 = 10 mA to 25 mA, VCC = 3.3 V to 4.2 V, EN1 = 3 V IOUT7 = 20 mA VCC = 3.75 V, VOUT7 shorted to GND VOUT7 = 2.85 V Current limit Ripple rejection f = 400 Hz, IOUT7 = 20 mA Output noise voltage (RMS) † With external filtering MIN TYP MAX 2.825 3 3.175 250 30 UNIT V mV mA 45 mA 60 BW = 300 Hz – 50 kHz dB 100‡ µV VDET1, TA = 25°C PARAMETER VCH TEST CONDITIONS Threshold voltage of CH Hysteresis voltage of CH MIN TYP MAX UNIT 2.85 3 3.15 V 100 mV VODET1 Output voltage VCH > THRESHOLDV 0 0.3 V VODET2 Output voltage VCH < THRESHOLDV VOUT2 0.3 V TCDET1 Temp. coefficient of VODET1 8 ±100 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ppm/°C TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 electrical characteristics over recommended operating junction temperature range, VCC = 3.75 V and VEXT = 5.5 V (unless otherwise specified) (continued) VDET2, TA = 25°C PARAMETER TEST CONDITIONS Threshold voltage of VCC MIN 2.85 Hysteresis voltage of VCC TYP MAX 3 3.15 100 VODET1 Output voltage VCH > THRESHOLDV 0 VODET2 Output voltage VCH < THRESHOLDV VOUT2 TCDET2 Temperature coefficient of VDET2 TDELAY2 Delay of VDET2 35 V mV 0.3 V V ±100 Cdet_delay = 0.1 µF UNIT ppm/°C 50 75 ms MIN TYP MAX 3.45 3.60 3.75 V 300 mV 200 mA power switch, TA = 25°C PARAMETER VSUP Output voltage VON IMAX On voltage IMIN Minimum current TEST CONDITIONS ISUP = 0 mA – 50 mA, VCC = 3.75 V VCC = 3.3 V – 5 V, ISUP = 30 mA Maximum current VCC = 3.75 V VCC = 3.75 V, ,VSUP = 0 V VSUP = 3.45 V 70 UNIT mA analog multiplexer, TA = –30°C to 85°C PARAMETER FMAX TEST CONDITIONS MIN TYP MAX UNIT Sine-wave distortion 1 kHz, 1 Vpp, 1.5 VDC offset 0.1% Frequency response (switch on) –3 dB gain Feed-through attenuation (switch off) f = 250 kHz –40 dB Crosstalk (control input to signal output) Tr = Tf = 50 ns 100 mV Crosstalk (between switches) f = 250 kHz –50 dB 1200 Ω 1 MHz DC CHARACTERISTICS RON On resistance ∆RON Difference of ON resistance between switches 700 IOFF IZ Input/output leakage current ±400 Switch input leakage current ±400 nA IIN Iq Control-input current ±1 µA Quiescent current 10 µA Ω 10 nA AC CHARACTERISTICS Phase difference between input and output 50 ns Output enable time tpzl, tpzh 1 kHz (spec is flexible, dependent on the design) 100 ns Output disable time tplz, tphz 150 ns CIN Control input capacitance 10 pF CIOS Input terminal capacitance All pins 15 pF CIS Output terminal capacitance 50 pF CIOS Feed-through capacitance 2 pF POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 electrical characteristics over recommended operating junction temperature range, VCC = 3.75 V and VEXT = 5.5 V (unless otherwise specified) (continued) operational amplifiers, TA = –30°C to 85°C PARAMETER TEST CONDITIONS MIN MAX UNIT VOS IOPB Input offset voltage 2 10 Input bias current 50 250 na IOPOS RIN Input offset current 5 50 nA Input resistance DC resistance CMMR Common-mode rejection ratio f = 400 Hz, Vcm = 1.5 V VCM Input common voltage PSRR Power-supply rejection ratio f = 400 Hz, Vcm = 1.5 V CIN Common-mode input capacitance 65 Output high, IO = 2.5 mA (source) Output low, IO = –2.5 mA (sink) IO THD Output current DC Current Total harmonic distortion f = 1 kHz, SR GBW 20 dB closed-loop gain, 60 2.9 MΩ 75 dB 2.9 V 70 dB 3 pF 2.95 0.1 IO = 0.5 mA mV 100 0.1 Output swing, low VO Output swing, high Vcm = 1.5 V TYP V 0.15 V ±2.5 mA Slew rate 1% 0.3† V/µs Gain bandwidth product 300 kHz ringer driver, TA = –30°C to 85°C PARAMETER TEST CONDITIONS MIN TYP RINGON = VCC, IOUTRING = 100 mA, TA = 25°C MAX UNIT RON On resistance 3 Ω TONRING Turnon time 10 µs TOFFRING Turnoff time 10 µs internal power supply PARAMETER VINTERNAL Output voltage TEST CONDITIONS ILOAD = 7.5 mA MIN TYP MAX 3.1 3.25 3.4 UNIT V bandgap reference PARAMETER TEST CONDITIONS Output voltage Output noise voltage (RMS) REFVALID MIN TYP MAX 1.1812 1.192 1.2028 BW = 300 Hz – 50 kHz 800 Reference valid UNIT V nV/Hz µA 5 thermal shutdown PARAMETER TEST CONDITIONS Trip point TYP 160 Hysteresis temperature 10 MIN 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MAX UNIT 190 °C °C TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 THERMAL INFORMATION The implementation of integrated circuits in low-profile and fine-pitch surface-mount packages requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the powerdissipation limits of a given component. Three basic approaches for enhancing thermal performance are listed below. D D D Improving the power dissipation capability of the printed-circuit board design Improving the thermal coupling of the component to the printed-circuit board Introducing airflow into the system Using the given RθJA for this device, the maximum power dissipation can be calculated with the equation: P D(MAX) + T J(MAX) * TA R qJA APPLICATION INFORMATION capacitor selection The output bypass capacitor of each LDO regulator should be selected from the list of ceramic capacitors shown below. The VCC bypass capacitors should be selected from the list of tantalum capacitors shown below. Tantalum capacitors have good temperature stability and offer good capacitance for their size. Care should be taken when using marginal quality tantalum capacitors, as the increase of the equivalent series resistance (ESR) at low temperatures can cause instability. For a given capacitance, ceramic capacitors are usually larger and more costly than tantalums. The capacitance of ceramic capacitors varies greatly with temperature. In addition, the ESR of ceramic capacitors can be low enough to cause instability. A low-value resistor can be added in series with the ceramic capacitor to provide a minimum ESR. ceramic (X7R or X5R) CAPACITANCE CASE SIZE ESR (MAX) 1 µF 0805 3.8 mΩ 2.2 µF 0805 4.5 mΩ 3.3 µF 0805 4.1 mΩ 2.2 µF 1206 3.4 mΩ 4.7 µF 1206 1.9 mΩ CAPACITANCE CASE SIZE ESR (MAX) 4.7 µF A(3216) 6Ω 6.8 µF A(3216) 6Ω 10 µF A(3216) 4Ω 10 µF P(0805) 6Ω tantalum (6.3 V rating) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 APPLICATION INFORMATION recommended parts list REFERENCE DESCRIPTION MANUFACTURER VALUE C1 Ceramic, 0805, X7R 100 pF C2 Ceramic, 0805, X7R 0.01 µF C3 Tantalum, 6.3 V, Case B, 20% C4 Ceramic, 0805 C5 Tantalum, 6.3 V, Case B, 20% Cldo1 Ceramic, 0805, X7R Cldo2 Ceramic, 10 V, 1206, X5R, 20% Cldo3 Ceramic, 0805, X7R Cldo4 Ceramic, 10 V, 1206, X5R, 20% Taiyo Yuden 3.3 µF LMK316BJ335ML Cldo5 Ceramic, 16 V, 0805, X5R, 20% Taiyo Yuden 2.2 µF LMK212BJ225MG Cldo6 Ceramic, 10 V, 1206, X5R, 20% Taiyo Yuden 4.7 µF LMK316BJ475ML Cldo7 Ceramic, 16 V, 0805, X5R, 20% Taiyo Yuden 2.2 µF LMK212BJ225MG Cvref Ceramic, 0805, X7R Cdet_delay Ceramic, 0805, X7R D1 Schottky diode Siemens Matsushita 10 µF B 45 196-E1106-M20 0.01 µF Siemens Matsushita 10 µF B 45 196-E1106-M20 0.22 µF Taiyo Yuden 4.7 µF LMK316BJ475ML 0.22 µF 1000 pF 0.1 µF Rohm RB051L-40 1 µH L1 M1 M2 Siliconix Si3455DV Fairchild FDC654P Siliconix Si3441DV Siliconix Si3443DV Siliconix Si2305DS Fairchild 12 PART NUMBER FDC634P R1 1/4 W, 5% 0.1 Ω R2 0805, 1/10 W, 5% 10 kΩ R3 0805, 1/10 W, 5% 1 kΩ R4 0805, 1/10 W, 5% 560 Ω R5 0805, 1/10 W, 5% 6.8 kΩ R6 0805, 1/10 W, 5% 2.7 Ω R7 0805, 1/10 W, 5% 10 kΩ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 APPLICATION INFORMATION battery charging control D1 M1 R1 M2 VEXT R7 + R4 C2 R5 R2 VG1 C3 VCH C1 Lithium Ion Battery – R6 ICH- IADJ ICH+ VG2 TCOUT L1 CVCC Charge Switch Control 4.2 V Regulation Trickle Charge Current Control VB Current Limit Control OverVoltage Shutdown VEXT CH VREF VOUT2 VREF Cvref VDET1 DET1 LDO REG 7 VOUT7 Cldo7 EN4 VDET2 DET2 DET_DELAY EN3 EN2 EN1 Power Switch Cdet_Delay LDO REG 1 RING Ringer Drive RINGON LDO REG 2 LDO REG 3 MUXOUT C4 C5 VSUP VOUT1 Cldo1 VOUT2 Cldo2 VOUT3 Cldo3 M U X LDO REG 4 VOUT4 Cldo4 + _ + _ LDO REG 5 + _ LDO REG 6 VOUT5 Cldo5 VOUT6 POST OFFICE BOX 655303 OP3O OP2O OP12+ OP13– OP12+ OP12– OP1O OP1I+ OP1I– Cldo6 ENOP_MUX MUXIN0 MUXIN1 MUXIN2 MUXIN3 MUX0 MUX1 • DALLAS, TEXAS 75265 13 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 APPLICATION INFORMATION battery-charging control (continued) The battery-charging control block in the device is a part of the Li-Ion battery charging system of the phone. The device controls the P-channel MOSFET to accomplish constant-voltage/constant-current charging (CVCC) within a ±1% tolerance in the charging termination voltage. The battery charging control consists of the two sections: D D CVCC charge-switch control with feedback loops for voltage and current control Trickle charge-current control When the voltage-detector output (DET1) is set high, the voltage-control loop is activated to regulate the voltage of ICH- to 4.2 V. Then, when the control signal input CH is set high, either the current-control loop or the trickle-charge control block is activated, depending upon battery voltage. When VB is below the threshold Vtc, the trickle-charge current control block directs the current to the battery via TCIN, trickle-charging current control, TCOUT, R6, and the battery. The measure of the voltage across sense resistor R6 is used for feedback-control of the rate of charging current. Once the battery voltage reaches the threshold Vtc, the CVCC charge-switch control block becomes active and controls the P-channel MOSFET M1. The feedback control ensures that the voltage ICH- does not exceed 4.2 V ± 0.05 V (4.2 V regulation), and the current draw of resistor R1 does not exceed the specified value (current-limit control). In this case, the charging current drains via R1, M2, and the battery. The maximum charging current is set by external resistors for design flexibility. analog multiplexer output table 14 MUX1 MUX2 OUTPUT 0 0 MUXIN0 0 1 MUXIN1 1 0 MUXIN2 1 1 MUXIN3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TWL2203 POWER SUPPLY MANAGEMENT IC SLVS185 – FEBRUARY 2000 MECHANICAL DATA PFB (S-PQFP-G48) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 36 0,08 M 25 37 24 48 13 0,13 NOM 1 12 5,50 TYP 7,20 SQ 6,80 9,20 SQ 8,80 Gage Plane 0,25 0,05 MIN 0°– 7° 1,05 0,95 Seating Plane 0,75 0,45 0,08 1,20 MAX 4073176 / B 10/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC MS-026 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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