SM74611 www.ti.com SNVS903 – DECEMBER 2012 SM74611 Smart Bypass Diode Check for Samples: SM74611 FEATURES 1 • • • • • • 2 • Maximum reverse voltage (VR) of 30 V Maximum forward current (IF) of 15A Low average forward voltage (26mV at 8A) Less power dissipation than Schottky diode Lower leakage current than Schottky diode Footprint and pin compatible with conventional D2PAK Schottky diode Operating range (Tj) of -40°C to 125°C APPLICATIONS • • Bypass Diodes for Photovoltaic Panels Bypass Diodes for Microinverter and Power Optimizer DESCRIPTION The SM74611 is a smart bypass diode used in photovoltaic applications. It serves the purpose of providing an alternate path for string current when parts of the panel are shaded during normal operation. Without bypass diodes, the shaded cells will exhibit a hot spot which is caused by excessive power dissipation in the reverse biased cells. Currently, conventional P-N junction diodes or Schottky diodes are used to mitigate this issue. Unfortunately the forward voltage drop for these diodes is still considered high (~0.6V for normal diodes and 0.4V for Schottky). With 10A of currents flowing through these diodes, the power dissipation can reach as high as 6W. This in turn will raise the temperature inside the junction box where these diodes normally reside and reduce module reliability. The advantage of the SM74611 is that it has a lower forward voltage drop than P-N junction and Schottky diodes. It has a typical average forward voltage drop of 26mV at 8A of current. This translates into typical power dissipation of 208mW, which is significantly lower than the 3.2W of conventional Schottky diodes. The SM74611 is also footprint and pin compatible with conventional D2PAK Schottky diodes, making it a drop-in replacement in many applications. TYPICAL APPLICATION CIRCUITS PV (+) PV (-) JUNCTION BOX A K SM74611 K A SM74611 K A SM74611 PV MODULE 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated SM74611 SNVS903 – DECEMBER 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. CONNECTION DIAGRAM DAP Figure 1. D2PAK PIN DESCRIPTIONS Pin NO. NAME 1,3 (1) ANODE 2,DAP (2) (1) (2) CATHODE DESCRIPTION Connect both of these pins to the negative side of the PV cells Pin 2 and the DAP are shorted internally. Connect the DAP to the positive side of the PV cells Pin 1 and Pin 3 should be connected together for proper operation Package drawing at the end of datasheet is shown without Pin 2 being trimmed These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) DC Reverse Voltage 30V Forward Current 15A Ambient Storage Temperature -65°C to 125°C (1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. RECOMMENDED OPERATING CONDITIONS (1) DC Reverse Voltage 28V Junction Temperature Range (TJ) -40°C to 125°C Forward Current 0-15A (1) System must be thermally managed so as not to exceed maximum junction temperature 2 Copyright © 2012, Texas Instruments Incorporated Product Folder Links: SM74611 SM74611 www.ti.com SNVS903 – DECEMBER 2012 ESD RATINGS All Pins, Human Body Model (HBM) >1kV All Pins, Charge Model (CDM) >250V ELECTRICAL CHARACTERISTICS (1) SYMBOL PARAMETER IF(AVG) Forward Current VF(AVG) Forward Voltage PD Power Dissipation TEST CONDITIONS IF = 8A IF = 8A IF = 15A D Duty Cycle IF = 8A RJC Thermal Resistance, FET Junction to Case (D2PAK) IR Reverse Leakage Current (1) MIN TYP MAX 8 15 TJ = 25°C 26 TJ = 25°C 208 TJ = 125°C 450 TJ = 25°C 695 TJ = 125°C 1389 TJ = 25°C 99.5 TJ = 125°C 96.0 A mV 0.5 VREVERSE = 28V UNIT TJ = 25°C 0.3 TJ = 125°C 3.3 575 mW % °C/W µA Limits appearing in boldface type apply over the entire junction temperature range for operation. Limits appearing in normal type apply for TA = TJ = 25°C. TYPICAL CHARACTERISTICS Average Forward Voltage (Anode to Cathode) Vs. Current 100.00 125ºC 90.00 AVERAGE FORWARD VOLTAGE (mV) 85ºC 80.00 25ºC 70.00 -40ºC 60.00 50.00 40.00 30.00 20.00 10.00 0.00 0 2 4 6 8 10 12 14 16 CURRENT (A) C003 Figure 2. Average Forward Voltage (Anode to Cathode) Over Temperature 3 Copyright © 2012, Texas Instruments Incorporated Product Folder Links: SM74611 SM74611 SNVS903 – DECEMBER 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) Power Dissipation Vs. Current 1.600 125ºC 1.400 85ºC 25ºC POWER DISSPATION (W) 1.200 -40ºC 1.000 0.800 0.600 0.400 0.200 0.000 0 2 4 6 8 10 12 14 16 CURRENT (A) C001 Figure 3. Power Dissipation Over Temperature Reverse Current vs Reverse Voltage (Cathode to Anode) 10 REVERSE CURRENT ( A) 1 0.1 0.01 0.001 0.0001 0 5 10 15 20 25 30 REVERSE VOLTAGE (V) 125ºC 85ºC 25ºC -40ºC C002 Figure 4. Reverse Current Over Temperature 4 Copyright © 2012, Texas Instruments Incorporated Product Folder Links: SM74611 SM74611 www.ti.com SNVS903 – DECEMBER 2012 APPLICATION INFORMATION The SM74611 is designed for use as a bypass diode in photovoltaic modules. The SM74611 utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. Please refer to Figure 5 and Figure 6 for operational description below From t0 to t1: When cells in the solar panels are shaded, the FET Q1 is off and the bypass current will flow through the body diode of the FET as shown on Figure 5. This current will produce a voltage drop (VF) across ANODE and CATHODE terminal of the bypass diode. During this time, the charge pump circuitry is active and charging capacitor C1 to a higher voltage. At t1: Once the voltage on the capacitor reaches its predetermined voltage level, the charge pump is disabled and the capacitor voltage is used to drive the FET through the FET driver stage. From t1 to t2 : When the FET is active, it provides a low resistive path for the bypass current to flow thus minimizing the power dissipation across ANODE and CATHODE. Since the FET is active, the voltage across the ANODE and CATHODE is too low to operate the charge pump. During this time, the stored charge on C1 is used to supply the controller as well as drive the FET. At t2: When the voltage on the capacitor C1 reaches its predetermined lower level, the FET driver shuts off the FET. The bypass current will then begin to flow through the body diode of the FET, causing the FET body diode voltage drop of approximately 0.6V to appear across ANODE and CATHODE. The charge pump circuitry is reactivated and begins charging the capacitor C1. This cycle repeats until the shade on the panel is removed and the string current begins to flow through the PV cells instead of the body diode of the FET. The key factor to minimizing the power dissipation on the device is to keep the FET on at a high duty cycle. The average forward voltage drop will then be reduced to a much lower voltage than for a Schottky or regular P-N junction diode. CATHODE Q1 C1 Charge Pump Controller and FET Driver IBYPASS VF ANODE Figure 5. SM74611 Block Diagram 5 Copyright © 2012, Texas Instruments Incorporated Product Folder Links: SM74611 SM74611 SNVS903 – DECEMBER 2012 www.ti.com t0 t1 t2 FET ON Figure 6. ANODE to CATHODE voltage (Ch1) with IBYPASS = 15A (Ch4) for SM74611 in Junction Box at 85˚C ambient 6 Copyright © 2012, Texas Instruments Incorporated Product Folder Links: SM74611 PACKAGE OPTION ADDENDUM www.ti.com 19-Feb-2013 PACKAGING INFORMATION Orderable Device Status (1) SM74611KTTR ACTIVE Package Type Package Pins Package Qty Drawing DDPAK/ TO-263 KTT 3 500 Eco Plan Lead/Ball Finish (2) Pb-Free (RoHS Exempt) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) CU SN Level-3-245C-168 HR (4) -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 21-Feb-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SM74611KTTR Package Package Pins Type Drawing SPQ DDPAK/ TO-263 500 KTT 3 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 24.4 Pack Materials-Page 1 10.6 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 15.8 4.9 16.0 24.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 21-Feb-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SM74611KTTR DDPAK/TO-263 KTT 3 500 340.0 340.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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