PLL602-10 Preliminary 96MHz – 400MHz Low Phase Noise XO (for 12 – 25MHz Crystals) FEATURES • • • • • 65 mil Low phase noise output for the 96MHz to 400MHz range (-134 dBc at 10kHz offset). Selectable CMOS, PECL and LVDS output. 12 to 25MHz crystal input. Output Enable selector. 3.3V operation. Available in DIE (65 mil x 62 mil). 25 24 23 21 22 (1550,1475) 20 19 18 17 16 26 15 27 14 28 62 mil • DIE CONFIGURATION 13 29 12 11 30 DESCRIPTIONS 10 31 The PLL602-10 is a monolithic low jitter and low phase noise (-134dBc/Hz @ 10kHz offset) XO IC Die, with CMOS, LVDS and PECL output, for 96MHz to 400MHz output range, using a low frequency crystal. The same die can be used as a XO with output frequencies ranging from F XIN x 8 to F XIN x 16 thanks to selector pads allowing bonding options (see Divider Selection Table on this page). This makes the PLL602-10 ideal for a wide range of applications. 9 1 2 3 4 5 6 7 8 (0,0) Y X MULTIPLIER SELECTION Pad #19 MULTIPLIER OUTPUT RANGE 0 F XIN x 16 192 – 400 MHz 1 F XIN x 8 96 – 200 MHz Note: Selector pad defaults to ‘1’, wire bond to GND to set to ‘0’ DIE SPECIFICATIONS OUTPUT SELECTION AND ENABLE Name Value Size Reverse side 62 x 65 mil GND Pad dimensions 80 micron x 80 micron Thickness 10 mil Pad #18 OUTSEL1 Pad #25 OUTSEL0 0 0 1 1 0 1 0 1 OE (Pad #30) 0 1 (Default) Selected Output High Drive CMOS Standard CMOS PECL LVDS State Tri-state Output enabled BLOCK DIAGRAM VCO Divider SELECT XIN XOUT Reference Divider XTAL OSC Phase Comparator Charge Pump Loop Filter VCO CLKBAR CLK OE 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 11/06/02 Page 1 Preliminary PLL602-10 96MHz – 400MHz Low Phase Noise XO (for 12 – 25MHz Crystals) ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL Supply Voltage MIN. V DD MAX. UNITS 7 V Input Voltage, dc VI V SS - 0.5 V DD + 0.5 V Output Voltage, dc VO V SS - 0.5 V DD + 0.5 V Storage Temperature TS -65 150 °C Ambient Operating Temperature TA 0 70 °C Junction Temperature TJ 125 °C 260 °C 2 kV Lead Temperature (soldering, 10s) Input Static Discharge Voltage Protection Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. 2. Crystal Specifications PARAMETERS Crystal Resonator Frequency Crystal Loading Rating Recommended ESR SYMBOL F XIN CONDITIONS MIN. Parallel Fundamental Mode 12 MAX. UNITS 25 MHz TBD C L (xtal) RE TYP. AT cut 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 pF 30 Ω Rev 11/06/02 Page 2 Preliminary PLL602-10 96MHz – 400MHz Low Phase Noise XO (for 12 – 25MHz Crystals) 3. General Electrical Specifications PARAMETERS SYMBOL Supply Current, Dynamic (with Loaded Outputs) I DD Operating Voltage V DD Output Clock Duty Cycle CONDITIONS MIN. TYP. PECL/LVDS/CMOS 3.13 45 45 45 @ 1.4V (CMOS) @ 1.25V (LVDS) @ Vdd – 1.3V (PECL) 50 50 50 Short Circuit Current MAX. UNITS 80/60/35 mA 3.47 55 55 55 V % mA ±50 4. Jitter and Phase Noise specification PARAMETERS CONDITIONS Phase Noise relative to carrier With capacitive decoupling between VDD and GND. With capacitive decoupling between VDD and GND. Over 10,000 cycles. 155MHz @100Hz offset Phase Noise relative to carrier Period jitter RMS MIN. TYP. MAX. UNITS 7 ps 11 ps -90 dBc/Hz 155MHz @1kHz offset -114 dBc/Hz Phase Noise relative to carrier 155MHz @10kHz offset -134 dBc/Hz Phase Noise relative to carrier 155MHz @100kHz offset -134 dBc/Hz Accumulated jitter RMS 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 11/06/02 Page 3 Preliminary PLL602-10 96MHz – 400MHz Low Phase Noise XO (for 12 – 25MHz Crystals) 5. LVDS Electrical Characteristics PARAMETERS SYMBOL Output Differential Voltage V DD Magnitude Change MIN. TYP. MAX. UNITS V OD 247 355 454 mV ∆V OD -50 50 mV 1.6 V Output High Voltage V OH Output Low Voltage V OL Offset Voltage CONDITIONS 1.4 R L = 100 Ω (see figure) 0.9 1.1 V OS 1.125 1.2 1.375 V Offset Magnitude Change ∆V OS 0 3 25 mV Power-off Leakage I OXD ±1 ±10 uA Output Short Circuit Current I OSD -5.7 -8 mA V out = V DD or GND V DD = 0V V 6. LVDS Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Differential Clock Rise Time tr 0.2 0.7 1.0 ns Differential Clock Fall Time tf R L = 100 Ω C L = 10 pF (see figure) 0.2 0.7 1.0 ns LVDS Levels Test Circuit LVDS Switching Test Circuit OUT OUT CL = 10pF 50Ω VOD VOS VDIFF RL = 100Ω 50Ω CL = 10pF OUT OUT LVDS Transistion Time Waveform OUT 0V (Differential) OUT 80% V DIFF 80% 0V 20% 20% tR tF 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 11/06/02 Page 4 Preliminary PLL602-10 96MHz – 400MHz Low Phase Noise XO (for 12 – 25MHz Crystals) 7. PECL Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. Output High Voltage V OH V DD – 1.025 Output Low Voltage V OL R L = 50 Ω to (V DD – 2V) (see figure) MAX. UNITS V V DD – 1.620 V 8. PECL Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Clock Rise Time tr @20/80% - PECL 0.6 1.5 ns Clock Fall Time tf @80/20% - PECL 0.5 1.5 ns PECL Levels Test Circuit OUT PECL Output Skew VDD 50Ω OUT 2.0V 50% 50Ω OUT tSKEW OUT PECL Transistion Time Waveform DUTY CYCLE 45 - 55% 55 - 45% OUT 80% 50% 20% OUT tR tF 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 11/06/02 Page 5 Preliminary PLL602-10 96MHz – 400MHz Low Phase Noise XO (for 12 – 25MHz Crystals) PAD ASSIGNMENT Pad # Name X (µ µ m) Y (µ µ m) 1 GND 248 109 2 GND 361 109 3 GND 473 109 4 GND 587 109 5 GND 702 109 6 N/C 874 109 7 GND 1042 109 8 GNDBUF 1171 109 9 CMOS 1400 125 10 LVDS 1400 259 11 PECL 1400 476 12 VDDBUF 1400 616 13 VDDBUF 1400 716 14 PECLB 1400 871 15 LVDSB 1400 1089 16 CMOSB 1400 1227 17 GNDBUF 1389 1365 18 OUTSEL1 1232 1365 19 FSEL 1042 1365 20 N/C 854 1365 21 VDD 659 1365 22 VDD 559 1365 23 VDD 459 1365 24 VDD 358 1365 25 OUTSEL0 194 1365 26 XIN 109 1223 27 XOUT 109 1017 28 N/C 109 858 29 N/C 109 646 30 OE 109 397 31 N/C 109 181 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 11/06/02 Page 6 Preliminary PLL602-10 96MHz – 400MHz Low Phase Noise XO (for 12 – 25MHz Crystals) ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL602-10 D C PART NUMBER TEMPERATURATRE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE D=DIE PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 11/06/02 Page 7