DS30EA101 www.ti.com SNLS404A – FEBRUARY 2012 – REVISED APRIL 2013 DS30EA101 0.15 to 3.125 Gbps Adaptive Cable Equalizer Check for Samples: DS30EA101 FEATURES DESCRIPTION • The DS30EA101 is an adaptive cable equalizer optimized for equalizing data transmitted over copper cables. The equalizer operates over a range of data rates from 150 Mbps to 3.125 Gbps and automatically adapts to equalize signals sent over any cable length from zero meters to lengths that attenuate the signal by 50 dB at 1.5 GHz. 1 2 • • • • Automatic Equalization of Coaxial and Twisted Pair Cables Data Rates from 150 Mbps to 3.125 Gbps Supports SD and HD Video Resolutions Power Consumption: 115 mW Typical Industrial Temperature Range: -40°C to +85°C The DS30EA101 allows either single-ended or differential input. This enables equalization of signals over coaxial cables as well as twisted pair cables. APPLICATIONS • • • Cable Extension Data Recovery Equalization Security and Surveillance Additional features include an LOS detect and output enable which, when tied together, disable the output when no input signal is present. The DS30EA101 is powered from a single 2.5V supply and consumes 115 mW (typical). It operates over the full industrial temperature range of -40°C to +85°C and is available in a 4 x 4 mm 16-pin WQFN package. 150 Mbps to 3.125 Gbps 100: Differential Cable or 75: Coaxial Cable DS30BA101 DS30EA101 Max Cable Loss ~ 50 dB @ 1.5 GHz Deserializer Serializer Typical Application 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012–2013, Texas Instruments Incorporated DS30EA101 SNLS404A – FEBRUARY 2012 – REVISED APRIL 2013 www.ti.com IN- 3 VEE 4 EN VCC LOS 13 DS30EA101 (top view) 5 6 7 8 VEE 2 14 VEE IN+ 15 DNC 1 16 DNC VEE VCC Connection Diagram 12 VEE 11 OUT+ 10 OUT- 9 VEE DAP = VEE The exposed die attach pad is a negative electrical terminal for this device. It should be connected to the negative power supply voltage. Figure 1. 16-Pin WQFN Package See Package Number RUM0016A PIN DESCRIPTIONS Pin Name I/O, Type Description 1 VEE Ground Negative power supply (ground). 2 IN+ I, Data Non-inverting input. 3 IN- I, Data Inverting input. 4 VEE Ground Negative power supply (ground). 5 DNC N/A Do not connect – leave open. 6 DNC N/A Do not connect – leave open. 7 VEE Ground Negative power supply (ground). 8 VEE Ground Negative power supply (ground). 9 VEE Ground Negative power supply (ground). 10 OUT- O, LVDS Inverting output. 11 OUT+ O, LVDS Non-inverting output. 12 VEE Ground Negative power supply (ground). 13 VCC Power Positive power supply (+2.5V). 14 EN I, LVCMOS Output enable. LOS may be tied to this pin to inhibit the output when no input signal is present. This pin has an internal pulldown. H = Outputs disabled. L = Outputs enabled. 15 LOS O, LVCMOS Loss of signal. H = No input signal detected. L = Input signal detected. 16 VCC Power Positive power supply (+2.5V). DAP VEE Ground Connect exposed DAP to negative power supply (ground). These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: DS30EA101 DS30EA101 www.ti.com SNLS404A – FEBRUARY 2012 – REVISED APRIL 2013 Absolute Maximum Ratings (1) Supply Voltage 3.1V −0.3V to VCC+0.3V Input Voltage (all inputs) −65°C to +150°C Storage Temperature Range Junction Temperature +125°C Package Thermal Resistance θJA 16-pin WQFN θJC 16-pin WQFN +40°C/W +6°C/W ESD Rating (HBM) ≥±6 kV ESD Rating (MM) ≥±300V ≥±2 kV ESD Rating (CDM) (1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device my occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. Recommended Operating Conditions Supply Voltage (VCC) 2.5V ±5% Input Coupling Capacitance 1.0 µF Operating Free Air Temperature (TA) -40°C to +85°C DC Electrical Characteristics Over recommended supply voltage and operating temperature ranges, unless otherwise specified. (1) (2) Parameter Test Conditions Reference VIN Input Voltage 0m cable length IN+, IN- VSS Steady State Differential Output Voltage 100Ω load, Figure 2 OUT+, OUT- VOD Differential Output Voltage ΔVOD Change in Magnitude of VOD for Complimentary Output States VOS Offset Voltage ΔVOS Change in Magnitude of VOS for Complimentary Output States IOS Output Short Circuit Current VIH Input Voltage High Level VIL Input Voltage Low Level VOH Output Voltage High Level IOH = -2 mA VOL Output Voltage Low Level IOL = +2 mA ICC Supply Current (1) (2) Min Typ Max Units 720 800 880 mVP−P 500 700 900 mVP-P 250 350 450 mV 50 mV 1.35 V 50 mV 1.1 EN LOS 1.2 30 mA 1.7 VCC V VEE 0.7 V 2.0 V 45 0.2 V 65 mA The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. Typical values represent most likely parametric norms at VCC = +2.5V, TA = +25°C, and at the Recommended Operating Conditions at the time of product characterization and are not ensured. Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: DS30EA101 3 DS30EA101 SNLS404A – FEBRUARY 2012 – REVISED APRIL 2013 www.ti.com AC Electrical Characteristics Over recommended supply voltage and operating temperature ranges, unless otherwise specified. (1) (2) Parameter Test Conditions DRIN Input Data Rate tJIT Total Jitter at BER 10-12 Transition Time Low to High tTHL Transition Time High to Low (2) (3) (4) Min IN+, IN(3) tTLH (1) Reference Typ 150 3.125 Gbps, 0-10 meters CAT6 0.35 2.5 Gbps, 0-25 meters CAT6 0.35 1.5 Gbps, 0-50 meters CAT6 0.35 3.125 Gbps, 0-100 meters RG59 0.3 2.5 Gbps, 0-110 meters RG59 0.35 1.5 Gbps, 0-120 meters RG59 0.2 20% - 80%, 100Ω load, Figure 2 (4) , OUT+, OUT- Max Units 3125 Mbps UI UI UI UI UI UI 90 130 ps 90 130 ps The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. Typical values represent most likely parametric norms at VCC = +2.5V, TA = +25°C, and at the Recommended Operating Conditions at the time of product characterization and are not ensured. The total jitter at BER 10-12 is calculated as DJ + (14 x RJ), where DJ is deterministic jitter and RJ is random jitter. The jitter is expressed as a portion of the unit interval (UI). The UI is the reciprocal of the data rate. Specification is ensured by characterization and is not tested in production. TIMING DIAGRAMS VODVOS VOD+ 80% 80% + VOD VSS 0V differential 20% 20% - VOD VSS = (VOD+) ± (VOD-) tTLH tTHL Figure 2. LVDS Output Voltage, Offset, and Timing Parameters 4 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: DS30EA101 DS30EA101 www.ti.com SNLS404A – FEBRUARY 2012 – REVISED APRIL 2013 DEVICE OPERATION The DS30EA101 equalizes data transmitted over copper cables. It automatically adjusts its gain to reverse the effects of the cable loss and restore the original signal. For proper operation, the launch amplitude of the signal going into the cable (the signal amplitude prior to the cable attenuation) must be set appropriately. If the signal is single-ended, its single-ended amplitude must be 800 mVP-P ±10%. If the signal is differential, its differential amplitude must be 800 mVP-P ±10% (400 mVP-P single-ended). INPUT INTERFACING The DS30EA101 accepts either differential or single-ended input. The input must be AC coupled. Figure 3 and Figure 4 show the typical configurations for differential input and single-ended input, respectively. For singleended input, the unused input must be properly terminated as shown. OUTPUT INTERFACING The DS30EA101 output signals (OUT+ and OUT- ) are internally terminated 100Ω LVDS outputs. These outputs can be DC coupled to most common differential receivers. LOS AND EN LOS indicates the loss of signal at the DS30EA101 input. LOS is high when no input signal is present and low when a valid input signal is detected. EN can be used to manually disable or enable the OUT+ and OUT- output signals. Applying a high input to EN will disable the DS30EA101 outputs by forcing the output to a logic 1, and applying a low input to EN will force the outputs to be active. EN has an internal pulldown to enable the outputs by default. LOS and EN may be tied together to automatically disable the DS30EA101 outputs when no input signal is present. APPLICATION INFORMATION CABLE EXTENDER APPLICATION The DS30EA101 together with the DS30BA101 form a cable extender chipset optimized for extending serial data streams from serializer/deseralizer (SerDes) pairs and FPGAs over 100Ω differential cables and 75Ω coaxial cables. Setting the correct DS30BA101 output amplitude and proper cable termination are essential for optimal operation. Figure 3 shows the recommended chipset configuration for 100Ω differential cable and Figure 4 shows the recommended chipset configuration for 75Ω coaxial cable. VCC 50: 953: IN+ 100: RVO OUT+ 50: 0.1 PF 1 PF 100: Differential TP Cable IN+ 100: DS30BA101 OUT+ DS30EA101 1 PF 1 PF IN- 1 PF IN- OUT- OUT- Figure 3. Cable Extender Chipset Application Circuit for 100Ω Differential Cable Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: DS30EA101 5 DS30EA101 SNLS404A – FEBRUARY 2012 – REVISED APRIL 2013 www.ti.com VCC 75: 750: IN+ 100: RVO 75: OUT+ 0.1 PF 75: Coaxial Cable 1 PF 1 PF IN+ DS30BA101 DS30EA101 75: 1 PF IN- OUT+ 1 PF IN- OUT75: OUT- 37.4: Figure 4. Cable Extender Chipset Application Circuit for 75Ω Coaxial Cable 6 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: DS30EA101 DS30EA101 www.ti.com SNLS404A – FEBRUARY 2012 – REVISED APRIL 2013 REVISION HISTORY Changes from Original (April 2013) to Revision A • Page Changed layout of National Data Sheet to TI format ............................................................................................................ 6 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: DS30EA101 7 PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) DS30EA101SQ/NOPB ACTIVE WQFN RUM 16 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 30EA101 DS30EA101SQE/NOPB ACTIVE WQFN RUM 16 250 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 30EA101 DS30EA101SQX/NOPB ACTIVE WQFN RUM 16 4500 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 30EA101 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing DS30EA101SQ/NOPB WQFN RUM 16 DS30EA101SQE/NOPB WQFN RUM DS30EA101SQX/NOPB WQFN RUM SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 16 250 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 16 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS30EA101SQ/NOPB WQFN RUM 16 1000 213.0 191.0 55.0 DS30EA101SQE/NOPB WQFN RUM 16 250 213.0 191.0 55.0 DS30EA101SQX/NOPB WQFN RUM 16 4500 367.0 367.0 35.0 Pack Materials-Page 2 MECHANICAL DATA RUM0016A SQB16A (Rev A) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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