SECOS SSD20N15-250D

SSD20N15-250D
N-Ch Enhancement Mode Power MOSFET
12A, 150V, RDS(ON) 255mΩ
Elektronische Bauelemente
RoHS Compliant Product
A suffix of “-C” specifies halogen free
DESCRIPTION
These miniature surface mount MOSFETs utilize a high cell density trench
process to provide Low RDS(on) and to ensure minimal power loss and heat dissipation.
Typical applications are DC-DC converters and power management in portable
and battery-powered products such as computers, printers, PCMCIA cards, cellular
and cordless telephones.
TO-252(D-Pack)
FEATURES




Low RDS(on) provides higher efficiency and extends battery life.
Low thermal impedance copper leadframe DPAK saves board space.
Fast switching speed.
High performance trench technology.
A
B
C
D
GE
PRODUCT SUMMARY
VDS(V)
150
PRODUCT SUMMARY
RDS(on) m(
[email protected]= 10V
[email protected]= 5.5V
K
ID(A)
12
11

M
REF.
Gate
A
B
C
D
E
F
G
H

Source
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
Drain-Source Voltage
Gate-Source Voltage
Pulsed Drain Current
a
b
Continuous Source Current (Diode Conduction)
Total Power Dissipation
N
O
P
J
Drain

Continuous Drain Current
HF
a
a
Operating Junction and Storage Temperature Range
Millimeter
Min.
Max.
6.4
6.8
5.20
5.50
2.20
2.40
0.45
0.58
6.8
7.3
2.40
3.0
5.40
6.2
0.8
1.20
REF.
J
K
M
N
O
P
Millimeter
Min.
Max.
2.30 REF.
0.70
0.90
0.50
1.1
0.9
1.6
0
0.15
0.43
0.58
UNIT
VDS
150
V
VGS
±20
V
ID @TC=25℃
12
A
IDM
36
A
IS
30
A
PD @TC=25℃
50
W
TJ, TSTG
-55 ~ 175
°C
THERMAL RESISTANCE RATINGS
Maximum Thermal Resistance Junction-Ambient a
RθJA
50
°C / W
Maximum Thermal Resistance Junction-Case
RθJC
3.0
°C / W
Notes:
a. Surface Mounted on 1” x 1” FR4 Board.
b. Pulse width limited by maximum junction temperature.
http://www.SeCoSGmbH.com/
22-Jul-2010 Rev.A
Any changes of specification will not be informed individually.
Page 1 of 2
SSD20N15-250D
N-Ch Enhancement Mode Power MOSFET
12A, 150V, RDS(ON) 255mΩ
Elektronische Bauelemente
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
PARAMETER
SYMBOL MIN. TYP. MAX. UNIT
TEST CONDITIONS
Static
Gate-Threshold Voltage
VGS(th)
1.0
-
-
V
VDS= VGS, ID = 250 μA
Gate-Body Leakage
IGSS
-
-
±100
nA
VDS = 0V, VGS= 20V
Zero Gate Voltage Drain Current
IDSS
-
-
1
-
-
25
On-State Drain Current a
ID(on)
34
-
-
-
-
255
-
-
290
μA
A
VDS= 120V, VGS= 0V
VDS= 120V, VGS= 0V, TJ=55°C
VDS = 5V, VGS= 10V
VGS= 10V, ID= 9.2 A
Drain-Source On-Resistance a
RDS(ON)
Forward Transconductance a
gfs
-
4.4
-
S
VDS= 40V, ID= 5.5 A
Diode Forward Voltage
VSD
-
1.1
-
V
IS= 9 A, VGS= 0 V
mΩ
VGS= 5.5V, ID= 6.1 A
Dynamic b
Total Gate Charge
Qg
-
19
-
Gate-Source Charge
Qgs
-
3
-
Gate-Drain Charge
Qgd
-
9.5
-
Turn-on Delay Time
Td(on)
-
25
-
Tr
-
60
-
Td(off)
-
65
-
Tf
-
45
-
Rise Time
Turn-off Delay Time
Fall Time
nC
VDS = 25 V
VGS = 10 V
ID = 9 A
nS
VDD= 100 V
ID= 9 A
VGEN = 10 V
RL= 25 
Notes
a. Pulse test:Pulse width ≦ 300 μs, duty cycle ≦ 2%.
b. Guaranteed by design, not subject to production testing.
http://www.SeCoSGmbH.com/
22-Jul-2010 Rev.A
Any changes of specification will not be informed individually.
Page 2 of 2