SSM2761P-A
N-CHANNEL ENHANCEMENT MODE
POWER MOSFET
PRODUCT SUMMARY
D
Lower On-resistance
Fast Switching Characteristic
Simple Drive Requirement
RoHS Compliant
G
BVDSS
650V
RDS(ON)
1Ω
ID
10A
S
DESCRIPTION
The TO-220 package is universally preferred for all commercialindustrial applications.
The device is suited for DC-DC ,AC-DC
converters for power applications.
G
D
Pb-free; RoHS-compliant
TO-220
S
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Units
VDS
Drain-Source Voltage
650
V
VGS
Gate-Source Voltage
±30
V
ID@TC=25℃
Continuous Drain Current, V GS @ 10V
10
A
ID@TC=100℃
Continuous Drain Current, V GS @ 10V
4.4
A
18
A
1
IDM
Pulsed Drain Current
PD@TC=25℃
Total Power Dissipation
104
W
Linear Derating Factor
0.8
W/℃
IAR
Avalanche Current
10
A
TSTG
Storage Temperature Range
-55 to 150
℃
TJ
Operating Junction Temperature Range
-55 to 150
℃
THERMAL DATA
Symbol
Parameter
Value
Units
Rthj-c
Thermal Resistance Junction-case
Max.
1.2
℃/W
Rthj-a
Thermal Resistance Junction-ambient
Max.
62
℃/W
05/25/2007 Rev.1.00
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1
SSM2761P-A
ELECTRICAL CHARACTERISTICS @Tj=25oC(unless otherwise specified)
Symbol
Parameter
Test Conditions
Typ.
Max. Units
650
-
-
V
BVDSS
Drain-Source Breakdown Voltage
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA
-
0.6
-
V/℃
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=3.5A
-
-
1
Ω
VGS(th)
Gate Threshold Voltage
VDS=VGS, ID=250uA
2
-
4
V
gfs
Forward Transconductance
VDS=10V, ID=3.5A
-
4.5
-
S
VDS=600V, VGS=0V
-
-
10
uA
Drain-Source Leakage Current (Tj=150 C)
VDS=480V, VGS=0V
-
-
100
uA
Gate-Source Leakage
VGS=±30V
-
-
±100
nA
ID=10A
-
53
85
nC
o
IDSS
Drain-Source Leakage Current (Tj=25 C)
o
IGSS
3
VGS=0V, ID=1mA
Min.
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=520V
-
10
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=10V
-
15
-
nC
3
td(on)
Turn-on Delay Time
VDD=320V
-
16
-
ns
tr
Rise Time
ID=10A
-
20
-
ns
td(off)
Turn-off Delay Time
RG=10Ω,VGS=10V
-
82
-
ns
tf
Fall Time
RD=32Ω
-
36
-
ns
Ciss
Input Capacitance
VGS=0V
-
2770 4430
pF
Coss
Output Capacitance
VDS=15V
-
320
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
8
-
pF
Min.
Typ.
IS=10A, VGS=0V
-
-
1.5
V
Source-Drain Diode
Symbol
VSD
Parameter
Forward On Voltage
3
3
Test Conditions
Max. Units
trr
Reverse Recovery Time
IS=10A, VGS=0V,
-
610
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
8.64
-
µC
Notes:
1.Pulse width limited by safe operating area.
o
2.Starting Tj=25 C , VDD=50V , L=1.2mH , RG=25Ω , IAS=10A.
3.Pulse width <300us , duty cycle <2%.
05/25/2007 Rev.1.00
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SSM2761P-A
9
12
10V
6.0V
5.5V
o
o
10V
6.0V
5.5V
5.0V
T C =150 C
9
ID , Drain Current (A)
ID , Drain Current (A)
T C =25 C
5.0V
6
6
3
V G =4.0V
3
V G =4.0V
0
0
0
5
10
15
20
0
25
10
20
30
40
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.4
1.2
I D =3.5A
V G =10V
1.8
Normalized RDS(ON)
Normalized BVDSS (V)
1.1
1
1.2
0.6
0.9
0
0.8
-50
0
50
100
-50
150
T j , Junction Temperature ( o C)
100
5
10
4
T j = 25 o C
T j = 150 o C
50
100
150
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
VGS(th) (V)
IS (A)
Fig 3. On-Resistance v.s. Gate Voltage
1
0
T j , Junction Temperature ( o C)
0.1
3
2
0.01
1
0.1
0.3
0.5
0.7
0.9
1.1
1.3
-50
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
05/25/2007 Rev.1.00
0
50
100
150
T j , Junction Temperature ( o C)
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
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SSM2761P-A
f=1.0MHz
10000
I D =10A
C iss
12
V DS =330V
V DS =410V
V DS =520V
C (pF)
VGS , Gate to Source Voltage (V)
16
8
C oss
100
4
C rss
0
1
0
20
40
60
80
1
5
9
Q G , Total Gate Charge (nC)
13
17
21
25
29
V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Normalized Thermal Response (Rthjc)
Duty factor=0.5
10
ID (A)
10us
100us
1
1ms
10ms
o
T C =25 C
Single Pulse
0.2
0.1
0.1
0.05
0.02
PDM
0.01
t
T
Single Pulse
Duty factor = t/T
Peak Tj = PDM x Rthjc + T C
100ms
0.01
0
1
10
100
1000
10000
0.00001
0.0001
0.001
0.01
0.1
1
t , Pulse Width (s)
V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
10V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Charge
Fig 11. Switching Time Waveform
05/25/2007 Rev.1.00
Q
Fig 12. Gate Charge Waveform
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SSM2761P-A
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
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responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
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