SSM40T03GH,J
N-channel Enhancement-mode Power MOSFET
Low gate-charge
D
Simple drive requirement
Fast switching
G
Pb-free; RoHS compliant.
BV DSS
30V
R DS(ON)
25mΩ
ID
28A
S
DESCRIPTION
G D
S
The SSM40T03GH is in a TO-252 package, which is widely used for
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters. The through-hole
version, the SSM40T03GJ in TO-251, is available for low-footprint vertical
mounting. These devices are manufactured with an advanced process,
providing improved on-resistance and switching performance.
G
D
S
TO-252 (H)
TO-251 (J)
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Units
VDS
Drain-Source Voltage
30
V
VGS
Gate-Source Voltage
± 25
V
ID @ TC=25°C
Continuous Drain Current
28
A
ID @ TC=100°C
Continuous Drain Current
24
A
95
A
1
IDM
Pulsed Drain Current
PD @ TC=25°C
Total Power Dissipation
31.25
W
Linear Derating Factor
0.25
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
THERMAL DATA
Symbol
Parameter
Value
Unit
Rthj-c
Thermal Resistance Junction-case
Max.
4
°C/W
Rthj-a
Thermal Resistance Junction-ambient
Max.
110
°C/W
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SSM40T03GH,J
ELECTRICAL CHARACTERISTICS @ Tj= 25°C (unless otherwise specified)
Symbol
Parameter
Test Conditions
Typ.
Max. Units
30
-
-
V
V/°C
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
-
0.032
-
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=18A
-
-
25
mΩ
VGS=4.5V, ID=14A
-
-
45
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VDS=10V, ID=18A
-
15
-
S
VDS=30V, VGS=0V
-
-
1
uA
Drain-Source Leakage Current (T j=150 C)
VDS=24V ,VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS= ±25V
-
-
±100
nA
ID=18A
-
8.8
-
nC
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
VGS=0V, ID=250uA
Min.
o
IDSS
Drain-Source Leakage Current (T j=25 C)
o
IGSS
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=20V
-
2.5
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
5.8
-
nC
VDS=15V
-
6
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=18A
-
62
-
ns
td(off)
Turn-off Delay Time
RG=3.3 Ω ,VGS=10V
-
16
-
ns
tf
Fall Time
RD=0.83Ω
-
4.4
-
ns
Ciss
Input Capacitance
VGS=0V
-
655
-
pF
Coss
Output Capacitance
VDS=25V
-
145
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
95
-
pF
Min.
Typ.
-
-
28
A
-
-
95
A
-
-
1.3
V
Source-Drain Diode
Symbol
IS
ISM
VSD
Parameter
Test Conditions
VD=VG=0V , VS=1.3V
Continuous Source Current ( Body Diode )
Pulsed Source Current ( Body Diode )
2
Forward On Voltage
1
Tj=25°C, IS=28A, VGS=0V
Max. Units
Notes:
1.Pulse width limited by safe operating area.
2.Pulse width <300us , duty cycle <2%.
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SSM40T03GH,J
90
75
10V
8 .0V
ID , Drain Current (A)
6 .0V
60
30
50
6 .0V
25
V G =4.0V
V G = 4. 0V
0
0
0.0
1.0
2.0
3.0
4.0
0.0
1.0
V DS , Drain-to-Source Voltage (V)
2.0
3.0
4.0
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.0
70
I D =18A
V G =10V
Normalized RDS(ON)
I D =14A
T C =25°C
50
RDS(ON) (mΩ )
10V
8 .0V
o
T C =150 C
ID , Drain Current (A)
o
T C =25 C
30
1.4
0.8
0.2
10
0
5
10
-50
15
0
50
100
150
T j , Junction Temperature ( o C)
V GS , Gate-to-Source Voltage (V)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
2.5
100
2.0
10
T j =25 o C
IS(A)
VGS(th) (V)
T j =150 o C
1.5
1
1.0
0.1
0.5
0
0.4
0.8
1.2
1.6
-50
0
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
2/16/2005 Rev.2.1
50
100
150
o
T j , Junction Temperature ( C )
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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SSM40T03GH,J
f=1.0MHz
12
1000
9
C iss
V DS =10V
V DS =15V
V DS =20V
C (pF)
VGS , Gate to Source Voltage (V)
I D =18A
6
C oss
C rss
100
3
10
0
0
3
6
9
1
12
8
15
22
29
V DS ,Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1
100
Normalized Thermal Response (Rthjc)
ID (A)
Duty factor = 0.5
100us
10
1ms
T C =25°C
Single Pulse
10ms
100ms
DC
1
0.2
0.1
0.1
0.05
PDM
0.02
t
0.01
T
Single Pulse
Duty Factor = t/T
Peak Tj = PDM x Rthjc + T C
0.01
0.1
1
10
100
0.00001
0.0001
Fig 9. Maximum Safe Operating Area
VDS
90%
0.001
0.01
0.1
1
t , Pulse Width (s)
V DS ,Drain-to-Source Voltage (V)
Fig 10. Effective Transient Thermal Impedance
VG
QG
4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
2/16/2005 Rev.2.1
Charge
Q
Fig 12. Gate Charge Waveform
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SSM40T03GH,J
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guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
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