AM26LS32AM-EP QUADRUPLE DIFFERENTIAL LINE RECEIVER www.ti.com SLLS730 – OCTOBER 2006 FEATURES • • • • • • • • • • • (1) Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree (1) Meets or Exceeds the Requirements of ANSI TIA/EIA-422-B, TIA/EIA-423-B, and ITU Recommendations V.10 and V.11 ±7-V Common-Mode Range With ±200-mV Sensitivity Input Hysteresis . . . 50 mV Typ Operates From a Single 5-V Supply Low-Power Schottky Circuitry 3-State Outputs • • • Complementary Output-Enable Inputs Input Impedance . . . 12 kΩ Min Designed to Be Interchangeable With Advanced Micro Devices AM26LS32 D PACKAGE (TOP VIEW) 1B 1A 1Y G 2Y 2A 2B GND 1 16 2 15 3 14 4 13 5 12 6 7 11 10 8 9 VCC 4B 4A 4Y G 3Y 3A 3B Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. DESCRIPTION/ORDERING INFORMATION The AM26LS32A is a quadruple differential line receiver for balanced and unbalanced digital data transmission. The enable function is common to all four receivers and offers a choice of active-high or active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design ensures that, if the inputs are open, the outputs always are high. The AM26LS32A incorporates an additional stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading of the bus line. The additional stage has increased propagation delay, however, this does not affect interchangeability in most applications. The AM26LS32AM is characterized for operation over the full military temperature range of –55°C to 125°C. ORDERING INFORMATION TA –55°C to 125°C (1) PACKAGE (1) SOIC – D Tape and reel ORDERABLE PART NUMBER TOP-SIDE MARKING AM26LS32AMDREP 26LS32EP Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006, Texas Instruments Incorporated AM26LS32AM-EP QUADRUPLE DIFFERENTIAL LINE RECEIVER www.ti.com SLLS730 – OCTOBER 2006 FUNCTION TABLE (1) (each receiver) DIFFERENTIAL A–B VID ≥ VIT+ VIT– ≤ VID ≤ VIT+ VID ≤ VIT– X Open (1) ENABLES G G OUTPUT Y H X H X L H H X ? X L ? H X L X L L L H Z H X H X L H H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) LOGIC DIAGRAM (POSITIVE LOGIC) G G 1A 1B 2A 2B 3A 3B 4A 4B 2 4 12 2 1 6 7 10 9 14 15 3 5 11 13 1Y 2Y 3Y 4Y Submit Documentation Feedback AM26LS32AM-EP QUADRUPLE DIFFERENTIAL LINE RECEIVER www.ti.com SLLS730 – OCTOBER 2006 SCHEMATICS OF INPUTS AND OUTPUTS EQUIVALENT OF EACH DIFFERENTIAL INPUT VCC EQUIVALENT OF EACH ENABLE INPUT TYPICAL OF ALL OUTPUTS VCC VCC 85 Ω NOM 8.3 kΩ NOM 100 kΩ A Input Only 960 Ω NOM 20 kΩ NOM Input 100 kΩ B Input Only Enable Output 960 Ω NOM Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN VCC Supply voltage (2) Any differential input VI Input voltage VID Differential input voltage (3) Other inputs Package thermal impedance (4) Tstg Storage temperature range (5) (1) (2) (3) (4) (5) UNIT 7 V ±25 V 7 ±25 Continuous total power dissipation θJA MAX V See Dissipation Rating Table D package 111.6 –65 150 °C/W °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential voltages, are with respect to the network ground terminal. Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals. The package thermal impedance is calculated in accordance with JESD 51-7. Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction of overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 125°C POWER RATING D 1075 mW 8.9 mW/°C 672 mW 179 mW Submit Documentation Feedback 3 AM26LS32AM-EP QUADRUPLE DIFFERENTIAL LINE RECEIVER www.ti.com SLLS730 – OCTOBER 2006 Recommended Operating Conditions MIN NOM MAX 4.5 5 5.5 UNIT VCC Supply voltage VIH High-level input voltage V VIL Low-level input voltage VIC Common-mode input voltage ±7 V IOH High-level output current –440 µA IOL Low-level output current 8 mA TA Operating free-air temperature 125 °C MAX UNIT 2 V 0.8 –55 V Electrical Characteristics over recommended ranges of VCC, VIC, and operating free-air temperature (unless otherwise noted) PARAMETER VIT+ Positive-going input threshhold voltage VO = VOH min, IOH = –440 µA VIT– Negative-going input threshhold voltage VO = 0.45 V, IOL = 8 mA Vhys Hysteresis voltage (VIT+ – VIT–) VIK Enable-input clamp voltage VCC = MIN, VOH High-level output voltage VCC = MIN, VID = 1 V, VI(G) = 0.8 V, IOH = –440 µA MIN TYP (1) 0.2 –0.2 (2) V V 50 II = –18 mA mV –1.5 2.5 V V IOL = 4 mA 0.4 IOL = 8 mA 0.45 VO = 2.4 V 20 VO = 0.4 V –20 VI = 15 V, Other input at –10 V to 15 V 1.2 VI = –15 V, Other input at –15 V to 10 V –1.7 VOL Low-level output voltage VCC = MIN, VID = –1 V, VI(G) = 0.8 V IOZ Off-state (high-impedance state) output current VCC = MAX II Line input current II(EN) Enable input current VI = 5.5 V 100 µA IIH High-level enable current VI = 2.7 V 20 µA IIL Low-level enable current VI = 0.4 V –0.36 mA rI Input resistance VIC = –15 V to 15 V, IOS Short-circuit output current (3) VCC = MAX –85 mA ICC Supply current VCC = MAX, 70 mA (1) (2) (3) 4 TEST CONDITIONS One input to ac ground 12 15 –15 All outputs disabled 52 µA mA kΩ All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0. The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold levels only. Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second. Submit Documentation Feedback V AM26LS32AM-EP QUADRUPLE DIFFERENTIAL LINE RECEIVER www.ti.com SLLS730 – OCTOBER 2006 Switching Characteristics VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output tPZH Output enable time to high level tPZL Output enable time to low level tPHZ Output disable time from high level tPLZ Output disable time from low level CL = 15 pF, See Figure 1 CL = 15 pF, See Figure 1 CL = 5 pF, See Figure 1 Submit Documentation Feedback MIN TYP MAX 20 35 22 35 17 22 20 25 21 30 30 40 UNIT ns ns ns 5 AM26LS32AM-EP QUADRUPLE DIFFERENTIAL LINE RECEIVER www.ti.com SLLS730 – OCTOBER 2006 PARAMETER MEASUREMENT INFORMATION VCC Test Point RL = 2 kΩ 2.5 V S1 From Output Under Test CL (see Note A) Input 0 0 −2.5 V 5 kΩ tPLH tPHL See Note B VOH Output S2 1.3 V 1.3 V VOL S1 and S2 Closed TEST CIRCUIT VOLTAGE WAVEFORMS FOR tPLH, tPHL ≤5 ns 90% Enable G 1.3 V ≤5 ns 90% 10% See Note C 90% 90% 10% S1 Open Output S2 Closed 3V 90% 90% 10% VOH ≈1.4 V S1 Closed S2 Closed VOLTAGE WAVEFORMS FOR tPHZ, tPZH 1.3 V Output S1 Closed S2 Open 10% S1 Closed S2 Closed tPLZ Figure 1. Test Circuit and Voltage Waveforms Submit Documentation Feedback 3V 0 ≈1.4 V VOL 0.5 V VOLTAGE WAVEFORMS FOR tPLZ, tPZL NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Enable G is tested with G high; G is tested with G low. 6 0 1.3 V 1.3 V tPZL 1.3 V tPHZ 1.3 V 10% 0 0.5 V 3V See Note C Enable G 10% tPZH 1.3 V 10% 0 1.3 V 1.3 V ≤5 ns 90% 90% Enable G 1.3 V 10% Enable G ≤5 ns 3V AM26LS32AM-EP QUADRUPLE DIFFERENTIAL LINE RECEIVER www.ti.com SLLS730 – OCTOBER 2006 TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT(1) 5 5 VCC = 5 V VID = 0.2 mV IOH = −440 µA VOH − High-Level Output Voltage − V VOH − High-Level Output Voltage − V VID = 0.2 V TA = 25°C 4 3 VCC = 5.25 V VCC = 5 V 2 VCC = 5.5 V VCC = 4.75 V 1 4 3 2 1 VCC = 4.5 V 0 0 −10 −20 −30 −40 0 −50 0 10 IOH − High-Level Output Current − mA (1) 70 80 Figure 3. VCC = 5.5 V and VCC = 4.5 V applies to M-suffix devices only. Figure 2. LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 0.5 0.6 VCC = 5 V TA = 25°C VID = −0.2 mV 0.5 VOL − Low-Level Output Voltage − V VOL − Low-Level Output Voltage − V 20 30 40 50 60 TA − Free-Air Temperature − °C 0.4 0.3 0.2 0.1 VCC = 5 V VID = −0.2 V IOL = 8 mA 0.4 0.3 0.2 0.1 0 0 0 5 10 15 20 25 IOL − Low-Level Output Current − mA 30 0 Figure 4. 10 20 30 40 50 60 TA − Free-Air Temperature − °C 70 80 Figure 5. Submit Documentation Feedback 7 AM26LS32AM-EP QUADRUPLE DIFFERENTIAL LINE RECEIVER www.ti.com SLLS730 – OCTOBER 2006 TYPICAL CHARACTERISTICS (continued) OUTPUT VOLTAGE vs ENABLE G VOLTAGE 5 5 VID = 0.2 V TA = 25°C Load = 8 kΩ to GND 4.5 VCC = 5.5 V 4 3.5 VO − Output Voltage − V VCC = 5 V VCC = 4.5 V 3 2.5 2 1.5 TA = 70°C TA = 25°C TA = 0°C 3.5 3 2.5 2 1.5 1 1 0.5 0.5 0 0 0 0.5 1 1.5 2 2.5 3 0 0.5 1.5 2 2.5 Enable G Voltage − V Figure 6. Figure 7. OUTPUT VOLTAGE vs ENABLE G VOLTAGE OUTPUT VOLTAGE vs ENABLE G VOLTAGE 3 6 VCC = 5.5 V VCC = 5 V 5 5 VO − Output Voltage − V VCC = 4.5 V 4 3 2 1 VID = −0.2 V Load = 1 kΩ to VCC TA = 25°C 0 0.5 1 TA = 0°C 4 TA = 25°C TA = 70°C 3 2 1 0 1.5 2 2.5 3 VCC = 5 V VID = −0.2 V Load = 1 kΩ to VCC 0 0 Enable G Voltage − V 0.5 1 1.5 2 Enable G Voltage − V Figure 8. 8 1 Enable G Voltage − V 6 VO − Output Voltage − V VCC = 5 V VID = 0.2 V Load = 8 kΩ to GND 4.5 4 VO − Output Voltage − V OUTPUT VOLTAGE vs ENABLE G VOLTAGE Figure 9. Submit Documentation Feedback 2.5 3 AM26LS32AM-EP QUADRUPLE DIFFERENTIAL LINE RECEIVER www.ti.com SLLS730 – OCTOBER 2006 TYPICAL CHARACTERISTICS (continued) OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE 5 VCC = 5 V IO = 0 TA = 25°C 4.5 VO − Output Voltage − V 4 VIC = −7 V 3.5 VIC = 0 VIC = 7V VIT− VIT− 3 2.5 VIT− 2 VIT+ VIT+ VIT+ 1.5 1 0.5 0 −200 −150 −100 −50 0 50 100 150 200 VID − Differential Input Voltage − mV Figure 10. INPUT CURRENT vs INPUT VOLTAGE 4 3 I I − Input Current − mA 2 1 0 VCC = 0 −1 −2 VCC = 5 V The Unshaded Area Shows Requirements of Paragraph 4.2.1 of ANSI Standards EIA/TIA-422-B and EIA/TIA-423-B. −3 −4 −25 −20 −15 −10 −5 0 5 10 15 20 25 VI − Input Voltage − V Figure 11. Submit Documentation Feedback 9 PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty AM26LS32AMDREP ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/07603-01XE ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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