CSD13381F4 www.ti.com SLPS448A – JULY 2013 – REVISED NOVEMBER 2013 12 V, N-Channel FemtoFET™ MOSFET Check for Samples: CSD13381F4 PRODUCT SUMMARY FEATURES 1 • • • • 2 • • • • Low On Resistance Low Qg and Qgd Low Threshold Voltage Ultra-Small Footprint (0402 Case Size) – 1.0 mm x 0.6 mm Ultra-Low Profile – 0.35 mm Height Integrated ESD Protection Diode – Rated > 4 kV HBM – Rated > 2 kV CDM Pb and Halogen Free RoHS Compliant VDS Drain-to-Source Voltage 12 V Qg Gate Charge Total (4.5V) 1060 pC Qgd Gate Charge Gate to Drain RDS(on) VGS(th) • • Drain-to-Source On Resistance pC 310 VGS = 2.5 V 170 VGS = 4.5 V 140 Threshold Voltage mΩ 0.85 V Text Added For Spacing ORDERING INFORMATION Device Qty Media CSD13381F4 3000 7-Inch Reel CSD13381F4T 250 7-Inch Reel APPLICATIONS • • 140 VGS = 1.8V Optimized for Load Switch Applications Optimized for General Purpose Switching Applications Single-Cell Battery Applications Handheld and Mobile Applications DESCRIPTION The FemtoFET™ MOSFET technology has been designed and optimized to minimize the footprint in many handheld and mobile applications. This technology is capable of replacing standard small signal MOSFETs while providing at least a 60% reduction in footprint size. . Package Ship Femto(0402) 1.0 mm x 0.6 mm SMD Lead Less Tape and Reel Text Added For Spacing ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise stated VALUE UNIT VDS Drain-to-Source Voltage 12 V VGS Gate-to-Source Voltage 8 V ID Continuous Drain Current, TA = 25°C(1) 2.1 A IDM Pulsed Drain Current, TA = 25°C(2) PD Power Dissipation(1) 7 A 500 mW 4 kV 2 kV –55 to 150 °C 2.7 mJ Human Body Model (HBM) ESD Rating Charged Device Model (CDM) TJ, TSTG Operating Junction and Storage Temperature Range EAS Avalanche Energy, single pulse ID = 7.4 A, L = 0.1 mH, RG = 25 Ω (1) Typical RθJA = 90°C/W on 1-inch2 (6.45-cm2), 2-oz. (0.071mm thick) Cu pad on a 0.06-inch (1.52-mm) thick FR4 PCB. (2) Pulse duration ≤300 μs, duty cycle ≤2% Typical Part Dimensions Top View m D 60 1. 0. 00 m m 5m 0.3 m m G S . . 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. FemtoFET is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated CSD13381F4 SLPS448A – JULY 2013 – REVISED NOVEMBER 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain-to-Source Voltage VGS = 0 V, IDS = 250 μA IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 9.6 V IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 4 V VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, IDS = 250 μA RDS(on) gfs Drain-to-Source On Resistance Transconductance 12 0.65 V 1 μA 100 nA 0.85 1.10 V VGS = 1.8 V, IDS =0.5 A 310 400 mΩ VGS = 2.5 V, IDS =0.5 A 170 225 mΩ VGS = 4.5 V, IDS = 0.5 A 140 180 mΩ VDS = 6 V, IDS = 0.5 A 3.2 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance RG Series Gate Resistance Qg Gate Charge Total (4.5 V) Qgd Gate Charge Gate to Drain Qgs Gate Charge Gate to Source Qg(th) Gate Charge at Vth Qoss Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tf Fall Time 155 200 pF 47 62 pF 2.5 3.3 pF 1400 pC VGS = 0 V, VDS = 6 V, f = 1 MHz Ω 23 1060 VDS = 6 V, IDS = 0.5 A VDS = 6 V, VGS = 0 V VDS = 0 V, VGS = 4.5 V, IDS = 0.5 A,RG = 2 Ω 140 pC 230 pC 155 pC 1120 pC 3.7 ns 1.5 ns 11.0 ns 3.8 ns Diode Characteristics VSD Diode Forward Voltage Qrr Reverse Recovery Charge trr Reverse Recovery Time ISD = 0.5 A, VGS = 0V VDS= 6 V, IF = 0.5 A, di/dt = 300 A/μs 0.73 0.9 V 1550 pC 6 ns THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER RθJA (1) (2) 2 Typical Values Thermal Resistance Junction to Ambient (1) Thermal Resistance Junction to Ambient 2 (2) UNIT 90 °C/W 250 °C/W 2 Device mounted on FR4 material with 1-inch (6.45-cm ), 2-oz. (0.071-mm thick) Cu. Device mounted on FR4 material with minimum Cu mounting area. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD13381F4 CSD13381F4 www.ti.com SLPS448A – JULY 2013 – REVISED NOVEMBER 2013 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 3 VGS =4.5V VGS =2.5V 6 VGS =1.8V IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) 7 5 4 3 2 1 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 VDS - Drain-to-Source Voltage (V) 0.9 1 VDS = 5V 2.5 2 1.5 1 TC = 125°C TC = 25°C TC = −55°C 0.5 0 0 G001 Figure 2. Saturation Characteristics 0.4 0.8 1.2 1.6 VGS - Gate-to-Source Voltage (V) 2 Product Folder Links: CSD13381F4 G001 Figure 3. Transfer Characteristics Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated 2.4 3 CSD13381F4 SLPS448A – JULY 2013 – REVISED NOVEMBER 2013 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 1000 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd ID = 0.5A VDS = 6V 7 C − Capacitance (pF) VGS - Gate-to-Source Voltage (V) 8 6 5 4 3 2 100 10 1 0 0 0.2 0.4 0.6 0.8 1 1.2 Qg - Gate Charge (nC) 1.4 1.6 1 1.8 0 2 G001 Figure 4. Gate Charge TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING RDS(on) - On-State Resistance (mΩ) VGS(th) - Threshold Voltage (V) G001 300 ID = 250uA 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 −75 −25 25 75 125 TC - Case Temperature (ºC) TC = 25°C Id = 0.5A TC = 125ºC Id = 0.5A 280 260 240 220 200 180 160 140 120 100 175 0 1 G001 Figure 6. Threshold Voltage vs. Temperature TEXT ADDED FOR SPACING 8 G001 TEXT ADDED FOR SPACING ID =0.5A 1.3 1.2 1.1 1 0.9 0.8 0.7 −75 7 10 VGS = 1.8V VGS = 4.5V ISD − Source-to-Drain Current (A) 1.4 2 3 4 5 6 VGS - Gate-to- Source Voltage (V) Figure 7. On-State Resistance vs. Gate-to-Source Voltage 1.5 Normalized On-State Resistance 12 Figure 5. Capacitance 1.2 −25 25 75 125 TC - Case Temperature (ºC) 175 TC = 25°C TC = 125°C 1 0.1 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 VSD − Source-to-Drain Voltage (V) G001 Figure 8. Normalized On-State Resistance vs. Temperature 4 4 6 8 10 VDS - Drain-to-Source Voltage (V) 1 G001 Figure 9. Typical Diode Forward Voltage Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD13381F4 CSD13381F4 www.ti.com SLPS448A – JULY 2013 – REVISED NOVEMBER 2013 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 100 1ms 10ms 100ms 1s DC 10 1 0.1 Single Pulse Typical RthetaJA =250ºC/W(min Cu) 0.01 0.01 TC = 25ºC TC = 125ºC IAV - Peak Avalanche Current (A) IDS - Drain-to-Source Current (A) 100 0.1 1 10 VDS - Drain-to-Source Voltage (V) 10 1 0.1 0.001 50 0.01 0.1 TAV - Time in Avalanche (mS) G001 Figure 10. Maximum Safe Operating Area 1 G001 Figure 11. Single Pulse Unclamped Inductive Switching TEXT ADDED FOR SPACING IDS - Drain- to- Source Current (A) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 Typical RthetaJA =90ºC/W(max Cu) 0.0 −50 −25 0 25 50 75 100 125 TA - AmbientTemperature (ºC) 150 175 G001 Figure 12. Maximum Drain Current vs. Temperature Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD13381F4 5 CSD13381F4 SLPS448A – JULY 2013 – REVISED NOVEMBER 2013 www.ti.com MECHANICAL DATA 0402 Mechanical Dimensions (1) All linear dimensions are in millimeters (dimensions and tolerancing per AME T14.5M-1994). (2) This drawing is subject to change without notice. (3) This package is a PB-free solder land design. Recommended Minimum PCB Layout (1) 6 All dimensions are in millimeters. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD13381F4 CSD13381F4 www.ti.com SLPS448A – JULY 2013 – REVISED NOVEMBER 2013 Recommended Stencil Pattern (1) All dimensions are in millimeters. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD13381F4 7 CSD13381F4 SLPS448A – JULY 2013 – REVISED NOVEMBER 2013 www.ti.com CSD13381F4 Embossed Carrier Tape Dimensions (1) Pin 1 is oriented in the top-right quadrant of the tape enclosure (quadrant 2), closest to the carrier tape sprocket holes. REVISION HISTORY Changes from Original (July 2013) to Revision A Page • Updated title .......................................................................................................................................................................... 1 • Updated device ordering information .................................................................................................................................... 1 • Changed test voltage conditions ........................................................................................................................................... 2 • Changed Figure 4 Gate Charge graph ................................................................................................................................. 4 8 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD13381F4 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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