SCBS066A − JUNE 1990 − REVISED NOVEMBER 1993 • • • • • • DW OR N PACKAGE (TOP VIEW) State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) High-Impedance State During Power Up and Power Down 3-State True Outputs Drive Bus Lines or Buffer-Memory Address Registers Full Parallel Access for Loading Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (N) OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK description This 8-bit flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops of the SN64BCT374 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. The output-enable (OE) does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The outputs are in a high-impedance state during power up and power down when the supply voltage is less than approximately 3 V. The SN64BCT374 is characterized for operation from −ā 40°C to 85°C and 0°C to 70°C. FUNCTION TABLE (each flip-flop) INPUTS OE CLK D OUTPUT Q L ↑ H H L ↑ L L L L X Q0 H X X Z Copyright 1993, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ • DALLAS, TEXAS 75265 • HOUSTON, TEXAS 77251−1443 POST OFFICE BOX 655303 POST OFFICE BOX 1443 1 SCBS066A − JUNE 1990 − REVISED NOVEMBER 1993 logic symbol† OE CLK 1 11 logic diagram (positive logic) OE EN C1 CLK 1 11 C1 1D 2D 3D 4D 5D 6D 7D 8D 3 1D 2 4 5 7 6 8 9 13 12 14 15 17 16 18 19 1D 1Q 3 2 1D 1Q 2Q 3Q 4Q 5Q To Seven Other Channels 6Q 7Q 8Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . . −0.5 V to 5.5 V Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. recommended operating conditions (see Note 2) MIN NOM MAX 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IIK Low-level input voltage 0.8 V Input clamp current −18 mA IOH IOL High-level output current −15 mA ∆t /∆VCC Power-up ramp rate High-level input voltage 2 Low-level output current 2 V 64 −40 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • mA µs / V 2 TA Operating free-air temperature NOTE 2: Unused or floating inputs must be held high or low. V 85 °C SCBS066A − JUNE 1990 − REVISED NOVEMBER 1993 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VCC = 4.5 V, VOH VCC = 4.5 V VOL II VCC = 4.5 V, VCC = 5.5 V, IIH IIL VCC = 5.5 V, VCC = 5.5 V, IOS‡ VCC = 5.5 V, VCC = 0 to 2.3 V (power up) IOZ IOZH IOZL ICCL ICCH ICCZ Ci Co MIN II = −18 mA IOH = − 3 mA TYP† 2.4 3.3 2 3.1 IOH = − 15 mA IOL = 64 mA 0.42 VI = 5.5 V VI = 2.7 V VI = 0.5 V VO = 0 −100 VO = 2.7 V or 0.5 V, VCC = 1.8 V to 0 (power down) VCC = 5.5 V, UNIT −1.2 V V 0.55 V 0.4 mA 20 µA −0.6 mA −225 mA ± 50 OE = 0.8 V ± 50 VO = 2.7 V VO = 0.5 V VCC = 5.5 V, VCC = 5.5 V, MAX µA A 50 µA −50 µA Outputs open 37 60 mA VCC = 5.5 V, VCC = 5.5 V, Outputs open 2 5 mA Outputs open 5 8 mA VCC = 5 V, VCC = 5 V, VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V 6 pF 10 pF † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. timing requirements over recommended range of supply voltage (unless otherwise noted) VCC = 5 V, TA = 25°C MIN fclock tw Clock frequency tsu th Setup time, data before CLK↑ MAX VCC = 4.5 V to 5.5 V TA = − 40°C TA = 0°C to 85°C to 70°C MIN 70 Pulse duration, CLK high Hold time, data after CLK↑ MAX MIN UNIT MAX 70 70 MHz 7 7 7 ns 6.5 6.5 6.5 ns 0 0 0 ns switching characteristics over recommended range of supply voltage, CL = 50 pF (unless otherwise noted) (see Note 3) PARAMETER fmax tPLH tPHL tPZH tPZL tPHZ FROM (INPUT) TA = − 40°C to 85°C VCC = 5 V, TA = 25°C TO (OUTPUT) MIN CLK Q OE Q OE Q MAX MAX 2 7.2 9.1 2 11.6 2 10.6 2 7.1 8.8 2 10.6 2 10 1 8.3 10.1 1 12.7 1 12.3 1 8.6 10.6 1 13 1 12.7 1 4.7 6.3 1 7.1 1 6.8 70 MIN UNIT TYP 70 MIN TA = 0°C to 70°C MAX 70 MHz ns ns ns NOTE 3: Load circuits and voltage waveforms are shown in Section 1. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 3 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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