SCAS131 − APRIL 1990 − REVISED APRIL 1993
•
•
•
•
•
•
•
•
•
Inputs Are TTL-Voltage Compatible
Specifically Designed for Data
Synchronization Applications
Improved Metastable Characteristics
Provide Greater System Reliability
3-State Outputs Drive Bus Lines Directly
Flow-Through Architecture to Optimize
PCB Layout
Center-Pin VCC and GND Configurations to
Minimize High-Speed Switching Noise
EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
500-mA Typical Latch-Up Immunity
at 125°C
Package Options Include Plastic Small
Outline Packages and Standard Plastic
300-mil DIPs
DW OR NT PACKAGE
(TOP VIEW)
1Q
2Q
3Q
4Q
GND
GND
GND
GND
5Q
6Q
7Q
8Q
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
OE
1D
2D
3D
4D
VCC
VCC
5D
6D
7D
8D
CLK
description
The 74ACT11478 is an 8-bit dual-rank synchronizer circuit designed specifically for data synchronization
applications where the normal setup and hold time specifications are frequently violated.
Synchronization of two digital signals operating at different frequencies is a common system problem. This
problem is typically solved by synchronizing one of the signals to the local clock through a flip-flop. This solution,
however, causes the setup and hold time specifications associated with the flip-flop to be violated. When the
setup or hold time specification is violated, the output response is uncertain.
A flip-flop is metastable if its output hangs up in the region between VIL and VIH. The metastable condition lasts
until the flip-flop recovers into one of its two stable states. With conventional flip-flops, this recovery time can
be longer than the specified maximum propagation delay.
The problem of metastability is typically solved by adding an additional layer of synchronization. This type of
dual ranking is employed in the 74ACT11478. The probability of the second stage entering the metastable state
is exponentially reduced by this dual-rank architecture. The 74ACT11478 provides a one-chip solution for
system designers in asynchronous applications.
The 74ACT11478 is characterized for operation from − 40°C to 85°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
OE
CLOCK†
D
Q
H
X
X
Z
L
↑
L
L
L
↑
H
H
L
H
X
QO
† Data presented at the D input requires two
clock cycles to appear at the Q output.
Copyright 1993, Texas Instruments Incorporated
!"#$%! & '("")% $& ! *(+,'$%! -$%).
"!-('%& '!!"# %! &*)''$%!& *)" %/) %)"#& ! )0$& &%"(#)%&
&%$-$"- 1$""$%2. "!-('%! *"!')&&3 -!)& !% )')&&$",2 ',(-)
%)&%3 ! $,, *$"$#)%)"&.
• DALLAS, TEXAS 75265
• HOUSTON, TEXAS 77251−1443
POST OFFICE BOX 655303
POST OFFICE BOX 1443
1
SCAS131 − APRIL 1990 − REVISED APRIL 1993
logic symbol†
OE
CLK
24
logic diagram (positive logic)
OE
EN
13
C1
CLK
1D
2D
3D
4D
5D
6D
7D
8D
23
1D
1D
1
22
2
21
3
20
4
17
9
16
10
15
11
14
12
1Q
24
13
23
1D
1D
2Q
C1
3Q
1
1D
1Q
C1
4Q
5Q
6Q
To Seven Other Flip-Flops
7Q
8Q
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
2
MIN
MAX
4.5
5.5
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
Input voltage
0
VO
IOH
Output voltage
0
High-level input voltage
2
UNIT
V
V
0.8
V
VCC
VCC
V
High-level output current
− 24
mA
IOL
Dt/Dv
Low-level output current
24
mA
0
10
ns /V
TA
Operating free-air temperature
− 40
85
°C
Input transition rise or fall rate
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
V
SCAS131 − APRIL 1990 − REVISED APRIL 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
4.5 V
4.4
4.4
5.5 V
5.4
5.4
4.5 V
3.94
3.8
IOH = − 24 mA
5.5 V
4.94
4.8
IOH = − 75 mA{
5.5 V
IOH = − 50 mA
A
VOH
TA = 25°C
TYP
MAX
VCC
IOL = 50 mA
A
MIN
MAX
UNIT
V
3.85
4.5 V
0.1
0.1
5.5 V
0.1
0.1
4.5 V
0.36
0.44
IOL = 24 mA
5.5 V
0.36
0.44
IOL = 75 mA{
5.5 V
IOZ
II
VO = VCC or GND
VI = VCC or GND
5.5 V
± 0.5
±5
mA
5.5 V
± 0.1
±1
mA
ICC
VI = VCC or GND,
5.5 V
8
80
mA
DICC‡
One input at 3.4 V,
Other inputs at GND or VCC
5.5 V
0.9
1
mA
Ci
VI = VCC or GND
VO = VCC or GND
VOL
Co
IO = 0
V
1.65
5V
4.5
pF
5V
12
pF
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
TA = 25°C
MIN
MAX
fclock
Clock frequency
0
75
MIN
MAX
UNIT
0
75
MHz
CLK high
4
4
CLK low
5
5
tw
Pulse duration
ns
tsu
th
Setup time, data before CLK↑
2.7
2.7
ns
Hold time, data after CLK↑
1.5
1.5
ns
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
PARAMETER
fmax
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
FROM
(INPUT)
TO
(OUTPUT)
TA = 25°C
MIN
TYP
MAX
7.5
CLK
Q
OE
Q
OE
Q
•
MAX
75
UNIT
MHz
4.3
7.4
10.1
4.3
11.6
5.6
9.4
12.6
5.6
14.2
3.7
7.5
11.1
3.7
12.6
4.7
9.2
13.7
4.7
15.8
4.4
7.2
9.2
4.4
9.8
4.7
6.6
8.7
4.7
9.3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
MIN
ns
ns
ns
3
SCAS131 − APRIL 1990 − REVISED APRIL 1993
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TYP
Outputs enabled
Cpd
Power dissipation capacitance per flip-flop
Outputs disabled
UNIT
76
CL = 50 pF,
f = 1 MHz
pF
64
PARAMETER MEASUREMENT INFORMATION
2 X VCC
S1
500 Ω
From Output
Under Test
Open
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
GND
500 Ω
CL = 50 pF
(see Note A)
S1
Open
2 x VCC
GND
LOAD CIRCUIT
3V
Timing Input
(see Note B)
3V
High-Level
Input
1.5 V
1.5 V
1.5 V
0V
tsu
Data
Input
0
th
tw
3V
3V
1.5 V
1.5 V
Low-Level
Input
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V
1.5 V
3V
1.5 V
VOH
tPLZ
VOL
tPLH
tPHL
50%
Output
Waveform 2
S1 at GND
(see Note C)
50%
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
20%
VOL
tPZH
VOH
50%
≈ VCC
Output
Waveform 1
S1 at 2 x VCC
(see Note C)
50%
50%
1.5 V
0
tPZL
tPHL
tPLH
Out-of-Phase
Output
0
Output
Control
(Low-Level
Enabling)
0
In-Phase
Output
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
3V
Input
(see Note B)
1.5 V
tPHZ
50%
80%
VOH
≈0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DLP® Products
DSP
Clocks and Timers
Interface
Logic
Power Mgmt
Microcontrollers
RFID
RF/IF and ZigBee® Solutions
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2009, Texas Instruments Incorporated