User's Guide SLVU413 – November 2010 TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module This user's guide contains information for the TPS54327 as well as support documentation for the TPS54327EVM-686 evaluation module. Included are the performance specifications, schematic, and the bill of materials of the TPS54327EVM-686. 1 2 3 4 5 6 Contents Introduction .................................................................................................................. 2 Performance Specification Summary ..................................................................................... 2 Modifications ................................................................................................................. 3 3.1 Output Voltage Setpoint ........................................................................................... 3 3.2 Output Filter and Closed Loop Response ...................................................................... 3 Test Setup and Results .................................................................................................... 3 4.1 Input/Output Connections ......................................................................................... 4 4.2 Start-Up Procedure ................................................................................................ 4 4.3 Efficiency ............................................................................................................ 5 4.4 Load Regulation .................................................................................................... 6 4.5 Line Regulation ..................................................................................................... 7 4.6 Load Transient Response ........................................................................................ 7 4.7 Output Voltage Ripple ............................................................................................. 8 4.8 Input Voltage Ripple ............................................................................................... 8 4.9 Start-Up ............................................................................................................. 9 Board Layout ............................................................................................................... 10 5.1 Layout .............................................................................................................. 10 Schematic, Bill of Materials, and Reference ........................................................................... 13 6.1 Schematic ......................................................................................................... 13 6.2 Bill of Materials .................................................................................................... 13 6.3 Reference .......................................................................................................... 14 List of Figures 1 TPS54327EVM-686 Efficiency ............................................................................................ 5 2 TPS54327EVM-686 Light Load Efficiency ............................................................................... 5 3 TPS54327EVM-686 Load Regulation, VIN = 5 V. ....................................................................... 6 4 TPS54327EVM-686 Load Regulation, VIN = 12 V....................................................................... 6 5 TPS54327EVM-686 Line Regulation ..................................................................................... 7 6 TPS54327EVM-686 Load Transient Response ......................................................................... 7 7 TPS54327EVM-686 Output Voltage Ripple ............................................................................. 8 8 TPS54327EVM-686 Input Voltage Ripple ............................................................................... 8 9 TPS54327EVM-686 Start-Up Relative to VIN ............................................................................ 9 10 TPS54327EVM-686 Start-Up Relative to EN 11 Top Assembly .............................................................................................................. 10 12 Top Layer ................................................................................................................... 11 13 Bottom Layer ............................................................................................................... 11 14 Bottom Assembly .......................................................................................................... 12 ........................................................................... 9 SWIFT, D-CAP2 are trademarks of Texas Instruments. SLVU413 – November 2010 Submit Documentation Feedback TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated 1 Introduction 15 www.ti.com TPS54327EVM-686 Schematic Diagram............................................................................... 13 List of Tables 1 1 Input Voltage and Output Current Summary ............................................................................ 2 2 TPS54327EVM-686 Performance Specifications Summary 3 Output Voltages ............................................................................................................. 3 4 Connection and Test Points ............................................................................................... 4 5 Bill of Materials............................................................................................................. 13 .......................................................... 2 Introduction The TPS54327 is a single, adaptive on-time, D-CAP2™-mode, synchronous buck converter requiring a very low external component count. The D-CAP2™ control circuit is optimized for low-ESR output capacitors such as POSCAP, SP-CAP, or ceramic types and features fast transient response with no external compensation. The switching frequency is internally set at a nominal 700 kHz. The high-side and low-side switching MOSFETs are incorporated inside the TPS54327 package along with the gate drive circuitry. The low drain-to-source on resistance of the MOSFETs allows the TPS54327 to achieve high efficiencies and helps keep the junction temperature low at high output currents. The TPS54327 dc/dc synchronous converter is designed to provide up to a 3-A output from an input voltage source of 4.5 V to 18 V. The output voltage range is from 0.76 V to 7 V. Rated input voltage and output current range for the evaluation module are given in Table 1. The TPS54327EVM-686 evaluation module is a single, synchronous buck converter providing 1.05 V at 3 A from 5-V to 18-V input. This user’s guide describes the TPS54327EVM-686 performance. Table 1. Input Voltage and Output Current Summary 2 EVM Input Voltage Range Output Current Range TPS54327EVM-686 VIN = 4.5 V to 18 V 0 A to 3 A Performance Specification Summary A summary of the TPS54327EVM-686 performance specifications is provided in Table 2. Specifications are given for an input voltage of VIN = 12 V and an output voltage of 1.05 V, unless otherwise noted. The ambient temperature is 25°C for all measurement, unless otherwise noted. Table 2. TPS54327EVM-686 Performance Specifications Summary Specifications Test Conditions Input voltage range (VIN) Min 4.5 Output voltage Operating frequency VIN = 12 V, IO = 1 A Output current range 2 Typ Max 12 18 Unit V 1.05 V 675 kHz 0 3 A Line regulation IO = 1.5 A +/- 0.2 % Load regulation VIN = 12 V +/0.03 % Over current limit VIN = 12 V, LO = 1.5 µH Output ripple voltage VIN = 12 V, IO = 3 A 15 Maximum efficiency VIN = 5 V, IO= 0.5 A 86.9 TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated 3.5 4.2 5.7 A mVPP % SLVU413 – November 2010 Submit Documentation Feedback Modifications www.ti.com 3 Modifications These evaluation modules are designed to provide access to the features of the TPS54327. Some modifications can be made to this module. 3.1 Output Voltage Setpoint To change the output voltage of the EVMs, it is necessary to change the value of resistor R1. Changing the value of R1 can change the output voltage above 0.765 V. The value of R1 for a specific output voltage can be calculated using Equation 1. For output voltage from 0.76 V to 7.0 V: æ R1 ö VO = 0.765 ´ ç 1+ ÷ è R2 ø (1) Table 3 lists the R1 values for some common output voltages. For higher output voltages of 1.8 V or above, a feedforward capacitor (C4) may be required to improve phase margin. Pads for this component (C4) are provided on the printed-circuit board. Note that the values given in Table 3 are standard values and not the exact value calculated using Table 3. Table 3. Output Voltages 3.2 Output Voltage (V) R1 (kΩ) R2 (kΩ) C4 (pF) L1 (µH) C9, C10, C11 total capacitance (µF) 1.0 6.81 22.1 1.5 22 - 68 1.05 8.25 22.1 1.5 22 - 68 1.2 12.7 22.1 1.5 22 - 68 1.8 30.1 22.1 5 - 22 2.2 22 - 68 2.5 49.9 22.1 5 - 22 2.2 22 - 68 3.3 73.2 22.1 5 - 22 2.2 22 - 68 5.0 124 22.1 5 - 22 3.3 22 - 68 6.5 165 22.1 5 - 22 3.3 22 - 68 Output Filter and Closed Loop Response The TPS54327 relies on the output filter characteristics to ensure stability of the control loop. The recommended output filter components for common output voltages are given in Table 3. It may be possible for other output filter component values to provide acceptable closed loop characteristics. R3 and TP4 are provided for convenience in breaking the control loop and measuring the closed loop response. 4 Test Setup and Results This section describes how to properly connect, set up, and use the TPS54327EVM-686. The section also includes test results typical for the evaluation modules and efficiency, output load regulation, output line regulation, load transient response, output voltage ripple, input voltage ripple, start-up, and switching frequency. SLVU413 – November 2010 Submit Documentation Feedback TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated 3 Test Setup and Results 4.1 www.ti.com Input/Output Connections The TPS54327EVM-686 is provided with input/output connectors and test points as shown in Table 4. A power supply capable of supplying 2 A must be connected to J1 through a pair of 20 AWG wires. The load must be connected to J2 through a pair of 20 AWG wires. The maximum load current capability is 3 A. Wire lengths must be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient ground reference. TP8 is used to monitor the output voltage with TP9 as the ground reference. Table 4. Connection and Test Points 4.2 Reference Designator Function J1 VIN (see Table 1 for VIN range) J2 VOUT, 1.05 V at 3 A maximum. JP1 EN control. Connect EN to OFF to disable, connect EN to ON to enable. TP1 VIN test point at VIN connector. TP2 GND test point at VIN. TP3 EN test point. TP4 Loop response measurement test point. TP5 VREG5 test point. TP6 Switch node test point. TP7 Analog ground test point. TP8 Output voltage test point. TP9 Ground test point at output connector. Start-Up Procedure 1. Ensure that the jumper at JP1 (Enable control) is set from EN to OFF. 2. Apply appropriate VIN voltage to VIN and PGND terminals at J1. 3. Move the jumper at JP1 (Enable control) to cover EN and ON. The EVM enables the output voltage. 4 TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated SLVU413 – November 2010 Submit Documentation Feedback Test Setup and Results www.ti.com 4.3 Efficiency Figure 1 shows the efficiency for the TPS54327EVM-686 at an ambient temperature of 25°C. 100.0 90.0 80.0 Efficiency (%) 70.0 VIN = 12 V VIN = 5 V 60.0 50.0 40.0 30.0 20.0 10.0 0.0 0.0 0.5 1.0 1.5 Output Current (A) 2.0 2.5 3.0 Figure 1. TPS54327EVM-686 Efficiency Figure 2 shows the efficiency at light loads for the TPS54327EVM-686 at an ambient temperature of 25°C. 100.0 90.0 80.0 70.0 Efficiency (%) VIN = 12 V 60.0 50.0 VIN = 5 V 40.0 30.0 20.0 10.0 0.0 0.001 0.01 0.1 Output Current (A) 1 10 Figure 2. TPS54327EVM-686 Light Load Efficiency SLVU413 – November 2010 Submit Documentation Feedback TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated 5 Test Setup and Results 4.4 www.ti.com Load Regulation The load regulation for the TPS54327EVM-686 is shown in Figure 3 and Figure 4 . 0.5 VIN = 5 V 0.4 Output Voltage Deviation (%) 0.3 0.2 0.1 0.0 −0.1 −0.2 −0.3 −0.4 −0.5 0.0 0.5 1.0 1.5 Output Current (A) 2.0 2.5 3.0 2.5 3.0 Figure 3. TPS54327EVM-686 Load Regulation, VIN = 5 V. 0.5 VIN = 12 V 0.4 Output Voltage Deviation (%) 0.3 0.2 0.1 0.0 −0.1 −0.2 −0.3 −0.4 −0.5 0.0 0.5 1.0 1.5 Output Current (A) 2.0 Figure 4. TPS54327EVM-686 Load Regulation, VIN = 12 V. 6 TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated SLVU413 – November 2010 Submit Documentation Feedback Test Setup and Results www.ti.com 4.5 Line Regulation The line regulation for the TPS54327EVM-686 is shown in Figure 5. 0.5 IOUT = 1.5 A 0.4 Output Voltage Deviation (%) 0.3 0.2 0.1 0.0 −0.1 −0.2 −0.3 −0.4 −0.5 4.5 6.0 7.5 9.0 10.5 12.0 Input Voltage (V) 13.5 15.0 16.5 18.0 Figure 5. TPS54327EVM-686 Line Regulation 4.6 Load Transient Response The TPS54327EVM-686 response to load transient is shown in Figure 6. The current step is from 0.75 A to 2.25 A. Total peak-to-peak voltage variation is as shown. VOUT = 20 mV / div (dc offset -1.006 V) IOUT = 1 A / div (0.75 A to 2.25 A load step) Time = 10 µsec / div Figure 6. TPS54327EVM-686 Load Transient Response SLVU413 – November 2010 Submit Documentation Feedback TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated 7 Test Setup and Results 4.7 www.ti.com Output Voltage Ripple The TPS54327EVM-686 output voltage ripple is shown in Figure 7. The output current is the rated full load of 3 A. VOUT = 20 mV / div (ac coupled) PH = 5 V / div Time = 1 µsec / div Figure 7. TPS54327EVM-686 Output Voltage Ripple 4.8 Input Voltage Ripple The TPS54327EVM-686 input voltage ripple is shown in Figure 8. The output current is the rated full load of 3 A. VIN = 50 mV / div (ac coupled) PH = 5 V / div Time = 1 µsec / div Figure 8. TPS54327EVM-686 Input Voltage Ripple 8 TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated SLVU413 – November 2010 Submit Documentation Feedback Test Setup and Results www.ti.com 4.9 Start-Up The TPS54327EVM-686 start-up waveform relative to VIN is shown in Figure 9. VIN = 10 V / div SS = 5 V / div VOUT = 500 mV / div Time = 2 msec / div Figure 9. TPS54327EVM-686 Start-Up Relative to VIN The TPS54327EVM-686 start-up waveform relative to enable (EN) is shown in Figure 10. EN = 10 V / div SS = 5 V / div VOUT = 500 mV / div Time = 2 msec / div Figure 10. TPS54327EVM-686 Start-Up Relative to EN SLVU413 – November 2010 Submit Documentation Feedback TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated 9 Board Layout 5 www.ti.com Board Layout This section provides description of the TPS54327EVM-686, board layout, and layer illustrations. 5.1 Layout The board layout for the TPS54327EVM-686 is shown in Figure 11 through Figure 14. The top layer contains the main power traces for VIN, VO, and ground. Also on the top layer are connections for the pins of the TPS54327 and a large area filled with ground. Many of the signal traces also are located on the top side. The input decoupling capacitors are located as close to the IC as possible. The input and output connectors, test points, and all of the components are located on the top side. An analog ground (GND) area is provided on the top side. Analog ground (GND) and power ground (PGND) are connected at a single point on the top layer near C6. The bottom layer is primarily power ground but also has a trace to connect VIN to the enable jumper, a trace to connect VREG5 to TP5, and the feedback trace from VOUT to the voltage setpoint divider network. Figure 11. Top Assembly 10 TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated SLVU413 – November 2010 Submit Documentation Feedback Board Layout www.ti.com Figure 12. Top Layer Figure 13. Bottom Layer SLVU413 – November 2010 Submit Documentation Feedback TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated 11 Board Layout www.ti.com Figure 14. Bottom Assembly 12 TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated SLVU413 – November 2010 Submit Documentation Feedback Schematic, Bill of Materials, and Reference www.ti.com 6 Schematic, Bill of Materials, and Reference 6.1 Schematic Figure 15 is the schematic for the TPS54327EVM-538. Figure 15. TPS54327EVM-686 Schematic Diagram 6.2 Bill of Materials Table 5. Bill of Materials RefDes QTY Value Description Size Part Number MFR C1, C2 2 10uF Capacitor, Ceramic, 25V, X5R, 20% 1210 Std Std C11 0 Open Capacitor, Ceramic 1206 Std Std C3, C7 2 0.1uF Capacitor, Ceramic, 50V, X7R, 10% 0603 Std Std C4, C8 1 Open Capacitor, Ceramic 0603 Std Std C5 1 1.0uF Capacitor, Ceramic, 16V, X7R, 10% 0603 Std Std C6 1 3300pF Capacitor, Ceramic, 25V, X7R , 10% 0603 Std Std C9, C10 2 22uF Capacitor, Ceramic, 6.3V, X5R, 20% 1206 C3216X5R0J226M TDK J1, J2 2 ED555/2DS Terminal Block, 2-pin, 6-A, 3.5mm 0.27 x 0.25 inch ED555/2DS Sullins JP1 1 PEC03SAAN Header, Male 3-pin, 100mil spacing 0.100 inch x 3 PEC03SAAN Sullins L1 1 1.5uH Inductor, SMT, 11 A, 9.7 mΩ 0.256 x 0.280 inch SPM6530T-1R5M100 TDK R1 1 8.25k Resistor, Chip, 1/16W, 1% 0603 Std Std R2 1 22.1k Resistor, Chip, 1/16W, 1% 0603 Std Std R3 1 0 Resistor, Chip, 1/16W, 1% 0603 Std Std R4 1 10.0k Resistor, Chip, 1/16W, 1% 0603 Std Std R5 0 Open Resistor, Chip, 1/16W, 1% 0603 Std Std TP1, TP3, TP4, TP5, TP6, TP8 3 5000 Test Point, Red, Thru Hole Color Keyed 0.100 x 0.100 inch 5000 Keystone TP2, TP7, TP9 3 5001 Test Point, Black, Thru Hole Color Keyed 0.100 x 0.100 inch 5001 Keystone U1 1 TPS54327DDA IC, 3-A Output Single Sync. Step-Down SO8[DDA] TPS54327DDA TI – 1 Shunt, 100-mil, Black 0.100 929950-00 3M – 1 PCB, 2.76 In x 1.97 In x 0.062 In HPA686 Any SLVU413 – November 2010 Submit Documentation Feedback TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated 13 Schematic, Bill of Materials, and Reference 6.3 www.ti.com Reference 1. TPS54327, Single Synchronous Converter With Integrated High Side and Low Side MOS FET data sheet (SLVSAG1) 14 TPS54327EVM-686 3-A, SWIFT™ Regulator Evaluation Module © 2010, Texas Instruments Incorporated SLVU413 – November 2010 Submit Documentation Feedback Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. 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TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on TI’s environmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh. No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used. FCC Warning This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. EVM Warnings and Restrictions It is important to operate this EVM within the input voltage range of 5 V to 17 V and the output voltage range of 1 V to 5 V . Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures greater than 85°C. The EVM is designed to operate properly with certain components above 85°C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. 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