TI TMP006AIYZFR

TMP006
SBOS518 – MAY 2011
www.ti.com
Infrared Thermopile Sensor in Chip-Scale Package
Check for Samples: TMP006
FEATURES
DESCRIPTION
•
The TMP006 is the first in a series of temperature
sensors that measure the temperature of an object
without the need to make contact with the object. This
sensor uses a thermopile to absorb the infrared
energy emitted from the object being measured and
uses the corresponding change in thermopile voltage
to determine the object temperature.
1
23
•
•
•
•
•
Complete Solution in 1,6 mm × 1,6 mm Wafer
Chip-Scale Package (WCSP) IC (DSBGA)
Digital Output:
– Sensor Voltage: 7 μV/°C
– Local Temperature: –40°C to +125°C
SMBus™ Compatible Interface
Pin-Programable Interface Addressing
Low Supply Current: 240 μA
Low Minimum Supply Voltage: 2.2 V
Infrared sensor voltage range is specified from –40°C
to +125°C to enable use in a wide range of
applications. Low power consumption along with low
operating voltage makes the part suitable for
battery-powered applications. The low package
height of the chip-scale format enables standard high
volume assembly methods, and can be useful where
limited spacing to the object being measured is
available.
APPLICATIONS
•
•
•
•
Notebook Case Temperature
Comfort Index Measurement
Motor Case Temperature
Server Farm Power Management
Histogram
20
TObject = 20°C
TLocal = 20°C
15
Count
-3 s
+3 s
10
5
0
-3
-2
0
-1
1
2
3
TObject Error (°C)
V+
Gain
IR
Thermopile
Sensor
16-Bit
DS
ADC
Digital
Control
SMBus
Compatible
Sensor
Amplifier
Local
Temperature
DRDY
ADR0
ADR1
SCL
SDA
Voltage
Reference
TMP006
AGND
DGND
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SMBus is a trademark of Intel Corporation.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
TMP006
SBOS518 – MAY 2011
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE INFORMATION (1)
(1)
PRODUCT
PACKAGE
DESCRIPTION
TWO-WIRE ADDRESS
PACKAGE
DESIGNATOR
TMP006YZF
WCSP-8
1,6 mm × 1,6 mm WCSP
1000XXX
YZF
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
TMP006
MIN
Supply voltage
V+
Input voltage
ADR1 pins
Input voltage
SDA, SCL, DRDY, ADR0 pins
MAX
UNIT
7
V
–0.5
VS + 0.5
V
–0.5
7
V
10
mA
Input current
Operating temperature range
–55
+125
°C
Storage temperature range
–65
+150
°C
+150
°C
Junction temperature (TJ max)
Human body model (HBM)
ESD rating:
(1)
2000
V
Charged device model (CDM)
500
V
Machine model (MM)
200
V
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
THERMAL INFORMATION
TMP006YZF
THERMAL METRIC (1)
YZF
UNITS
8 PINS
θJA
Junction-to-ambient thermal resistance
θJCtop
Junction-to-case (top) thermal resistance
69
θJB
Junction-to-board thermal resistance
103
ψJT
Junction-to-top characterization parameter
4.7
ψJB
Junction-to-board characterization parameter
55
θJCbot
Junction-to-case (bottom) thermal resistance
n/a
(1)
2
123.8
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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ELECTRICAL CHARACTERISTICS
At TA = +25°C, V+ = 3.3 V, and conversion time = 1 sec, unless otherwise specified.
TMP006
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
±0.5
±1.5
UNIT
OUTPUT ERROR
TA = –40°C to +125°C, V+ = 2.2 V to 5.5 V
Ambient temperature sensor
Power-supply rejection ratio
Sensor voltage
Calculate object temperature (1)
Field of view
°C
0.1
°C/V
TObject = +40°C to +60°C, TA = 0°C to +60°C
7
μV/°C
TA = +20°C to +60°C,
TObject – TA = –10°C to +30°C, V+ = 2.2 V to 5.5 V
±1
50% responsivity
90
Degrees
CR2 = 0, CR1 = 0, CR0 = 0
0.25
Seconds
CR2 = 0, CR1 = 0, CR0 = 1
0.5
Seconds
CR2 = 0, CR1 = 1, CR0 = 0
1
Seconds
CR2 = 0, CR1 = 1, CR0 = 1
2
Seconds
CR2 = 1, CR1 = 0, CR0 = 0
4
Seconds
PSRR
±3
°C
TEMPERATURE MEASUREMENT
Conversion time
Resolution
Local temperature sensor
Thermopile sensor resolution
0.03125
°C
156.25
nV
SMBus COMPATIBLE INTERFACE
Logic input high voltage (SCL, SDA)
VIH
Logic input low voltage (SCL, SDA)
VIL
2.1
Hysteresis
Output low voltage (SDA)
V
0.8
100
VOL
IOUT = 6 mA
Output low sink current (SDA)
0.15
0.4
6
Logic input current
Forced to 0.4 V
+1
µA
3.4
MHz
30
35
ms
3
Clock frequency
0.001
Interface timeout
25
V
mA
–1
Input capacitance (SCL, SDA, A0, A1)
V
mV
pF
DIGITAL OUTPUTS
Output low voltage (DRDY pin)
VOL
IOUT = 4 mA
0.15
0.4
V
High-level output leakage current
IOH
VOUT = VDD
0.1
1
µA
Output low sink current (DRDY)
Forced to 0.4 V
4
mA
POWER SUPPLY
Power-on reset
V+
T = –40°C to +125°C
Specified voltage range
V+
T = –40°C to +125°C
Quiescent current
IQ
1.6
2.2
V
5.5
V
Continuous conversion; see Table 9
240
325
µA
Serial bus inactive, shutdown mode
0.5
1.0
µA
Serial bus active, fS = 400 kHz,
shutdown mode
90
µA
TEMPERATURE RANGE
Specified range
–40
+125
°C
Storage range
–65
+150
°C
(1)
This parameter is tested in a fully-settled setup with no transients, in front of an ideal black body, with specified layout constraints, and
after system calibration.
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PIN CONFIGURATION
Rows
YZF PACKAGE
WCSP-8
(Top View, Not to Scale)
A
A1
A2
A3
B
B1
Sensor
B3
C
C1
C2
C3
2
3
1
Columns
PIN DESCRIPTIONS
4
PIN
NAME
A1
DGND
Digital ground
A2
AGND
Analog ground
A3
V+
B1
ADR1
B3
SCL
DESCRIPTION
Positive supply (2.2 V to 5.5 V)
Address select pin
Serial clock line for SMBus, open-drain; requires a pull-up resistor to V+
C1
ADR0
Address select pin
C2
DRDY
Data ready, active low, open-drain; requires a pull-up resistor to V+
C3
SDA
Serial data line for SMBus, open-drain; requires a pull-up resistor to V+
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TYPICAL CHARACTERISTICS
At TA = +25°C and VS = 3.3 V, unless otherwise noted.
TYPICAL LOCAL TEMPERATURE ERROR
TYPICAL OBJECT TEMPERATURE ERROR
3
4
2.2 V
3.3 V
5.5 V
2.5
2
2
TObject Error (°C)
1.5
3
TA (°C)
1
0.5
0
-0.5
-1
1
0
-1
-2
-1.5
-2
TA = 20°C
TA = 40°C
-3
-2.5
-4
-3
-40 -25 -10
5
20
35
50
65
80
95
110 125
-20
0
-10
Bath Temperature (°C)
10
20
30
40
TObject - TA (°C)
Figure 1.
Figure 2.
RESPONSIVITY vs ANGLE
100
Responsivity (%)
80
60
Field of View
40
20
0
-20
-90
-70
-50
-30
-10
10
30
50
70
90
Angle (°)
Figure 3.
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OVERVIEW
The TMP006 is a digital temperature sensor that is optimal for thermal management and thermal protection
applications where remote non-contact sensing is desired. The TMP006 is two-wire and SMBus interface
compatible, and is specified over the ambient temperature range of –40°C to +125°C. The TMP006 measures
object temperatures over a temperature range of –40°C to +125°C. The TMP006 contains registers for holding
configuration information, temperature measurement results, and sensor voltage measurement. The ambient
temperature measurement and the sensor voltage measurement are used to calculate the object temperature.
Refer to the TMP006 User Guide (SBOU107) for more details.
The SCL and SDA interface pins require pull-up resistors (10 kΩ, typical) as part of the communication bus, while
DRDY is an open-drain output that must also use a pull-up resistor. DRDY may be shared with other devices if
desired for a wired-OR implementation. A 0.01-μF power-supply bypass capacitor is recommended, as shown in
Figure 4.
V+
A3
CF > 0.01 mF
B3
SCL
B1
Device
ADR1
C3
SDA
C1
ADR0
C2
DRDY
A2
A1
AGND
DGND
Figure 4. Typical Connection Diagram
The TMP006 provides both local temperature and the thermopile sensor voltage outputs in a WCSP. The local
temperature sensor in the TMP006 is integrated on-chip; the thermal path runs through the WCSP solder balls.
The low thermal resistance of the solder balls provides the thermal path to maintain the chip at the temperature
of the local environment.
The top side of the WCSP must face the object that is being measured with an unobstructed view in order to
accurately measure the temperature. Refer to the user guide TMP006 Layout and Assembly Guidelines
(SBOU108) for more details.
6
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The TMP006 initially starts up with typical settings consisting of a conversion rate of 1 conversion/second (as
specified in the Electrical Characteristics). The internal structure of the digital interface is shown in Figure 5.
Pointer
Register
Result
Registers
SCL
I/O
Control
Interface
Configuration
Registers
SDA
ADR0 ADR1
DRDY
Figure 5. Internal Structure
SERIAL BUS ADDRESS
To communicate with the TMP006, the master must first address slave devices via a slave address byte. The
slave address byte consists of seven address bits and a direction bit that indicates the intent to execute a read or
write operation.
The TMP006 features two address pins to allow up to eight devices to be addressed on a single bus. Table 1
describes the pin logic levels used to properly connect up to eight devices. The state of the ADR0 and ADR1
pins is sampled on every bus communication and should be set before any activity on the interface occurs. The
address pin is read at the start of each communication event.
Table 1. TMP006 Address Pins and Slave Addresses
A1
A0
SMBus ADDRESS
0
0
1000000
0
1
1000011
0
SDA
1000010
1
0
1000100
1
1
1000111
1
SDA
1000110
INTERNAL REGISTERS
The TMP006 contains data registers that hold configuration information, temperature measurement results, and
status information.
Table 2. Register Map (1)
POINTER
(HEX)
REGISTER
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
00h
VOBJECT
V15
V14
V13
V12
V11
V10
V9
V8
V7
V6
V5
V4
V3
V2
V1
V0
01h
TAMBIENT
T13
T12
T11
T10
T9
T8
T7
T6
T5
T4
T3
T2
T1
T0
0
0
02h
Configuration
RST
MOD3
MOD2
MOD1
CR3
CR2
CR1
EN
DRDY
0
0
0
0
0
0
0
FEh
Manufacturer ID
ID15
ID14
ID13
ID12
ID11
ID10
ID9
ID8
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
FFh
Device ID
ID15
ID14
ID13
ID12
ID11
ID10
ID9
ID8
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
(1)
Registers in bold are read-only.
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POINTER REGISTER
The TMP006 has an 8-bit pointer used to address a given data register, as shown in Table 3. The pointer
identifies which of the data registers should respond to a read or write command on the two-wire bus. This
register is set with every write command. A write command must be issued to set the proper value in the pointer
before executing a read command. The power-on reset (POR) value of the pointer is 00h; this value selects the
thermopile sensor voltage, VOBJECT.
Table 3. Pointer Register (Write-Only)
Register
P7
P6
P5
P4
P3
P2
P1
P0
Reset value
0
0
0
0
0
0
0
0
SENSOR VOLTAGE REGISTER (VOBJECT)
The Sensor Voltage Register is a 16-bit result register in binary twos complement format. One least significant bit
(LSB) is 156.25 nV. The full-scale value is a ±5.12 mV signal. Data from this register (Table 4) are used in
conjunction with the data from the Temperature Register to calculate the object temperature. Table 4
summarizes the Sensor Voltage Register. The equation for the resultant object temperature is discussed in the
TMP006 User Guide (SBOU107).
Table 4. Sensor Voltage Register (Read-Only)
POINTER
(HEX)
00h
8
REGISTER
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
VOBJECT
V15
V14
V13
V12
V11
V10
V9
V8
V7
V6
V5
V4
V3
V2
V1
V0
Reset value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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SENSOR VOLTAGE FORMAT
The TMP006 provides 16 bits of data in binary twos complement format. The positive full-scale input produces an
output code of 7FFFh and the negative full-scale input produces an output code of 8000h. The output clips at
these codes for signals that exceed full-scale. Table 5 summarizes the ideal output codes for different input
signals. Figure 6 illustrates code transitions versus input voltage. Full-scale is a 5.12 mV signal. The LSB size is
156.25 nV.
Table 5. Input Signal versus Ideal Output Code (1)
SENSOR SIGNAL
OUTPUT CODE
FS (215 – 1)/215 (5.12 mV)
7FFFh
15
+FS/2
(1)
(156.25 nV)
0001h
0
0
–FS/215 (–156.25 nV)
FFFFh
–FS (–5.12 mV)
8000h
FS = Full-scale value.
7FFFh
0001h
0000h
FFFFh
¼
Output Code
¼
7FFEh
8001h
8000h
-FS
¼
0
¼
FS
Sensor Voltage (AINP - AINN)
15
15
2 -1
2 -1
-FS
FS
15
15
2
2
Figure 6. Code Transition Diagram
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TEMPERATURE REGISTER (TAMBIENT)
The Temperature Register of the TMP006 is configured as a 14-bit, read-only register, as shown in Table 6, that
stores the result of the most recent conversion for the local die temperature TAMBIENT. Following power-up or a
software reset, the Temperature Register reads 0°C (0000h) until the first conversion is complete.
Table 6. Temperature Registers (Read Only)
POINTER
(HEX)
01h
REGISTER
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
TAMBIENT
T13
T12
T11
T10
T9
T8
T7
T6
T5
T4
T3
T2
T1
T0
0
0
Reset value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TEMPERATURE FORMAT
The Temperature Register data format of the TMP006 is reported in a binary twos complement signed integer
format, as Table 7 shows, with 1 LSB = 1/32°C = 0.03125.
Table 7. Temperature Data Format
TEMPERATURE (°C)
DIGITAL OUTPUT (BINARY)
SHIFTED HEX
150
0100 1011 0000 0000
12CO
125
0011 1110 1000 0000
0FA0
100
0011 0010 0000 0000
0C80
80
0010 1000 0000 0000
0A00
75
0010 0101 1000 0000
0960
50
0001 1001 0000 0000
0640
25
0000 1100 1000 0000
0320
0.03125
0000 0000 0000 0100
0001
0
0000 0000 0000 0000
0000
–0.03125
1111 1111 1111 1100
FFFC
–0.0625
1111 1111 1111 1000
FFF8
–25
1111 0011 0111 0000
F370
–40
1110 1011 1111 1100
EBFC
–55
1110 0100 0111 1100
E47C
Converting the integer temperature result of the TMP006 to physical temperature is done by right-shifting the last
two LSBs followed by a divide-by-32 of TREG to obtain the physical temperature result in degrees Celsius. TREG is
the 14-bit signed integer contained in the corresponding register. The sign of the temperature is the same as the
sign of the integer read form the TMP006. In twos complement notation, the MSB is the sign bit. If the MSB is '1',
the integer is negative and the absolute value can be obtained by inverting all bits and adding '1'. An alternative
method of calculating the absolute value of negative integers is abs(i) = i xor FFFFh + 1.
10
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CONFIGURATION REGISTER
Table 8 describes the Configuration Register. This register determines the operational modes, conversion rate,
DRDY control, initiates a single conversion, performs a software reset, or puts the device into shutdown mode.
This register is read/write, and the pointer address is 02h.
Table 8. Configuration Register (Read/Write)
POINTER
(HEX)
REGISTER
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Configuration
RST
MOD2
MOD1
MOD0
CR2
CR1
CR0
EN
DRDY
0
0
0
0
0
0
0
Reset value
0
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
02h
Bit [15]
RST: Software reset bit
0 = Normal operation, this bit self clears
1 = Software reset
Bits [14:12]
MOD[2:0]: Mode of operation
000 = Power-down
111 = Sensor and ambient continuous conversion (MOD)
Bits [11:9]
CR[2:0]: ADC conversion rate
See Table 9.
Bit [8]
EN: DRDY enable bit
0 = DRDY pin disabled
1 = DRDY pin enabled
Bit [7]
DRDY: Data ready bit
0 = Conversion in progress
1 = Object voltage and ambient temperature results are ready to read. A temperature or sensor voltage read or a write to
the Configuration Register is required to clear the condition.
Bits [6:0]
Unused [6:0]
The TMP006 can operate in two modes: continuous and shutdown. A software reset function is also available.
Selecting the desired operating mode is done by writing to the Configuration Register conversion mode select
bits MOD[2:0]. The duration of the analog-to-digital (A/D) conversion is determined by the conversion rate bits
CR[2:0] and is listed in Table 9. Continuous mode, on the other hand, performs an A/D conversion followed by a
low-power delay in order to reduce the average power consumption. Multiple options for the conversion time and
delay time are available in order to select the desired power/noise performance. Initiating power-down has an
immediate effect; it aborts the current conversion and puts the device into a low-power shutdown mode. RST, or
software reset, is also immediate and initializes all memory locations with the respective reset values.
Table 9. Conversion Rate
CR2
CR1
CR0
CONVERSION RATE
(conv/sec)
TOTAL NUMBER OF
AVERAGED
SAMPLES
AVERAGE IQ (μA)
PEAK-PEAK NOISE
OF THE TObject
RESULT (°C)
0
0
0
4
1
240
0.5
0
0
1
2
2
240
0.35
0
1
0
1
4
240
0.25 (default)
0
1
1
0.5
8
240
0.18
1
0
0
0.25
16
240
0.125
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MANUFACTURER AND DEVICE ID REGISTERS
The TMP006 has two registers for identification: manufacturer ID (pointer address FEh) and device ID (pointer
address FFh). The manufacturer ID reads 5449h and the device ID is 0060h. Table 10 summarizes these two
values.
Table 10. Manufacturer and Device ID (Read-Only)
POINTER
(HEX)
FEh
FFh
REGISTER
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Manufacturer ID
ID15
ID14
ID13
ID12
ID11
ID10
ID9
ID8
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
Reset value
0
1
0
1
0
1
0
0
0
1
0
0
1
0
0
1
Device ID
ID15
ID14
ID13
ID12
ID11
ID10
ID9
ID8
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
Reset value
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
SERIAL INTERFACE
The TMP006 operates only as a slave device on either the two-wire bus or the SMBus interface. Connections to
either bus are made via the open-drain I/O lines, SDA, and SCL. The SDA and SCL pins feature integrated
spike-suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP006
supports the transmission protocol for fast (1 kHz to 400 kHz) and high-speed (1 kHz to 3.4 MHz) modes. All
data bytes are transmitted MSB first.
SERIAL BUS ADDRESS
To communicate with the TMP006, the master must first address slave devices via a slave address byte. The
slave address byte consists of seven address bits, and a direction bit that indicate the intent to execute a read or
write operation.
READ/WRITE OPERATIONS
Accessing a particular register on the TMP006 is accomplished by writing the appropriate value to the Pointer
Register. The pointer value is the first byte transferred after the slave address byte with the R/W bit low. Every
write operation to the TMP006 requires a value for the pointer (see Figure 7). When reading from the TMP006,
the last value stored in the pointer by a write operation is used to determine which register is read by a read
operation. To change the register pointer for a read operation, a new value must be written to the pointer. This
transaction is accomplished by issuing a slave address byte with the R/W bit low, followed by the pointer byte.
No additional data are required. The master can then generate a START condition and send the slave address
byte with the R/W bit high to initiate the read command. If repeated reads from the same register are desired, it
is not necessary to continually send the pointer bytes because the TMP006 retains the pointer value until it is
changed by the next write operation. Note that register bytes are sent MSB first, followed by the LSB.
12
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TMP006
SBOS518 – MAY 2011
www.ti.com
TIMING DIAGRAMS
The TMP006 is two-wire and SMBus-compatible. Figure 7 and Figure 8 illustrate the timing for the various
operations on the TMP006. Parameters for Figure 7 are defined in Table 11. Bus definitions are given below.
Table 11. Timing Diagram Definitions
FAST MODE
PARAMETER
HIGH-SPEED MODE
TEST CONDITIONS
MIN
MAX
MIN
MAX
UNIT
SCL operating frequency, VS > 1.7 V
0.001
0.4
0.001
3.4
MHz
fSCL
SCL operating frequency, VS < 1.7 V
0.001
0.4
0.001
2.75
MHz
tBUF
Bus free time between STOP and START
condition
600
160
ns
tHDSTA
Hold time after repeated START condition.
After this period, the first clock is
generated.
100
100
ns
tSUSTA
Repeated START condition setup time
100
100
ns
tSUSTO
STOP condition setup time
100
100
ns
tHDDAT
Data hold time
0 (1)
0 (2)
ns
tSUDAT
Data setup time
100
10
ns
tLOW
SCL clock low period, VS > 1.7 V
1300
160
ns
tLOW
SCL clock low period, VS < 1.7 V
1300
200
ns
tHIGH
SCL clock high period
600
60
ns
fSCL
tF
Clock/data fall time
300
tR
Clock/data rise time
300
tR
Clock/data rise time for SCLK ≤ 100 kHz
1000
(1)
(2)
ns
160
ns
ns
For cases with fall time of SCL less than 20 ns and/or the rise or fall time of SDA less than 20 ns, the hold time should be greater than
20 ns.
For cases with a fall time of SCL less than 10 ns and/or the rise or fall time of SDA less than 10 ns, the hold time should be greater than
10 ns.
Bus Idle: Both SDA and SCL lines remain high.
Start Data Transfer: A change in the state of the SDA line from high to low while the SCL line is high defines a
START condition. Each data transfer is initiated with a START condition.
Stop Data Transfer: A change in the state of the SDA line from low to high while the SCL line is high defines a
STOP condition. Each data transfer terminates with a STOP or a repeated START condition.
Data Transfer: The number of data bytes transferred between a START and a STOP condition is not limited and
is determined by the master device. The receiver acknowledges the transfer of data.
Acknowledge: Each receiving device, when addressed, is obliged to generate an Acknowledge bit. A device
that acknowledges must pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA
line is stable low during the high period of the Acknowledge clock pulse. Setup and hold times must be taken into
account. On a master receive, data transfer termination can be signaled by the master generating a
Not-Acknowledge on the last byte that has been transmitted by the slave.
In order for the two-wire bus to operate at frequencies above 400 kHz, the master device must issue a
High-speed mode (Hs-mode) master code (0000100X) as the first byte after a START condition to switch the bus
to high-speed operation. The TMP006 does not acknowledge this byte, but switches the input filters on SDA and
SCL and the output filter on SDA to operate in Hs-mode, allowing transfers at up to 3.4 MHz. After the Hs-mode
master code has been issued, the master transmits a two-wire slave address to initiate a data transfer operation.
The bus continues to operate in Hs-mode until a STOP condition occurs on the bus. Upon receiving the STOP
condition, the TMP006 switches the input and output filter back to fast-mode operation.
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13
TMP006
SBOS518 – MAY 2011
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1
9
9
1
¼
SCL
SDA
1
0
0
0
0
0
0
(1)
R/W
Start By
Master
P7
P6
P5
P4
P3
P2
P1
¼
P0
ACK By
TMP006
ACK By
TMP006
Frame 2 Pointer Register Byte
Frame 1 Two-Wire Slave Address Byte
1
9
1
9
SCL
(Continued)
SDA
(Continued)
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
ACK By
TMP006
ACK By
TMP006
Frame 3 MSB
Stop By
Master
Frame 4 LSB
(1) Slave address 1000000 shown. Slave address changes for the TMP006 depend on the ADR1 and ADR0 pin connection. See Package
Information for more details.
Figure 7. Two-Wire Timing Diagram for Write Word Format
1
9
1
9
SCL
1
SDA
0
0
0
0
0
0
(1)
R/W
Start By
Master
P7
P6
P5
P4
P3
P2
P1
P0
ACK By
TMP006
ACK By
TMP006
Frame 2 Pointer Register Byte
Frame 1 Two-Wire Slave Address Byte
1
9
1
9
SCL
(Continued)
1
SDA
0
0
0
0
0
0
(1)
R/W
Start By
Master
D7
D6
ACK By
TMP006
Frame 3 Two-Wire Slave Address Byte
1
D5
D4
D3
D2
D1
D0
From
TMP006
ACK By
Master
Frame 4 MSB
9
SCL
SDA
D7
D6
D5
D4
D3
D2
From
TMP006
D1
D0
NACK By
Master
(2)
Stop By
Master
Frame 5 LSB
(1) Slave address 1000000 shown.
(2) Master must leave SDA high to terminate a two-byte read operation.
Figure 8. Two-Wire Timing Diagram for Two-Byte Read Format
14
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PACKAGE OPTION ADDENDUM
www.ti.com
6-Jun-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
TMP006AIYZFR
ACTIVE
DSBGA
YZF
8
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
TMP006AIYZFT
ACTIVE
DSBGA
YZF
8
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
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