TMP421 TMP422 SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 ±1°C Remote and Local TEMPERATURE SENSOR in SOT23-8 FEATURES DESCRIPTION 1 • • • • • • • • • 2345 SOT23-8 PACKAGE ±1°C REMOTE DIODE SENSOR (MAX) ±1.5°C LOCAL TEMPERATURE SENSOR (MAX) SERIES RESISTANCE CANCELLATION n-FACTOR CORRECTION TWO-WIRE/SMBus™ SERIAL INTERFACE MULTIPLE INTERFACE ADDRESSES DIODE FAULT DETECTION RoHS COMPLIANT AND NO Sb/Br APPLICATIONS • • • • • PROCESSOR/FPGA TEMPERATURE MONITORING LCD/DLP®/LCOS PROJECTORS SERVERS CENTRAL OFFICE TELECOM EQUIPMENT STORAGE AREA NETWORKS (SAN) V+ 8 5 TMP421 V+ GND N-Factor Correction Configuration Register Status Register 3 A1 4 A0 The TMP421 and TMP422 are both available in an 8-lead, SOT23 package. V+ 8 5 TMP422 V+ GND Remote Temperature Register Resolution Register Pointer Register SCL SDA 7 6 Configuration Register Status Register Manufacturer ID Register Device ID Register Conversion Rate Register 1 DX1 2 DX2 3 Bus Interface N-Factor Correction Local Temperature Register Configuration Register DXP DXN the TMP421 and TMP422 include series resistance cancellation, programmable non-ideality factor, wide remote temperature measurement range (up to +150°C), and diode fault detection. Device ID Register Conversion Rate Register 2 Remote accuracy is ±1°C for multiple IC manufacturers, with no calibration needed. The Two-Wire serial interface accepts SMBus write byte, read byte, send byte, and receive byte commands to configure the device. Manufacturer ID Register Local Temperature Register 1 The TMP421 and TMP422 are remote temperature sensor monitors with a built-in local temperature sensor. The remote temperature sensor diode-connected transistors are typically low-cost, NPN- or PNP-type transistors or diodes that are an integral part of microcontrollers, microprocessors, or FPGAs. DX3 4 DX4 Configuration Register Resolution Register Remote Temperature Register Pointer Register Bus Interface SCL SDA 7 6 1 2 3 4 5 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DLP is a registered trademark of Texas Instruments. SMBus is a trademark of Intel Corporation. I2C is a trademark of NXP Semiconductors. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE INFORMATION (1) (1) I2C™ ADDRESS PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING Single-Channel Remote Junction Temperature Sensor 100 11xx SOT23-8 DCN DACI Dual Channel Remote Junction Temperature Sensor 100 11xx SOT23-8 DCN DADI PRODUCT DESCRIPTION TMP421 TMP422 For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range, unless otherwise noted. Power Supply, VS Input Voltage Pins 1, 2, 3, and 4 only Pins 6 and 7 only TMP420, TMP421 UNIT +7 V –0.5 to VS + 0.5 V –0.5 to 7 V 10 mA Operating Temperature Range –55 to +127 °C Storage Temperature Range –60 to +130 °C +150 °C Human Body Model (HBM) 3000 V Charged Device Model (CDM) 1000 V Machine Model (MM) 200 V Input Current Junction Temperature (TJ max) ESD Rating (1) 2 Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 ELECTRICAL CHARACTERISTICS At TA = –40°C to +125°C and VS = 2.7V to 5.5V, unless otherwise noted. TMP421, TMP422 PARAMETER CONDITIONS MIN TYP MAX UNIT TEMPERATURE ERROR Local Temperature Sensor Remote Temperature Sensor (1) TELOCAL TEREMOTE vs Supply (Local/Remote) TA = –40°C to +125°C ±1.25 ±2.5 °C TA = +15°C to +85°C, VS = 3.3V ±0.25 ±1.5 °C TA = +15°C to +85°C, TD = –40°C to +150°C, VS = 3.3V ±0.25 ±1 °C TA = –40°C to +100°C, TD = –40°C to +150°C, VS = 3.3V ±1 ±3 °C TA = –40°C to +125°C, TD = –40°C to +150°C ±3 ±5 °C VS = 2.7V to 5.5V ±0.2 ±0.5 °C/V 115 130 ms TEMPERATURE MEASUREMENT Conversion Time (per channel) 100 Resolution Local Temperature Sensor (programmable) 12 Bits Remote Temperature Sensor 12 Bits Remote Sensor Source Currents 120 μA Medium High 60 μA Medium Low 12 μA Low 6 μA High Series Resistance 3kΩ Max η Remote Transistor Ideality Factor TMP421/TMP422 Optimized Ideality Factor 1.008 SMBus INTERFACE Logic Input High Voltage (SCL, SDA) VIH Logic Input Low Voltage (SCL, SDA) VIL 2.1 Hysteresis 500 SMBus Output Low Sink Current SDA Output Low Voltage V 0.8 6 VOL IOUT = 6mA 0 ≤ VIN ≤ 6V Logic Input Current mA 0.15 –1 SMBus Input Capacitance (SCL, SDA) 0.4 V +1 μA 3.4 MHz 35 ms 1 μs 3 SMBus Clock Frequency SMBus Timeout 25 V mV 30 SCL Falling Edge to SDA Valid Time pF DIGITAL INPUTS Input Capacitance 3 pF Input Logic Levels Input High Voltage VIH 0.7(V+) (V+)+0.5 Input Low Voltage VIL –0.5 0.3(V+) V Leakage Input Current IIN 1 μA 5.5 V 0V ≤ VIN ≤ VS V POWER SUPPLY Specified Voltage Range VS Quiescent Current IQ Undervoltage Lockout Power-On Reset Threshold 2.7 0.0625 Conversions per Second 32 38 μA 8 Conversions per Second 400 525 μA Serial Bus Inactive, Shutdown Mode 3 10 μA Serial Bus Active, fS = 400kHz, Shutdown Mode 90 Serial Bus Active, fS = 3.4MHz, Shutdown Mode 350 UVLO 2.3 POR μA μA 2.4 2.6 V 1.6 2.3 V °C TEMPERATURE RANGE Specified Range –40 +125 Storage Range –60 +130 Thermal Resistance, SOT23 (1) θJA 100 °C °C/W Tested with less than 5Ω effective series resistance and 100pF differential input capacitance. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 3 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 TMP421 PIN CONFIGURATION DCN PACKAGE SOT23-8 (TOP VIEW) DXP 1 DXN 2 8 V+ 7 SCL TMP421 A1 3 6 SDA A0 4 5 GND TMP421 PIN ASSIGNMENTS TMP421 NO. NAME 1 DXP DESCRIPTION Positive connection to remote temperature sensor. 2 DXN Negative connection to remote temperature sensor. 3 A1 Address pin 4 A0 Address pin 5 GND Ground 6 SDA Serial data line for SMBus, open-drain; requires pull-up resistor to V+. 7 SCL Serial clock line for SMBus, open-drain; requires pull-up resistor to V+. 8 V+ Positive supply voltage (2.7V to 5.5V) TMP422 PIN CONFIGURATION DCN PACKAGE SOT23-8 (TOP VIEW) DX1 1 DX2 2 8 V+ 7 SCL TMP422 DX3 3 6 SDA DX4 4 5 GND TMP422 PIN ASSIGNMENTS TMP422 4 NO. NAME 1 DX1 DESCRIPTION Channel 1 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10. 2 DX2 Channel 1 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10. 3 DX3 Channel 2 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10. 4 DX4 Channel 2 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10. 5 GND Ground 6 SDA Serial data line for SMBus, open-drain; requires pull-up resistor to V+. 7 SCL Serial clock line for SMBus, open-drain; requires pull-up resistor to V+. 8 V+ Positive supply voltage (2.7V to 5.5V) Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 TYPICAL CHARACTERISTICS At TA = +25°C and VS = +5.0V, unless otherwise noted. REMOTE TEMPERATURE ERROR vs TEMPERATURE 3.0 VS = 3.3V TREMOTE = +25°C 2 30 Typical Units Shown h = 1.008 1 0 -1 -2 2.0 1.0 0 -1.0 -2.0 -3 -3.0 -50 0 -25 25 50 75 100 125 -50 -25 Ambient Temperature, TA (°C) 25 50 75 100 125 Figure 1. Figure 2. REMOTE TEMPERATURE ERROR vs LEAKAGE RESISTANCE REMOTE TEMPERATURE ERROR vs SERIES RESISTANCE (Diode-Connected Transistor, 2N3906 PNP) 2.0 Remote Temperature Error (°C) Remote Temperature Error (°C) 0 Ambient Temperature, TA (°C) 60 40 20 R -GND 0 R -VS -20 -40 1.5 VS = 2.7V 1.0 0.5 0 VS = 5.5V -0.5 -1.0 -1.5 -2.0 -60 0 5 10 15 20 25 30 0 500 1000 1500 2000 2500 3000 Leakage Resistance (MW ) RS ( W ) Figure 3. Figure 4. REMOTE TEMPERATURE ERROR vs SERIES RESISTANCE (GND Collector-Connected Transistor, 2N3906 PNP) REMOTE TEMPERATURE ERROR vs DIFFERENTIAL CAPACITANCE 2.0 3500 3 1.5 VS = 2.7V 1.0 0.5 VS = 5.5V 0 -0.5 -1.0 -1.5 -2.0 Remote Temperature Error (°C) Remote Temperature Error (°C) 50 Units Shown VS = 3.3V Local Temperature Error (°C) Remote Temperature Error (°C) 3 LOCAL TEMPERATURE ERROR vs TEMPERATURE 2 1 0 -1 -2 -3 0 500 1000 1500 2000 2500 3000 3500 0 0.5 1.0 1.5 2.0 2.5 3.0 Capacitance (nF) RS (W) Figure 5. Figure 6. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 5 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 TYPICAL CHARACTERISTICS (continued) At TA = +25°C and VS = +5.0V, unless otherwise noted. TEMPERATURE ERROR vs POWER-SUPPLY NOISE FREQUENCY 25 500 Local 100mVPP Noise Remote 100mVPP Noise Local 250mVPP Noise Remote 250mVPP Noise 20 15 10 450 400 350 5 IQ (mA) Temperature Error (°C) QUIESCENT CURRENT vs CONVERSION RATE 0 -5 300 200 -10 150 -15 100 -20 50 0 0.0625 -25 0 5 10 15 VS = 2.7V 0.125 0.5 1 2 4 Conversion Rate (conversions/sec) Figure 7. Figure 8. SHUTDOWN QUIESCENT CURRENT vs SCL CLOCK FREQUENCY SHUTDOWN QUIESCENT CURRENT vs SUPPLY VOLTAGE 500 8 450 7 8 6 350 5 250 IQ (mA) 300 VS = 5.5V 200 4 3 150 2 100 1 50 VS = 3.3V 0 1k 10k 100k 1M 10M 0 2.5 3.0 SCL CLock Frequency (Hz) Figure 9. 6 0.25 Frequency (MHz) 400 IQ (mA) VS = 5.5V 250 3.5 4.0 4.5 5.0 5.5 VS (V) Figure 10. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 APPLICATION INFORMATION For proper remote temperature sensing operation, the TMP421 requires only a transistor connected between DXP and DXN; the TMP422 requires transistors connected between DX1 and DX2 and between DX3 and DX4. . The SCL and SDA interface pins require pull-up resistors as part of the communication bus. A 0.1μF power-supply bypass capacitor is recommended for good local bypassing. Figure 11 shows a typical configuration for the TMP421, and Figure 12 for the TMP422. The TMP421 (two-channel) and TMP422 (three-channel) are digital temperature sensors that combine a local die temperature measurement channel and one or two remote junction temperature measurement channels in a single SOT23-8 package. The TMP421/22 are Two-Wire- and SMBus interface-compatible and are specified over a temperature range of –40°C to +125°C. The TMP421/22 contain multiple registers for holding configuration information and temperature measurement results. +5V Transistor-connected configuration:(1) 0.1mF Series Resistance RS(2) 8 1 CDIFF(3) RS(2) 2 3 4 V+ SCL DXP DXN TMP421 SDA 10kW (typ) 10kW (typ) 7 SMBus Controller 6 A1 A0 (1) Diode-connected configuration : GND 5 RS(2) RS(2) CDIFF(3) NOTES: (1) Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance cancellation. (2) RS should be < 1.5kW in most applications. (3) CDIFF should be < 1000pF in most applications. Figure 11. TMP421 Basic Connections +5V Transistor-connected configuration:(1) 0.1mF Series Resistance RS(2) DXP1 RS (2) 8 1 CDIFF(3) 2 V+ DX1(4) DX2(4) DXN1 RS(2) DXP2 RS (2) 3 CDIFF(3) DXN2 4 SCL SDA 10kW (typ) 10kW (typ) 7 6 SMBus Controller TMP422 DX3(4) DX4(4) GND 5 Diode-connected configuration(1): RS(2) RS(2) CDIFF(3) NOTES: (1) Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance cancellation. (2) RS should be < 1.5kW in most applications. (3) CDIFF should be < 1000pF in most applications. (4) TMP422 SMBus slave address is 1001 100 when connected as shown. Figure 12. TMP422 Basic Connections Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 7 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 SERIES RESISTANCE CANCELLATION Series resistance in an application circuit that typically results from printed circuit board (PCB) trace resistance and remote line length (see Figure 11) is automatically cancelled by the TMP421/22, preventing what would otherwise result in a temperature offset. A total of up to 3kΩ of series line resistance is cancelled by the TMP421/22, eliminating the need for additional characterization and temperature offset correction. See the two Remote Temperature Error vs Series Resistance typical characteristic curves (Figure 4 and Figure 5) for details on the effect of series resistance and power-supply voltage on sensed remote temperature error. DIFFERENTIAL INPUT CAPACITANCE The TMP421/22 tolerate differential input capacitance of up to 1000pF with minimal change in temperature error. The effect of capacitance on sensed remote temperature error is illustrated in Figure 6, Remote Temperature Error vs Differential Capacitance. TEMPERATURE MEASUREMENT DATA Temperature measurement data are taken over a default range of –55°C to +127°C for both local and remote locations. Measurements from –55°C to +150°C can be made both locally and remotely by reconfiguring the TMP421/22 for the extended temperature range. To change the TMP421 and TMP422 configuration from the standard to the extended temperature range, switch bit 2 (RANGE) of the Configuration Register from low to high. Temperature data resulting from conversions within the default measurement range are represented in binary form, as shown in Table 1, Standard Binary column. Note that any temperature below –64°C results in a data value of –64 (C0h). Likewise, temperatures above +127°C result in a value of 127 (7Fh). The device can be set to measure over an extended temperature range by changing bit 2 of Configuration Register 1 from low to high. The change in measurement range and data format from standard binary to extended binary occurs at the next temperature conversion. For data captured in the extended temperature range configuration, an offset of 64 (40h) is added to the standard binary value, as shown in the Extended Binary column of Table 1. This configuration allows measurement of temperatures as low as –64°C, and as high as +191°C; however, most temperature-sensing diodes only measure with the range of –55°C to +150°C. Additionally, the TMP421/22 are rated only for ambient temperatures ranging from –40°C to +125°C. Parameters in the Absolute Maximum Ratings table must be observed. 8 Table 1. Temperature Data Format (Local and Remote Temperature High Bytes) LOCAL/REMOTE TEMPERATURE REGISTER HIGH BYTE VALUE (1°C RESOLUTION) STANDARD BINARY EXTENDED BINARY TEMP (°C) BINARY HEX BINARY –64 1100 0000 C0 0000 0000 00 –50 1100 1110 CE 0000 1110 0E –25 1110 0111 E7 0010 0111 27 0 0000 0000 00 0100 0000 40 1 0000 0001 01 0100 0001 41 5 0000 0101 05 0100 0101 45 10 0000 1010 0A 0100 1010 4A 25 0001 1001 19 0101 1001 59 50 0011 0010 32 0111 0010 72 75 0100 1011 4B 1000 1011 8B 100 0110 0100 64 1010 0100 A4 125 0111 1101 7D 1011 1101 BD 127 0111 1111 7F 1011 1111 BF 150 0111 1111 7F 1101 0110 D6 175 0111 1111 7F 1110 1111 EF 191 0111 1111 7F 1111 1111 FF HEX (1) Resolution is 1°C/count. Negative numbers are represented in Two's Complement format. (2) Resolution is 1°C/count. All values are unsigned with a –64°C offset. Both local and remote temperature data use two bytes for data storage. The high byte stores the temperature with 1°C resolution. The second or low byte stores the decimal fraction value of the temperature and allows a higher measurement resolution; see Table 2. The measurement resolution for the both the local and remote channels is 0.0625°C, and is not adjustable. Standard Binary Temperature Data Calculation Example For positive temperatures (for example, 20°C): (20°C)/(1°C/count) = 20 → 14h → 0001 0100 Two's Complement is not performed on positive numbers. Simply convert the number to binary code with 8-bit, right-justified format, and MSB = '0' to denote a positive sign. 20°C is stored as 0001 0100 → 14h. For negative temperatures (for example, –20C): (|–20|)/(1°C/count) = 20 → 14h → 0001 0100 Generate the Two's Complement of a negative number by complementing the absolute value binary number and adding 1. –20°C is stored as 1110 1100 → ECh. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 Table 2. Decimal Fraction Temperature Data Format (Local and Remote Temperature Low Bytes) POINTER REGISTER Figure 13 shows the internal register structure of the TMP421/22. The 8-bit Pointer Register is used to address a given data register. The Pointer Register identifies which of the data registers should respond to a read or write command on the Two-Wire bus. This register is set with every write command. A write command must be issued to set the proper value in the Pointer Register before executing a read command. Table 3 describes the pointer address of the TMP421/22 registers. The power-on reset (POR) value of the Pointer Register is 00h (0000 0000b). TEMPERATURE REGISTER LOW BYTE VALUE (0.0625°C RESOLUTION)(1) TEMP (°C) STANDARD AND EXTENDED BINARY HEX 0 0000 0000 00 0.0625 0001 0000 10 0.1250 0010 0000 20 0.1875 0011 0000 30 0.2500 0100 0000 40 0.3125 0101 0000 50 0.3750 0110 0000 60 0.4375 0111 0000 70 0.5000 1000 0000 80 0.5625 1001 0000 90 0.6250 1010 0000 A0 Status Register 0.6875 1011 0000 B0 Configuration Registers 0.7500 1100 0000 C0 0.8125 1101 0000 D0 0.8750 1110 0000 E0 Conversion Rate Register 0.9385 1111 0000 F0 N-Factor Correction Registers Pointer Register Local and Remote Temperature Registers SDA I/O Control Interface One-Shot Start Register (1) Resolution is 0.0625°C/count. All possible values are shown. SCL Identification Registers Software Reset REGISTER INFORMATION The TMP421/22 contain multiple registers for holding configuration information, temperature measurement results, and status information. These registers are described in Figure 13 and Table 3. Figure 13. Internal Register Structure Table 3. Register Map BIT DESCRIPTION POINTER (HEX) POR (HEX) 7 6 5 4 3 2 1 0 00 00 LT11 LT10 LT9 LT8 LT7 LT6 LT5 LT4 Local Temperature (High Byte) (1) 01 00 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 Remote Temperature 1 (High Byte) (1) 02 00 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 Remote Temperature 2 (High Byte) (1) (2) BUSY 0 0 0 0 0 0 0 Status Register 08 09 00 0 SD 0 0 0 RANGE 0 0 Configuration Register 1 0A 1C/3C (2) 0 0 REN2 (2) REN LEN RC 0 0 Configuration Register 2 0B 07 0F 0 0 0 0 0 R2 R1 R0 X X X X X X X X Conversion Rate Register One-Shot Start (3) Local Temperature (Low Byte) 10 00 LT3 LT2 LT1 LT0 0 0 nPVLD 0 11 00 RT3 RT2 RT1 RT0 0 0 nPVLD OPEN Remote Temperature 1 (Low Byte) 12 00 RT3 RT2 RT1 RT0 0 0 nPVLD OPEN Remote Temperature 2 (Low Byte) (2) 21 00 NC7 NC6 NC5 NC4 NC3 NC2 NC1 NC0 N Correction 1 22 00 NC7 NC6 NC5 NC4 NC3 NC2 NC1 NC0 N Correction 2 (2) X X X X X X X X Software Reset (4) 0 1 0 1 0 1 0 1 Manufacturer ID 0 0 1 0 0 0 0 1 TMP421 Device ID 0 0 1 0 0 0 1 0 TMP422 Device ID FC FE FF (1) (2) (3) (4) REGISTER DESCRIPTION 55 21 Compatible with Two-Byte Read; see Figure 18. TMP422 only. X = undefined. Writing any value to this register initiates a one-shot start; see the One-Shot Conversion section. X = undefined. Writing any value to this register initiates a software reset; see the Software Reset section. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 9 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 TEMPERATURE REGISTERS STATUS REGISTER The TMP421/22 have four 8-bit registers that hold temperature measurement results. Both the local channel and the remote channel have a high byte register that contains the most significant bits (MSBs) of the temperature analog-to-digital converter (ADC) result and a low byte register that contains the least significant bits (LSBs) of the temperature ADC result. The local channel high byte address is 00h; the local channel low byte address is 10h. The remote channel high byte is at address 01h; the remote channel low byte address is 11h. For the TMP422, the second remote channel high byte address is 02h; the second remote channel low byte is 12h. These registers are read-only and are updated by the ADC each time a temperature measurement is completed. The Status Register reports the state of the temperature ADCs. Table 4 shows the Status Register bits. The Status Register is read-only, and is read accessing pointer address 08h. The BUSY bit = '1' if the ADC is making a conversion; it is set to '0' if the ADC is not converting. CONFIGURATION REGISTER 1 Configuration Register 1 (pointer address 09h) sets the temperature range and controls shutdown mode. The Configuration Register is set by writing to pointer address 09h and read by reading from pointer address 09h. The shutdown (SD) bit (bit 6) enables or disables the temperature measurement circuitry. If SD = '0', the TMP421/22 converts continuously at the rate set in the conversion rate register. When SD is set to '1', the TMP421/22 stops converting when the current conversion sequence is complete and enters a shutdown mode. When SD is set to '0' again, the TMP421/22 resumes continuous conversions. When SD = '1', a single conversion can be started by writing to the One-Shot Register. The TMP421/22 contain circuitry to assure that a low byte register read command returns data from the same ADC conversion as the immediately preceding high byte read command. This assurance remains valid only until another register is read. For proper operation, the high byte of a temperature register should be read first. The low byte register should be read in the next read command. The low byte register may be left unread if the LSBs are not needed. Alternatively, the temperature registers may be read as a 16-bit register by using a single two-byte read command from address 00h for the local channel result, or from address 01h for the remote channel result (02h for the second remote channel result). The high byte is output first, followed by the low byte. Both bytes of this read operation are from the same ADC conversion. The power-on reset value of all temperature registers is 00h. The temperature range is set by configuring bit 2 of the Configuration Register. Setting this bit low configures the TMP421/22 for the standard measurement range (–55°C to +127°C); temperature conversions will be stored in the standard binary format. Setting bit 2 high configures the TMP421/22 for the extended measurement range (–55°C to +150°C); temperature conversions will be stored in the extended binary format (see Table 1). Table 4. Status Register Format STATUS REGISTER (Read = 08h, Write = NA) BIT # BIT NAME POR VALUE (1) 10 D7 D6 D5 D4 D3 D2 D1 D0 BUSY 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (1) FOR TMP421: The BUSY changes to '1' almost immediately (< 100μs) following power-up, as the TMP421 begins the first temperature conversion. It is high whenever the TMP421 converts a temperature reading. FOR TMP422: The BUSY bit changes to '1' approximately 1ms following power-up. It is high whenever the TMP422 converts a temperature reading. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 The remaining bits of the Configuration Register are reserved and must always be set to '0'. The power-on reset value for this register is 00h. Table 5 summarizes the bits of the Configuration Register. CONFIGURATION REGISTER 2 Configuration Register 2 (pointer address 0Ah) controls which temperature measurement channels are enabled and whether the external channels have the resistance correction feature enabled or not. The RC bit enables the resistance correction feature for the external temperature channels. If RC = '1', series resistance correction is enabled; if RC = '0', resistance correction is disabled. Resistance correction should be enabled for most applications. However, disabling the resistance correction may yield slightly improved temperature measurement noise performance, and reduce conversion time by about 50%, which could lower power consumption when conversion rates of two per second or less are selected. The LEN bit enables the local temperature measurement channel. If LEN = '1', the local channel is enabled; if LEN = '0', the local channel is disabled. The REN bit enables external temperature measurement channel 1 (connected to pins 1 and 2.) If REN = '1', the external channel is enabled; if REN = '0', the external channel is disabled. For the TMP422 only, the REN2 bit enables the second external measurement channel (connected to pins 3 and 4.) If REN2 = '1', the second external channel is enabled; if REN = '0', the second external channel is disabled. The temperature measurement sequence is local channel, external channel 1, external channel 2, shutdown, and delay (to set conversion rate, if necessary). The sequence starts over with local channel. If any of the channels are disabled, they are skipped in the sequence. Table 5. Configuration Register 1 Bit Descriptions CONFIGURATION REGISTER 1 (Read/Write = 09h, POR = 00h) BIT NAME FUNCTION POWER-ON RESET VALUE 7 Reserved — 0 6 SD 0 = Run 1 = Shut Down 0 5, 4, 3 Reserved — 0 2 Temperature Range 0 = –55°C to +127°C 1 = –55°C to +150°C 0 1, 0 Reserved — 0 Table 6. Configuration Register 2 Bit Descriptions CONFIGURATION REGISTER 2 (Read/Write = 0Ah, POR = 1Ch for TMP421; 3Ch for TMP422) BIT NAME FUNCTION 7, 6 Reserved — POWER-ON RESET VALUE 0 5 REN2 0 = External Channel 2 Disabled 1 = External Channel 2 Enabled 1 (TMP422) 0 (TMP421) 4 REN 0 = External Channel 1 Disabled 1 = External Channel 1 Enabled 1 3 LEN 0 = Local Channel Disabled 1 = Local Channel Enabled 1 2 RC 0 = Resistance Correction Disabled 1 = Resistance Correction Enabled 1 1, 0 Reserved — 0 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 11 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 CONVERSION RATE REGISTER ONE-SHOT CONVERSION The Conversion Rate Register (pointer address 0Bh) controls the rate at which temperature conversions are performed. This register adjusts the idle time between conversions but not the conversion timing itself, thereby allowing the TMP421/22 power dissipation to be balanced with the temperature register update rate. Table 7 shows the conversion rate options and corresponding current consumption. A one-shot command can be used during the idle time between conversions to immediately start temperature conversions on all enabled channels. When the TMP421/22 are in shutdown mode (SD = 1 in the Configuration Register 1), a single conversion is started on all enabled channels by writing any value to the One-Shot Start Register, pointer address 0Fh. This write operation starts one conversion; the TMP421/22 return to shutdown mode when that conversion completes. The value of the data sent in the write command is irrelevant and is not stored by the TMP421/22. When the TMP421/22 are in shutdown mode, the conversion sequence currently in process must be completed before a one-shot command can be issued. One-shot commands issued during a conversion are ignored. Table 7. Conversion Rate Register CONVERSION RATE REGISTER (Read/Write = 0Bh, POR = 07h) AVERAGE IQ (TYP) (μA) (1) (2) 12 R7 R6 R5 R4 R3 R2 R1 R0 CONVERSIONS/SEC VS = 2.7V VS = 5.5V 0 0 0 0 0 0 0 0 0.0625 11 32 0 0 0 0 0 0 0 1 0.125 17 38 0 0 0 0 0 0 1 0 0.25 28 49 0 0 0 0 0 0 1 1 0.5 47 69 0 0 0 0 0 1 0 0 1 80 103 0 0 0 0 0 1 0 1 2 128 155 0 0 0 0 0 1 1 0 4 (1) 190 220 0 0 0 0 0 1 1 1 8 (2) 373 413 Conversion rate shown is for only one or two enabled measurement channels. When three channels are enabled, the conversion rate is 2 and 2/3 conversions-per-second. Conversion rate shown is for only one enabled measurement channel. When two channels are enabled, the conversion rate is 4 conversions-per-second. When three channels are enabled, the conversion rate is 2 and 2/3 conversions-per-second. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 n-FACTOR CORRECTION REGISTER SOFTWARE RESET The TMP421/22 allow for a different n-factor value to be used for converting remote channel measurements to temperature. The remote channel uses sequential current excitation to extract a differential VBE voltage measurement to determine the temperature of the remote transistor. Equation 1 relates this voltage and temperature. The TMP421/22 may be reset by writing any value to the Software Reset Register (pointer address FCh). This action restores the power-on reset state to all of the TMP421/22 registers as well as abort any conversion in process. The TMP421/22 also supports reset via the two-wire general call address (0000 0000). The TMP421/22 acknowledges the general call address and responds to the second byte. If the second byte is 0000 0110, the TMP421/22 executes a software reset. The TMP421/22 takes no action in response to other values in the second byte. ǒII Ǔ V BE2*VBE1 + nkT q ln 2 1 (1) The value n in Equation 1 is a characteristic of the particular transistor used for the remote channel. The default value for the TMP421/22 is n = 1.008. The value in the n-Factor Correction Register may be used to adjust the effective n-factor according to Equation 2 and Equation 3. n eff + 1.008 300 ǒ300 * N ADJUSTǓ (2) ǒ Ǔ N ADJUST + 300 * 300 n 1.008 eff (3) The n-correction value must be stored in two's-complement format, yielding an effective data range from –128 to +127. The n-correction value may be written to and read from pointer address 21h. (The n-correction value for the second remote channel is read to/written from pointer address 22h.) The register power-on reset value is 00h, thus having no effect unless the register is written to. Table 8. n-Factor Range NADJUST BINARY HEX DECIMAL n 0111 1111 7F 127 1.747977 0000 1010 0A 10 1.042759 0000 1000 08 8 1.035616 0000 0110 06 6 1.028571 0000 0100 04 4 1.021622 0000 0010 02 2 1.014765 0000 0001 01 1 1.011371 0000 0000 00 0 1.008 1111 1111 FF –1 1.004651 1111 1110 FE –2 1.001325 1111 1100 FC –4 0.994737 1111 1010 FA –6 0.988235 1111 1000 F8 –8 0.981818 1111 0110 F6 –10 0.975484 1000 0000 80 –128 0.706542 IDENTIFICATION REGISTERS The TMP421/22 allow for the Two-Wire bus controller to query the device for manufacturer and device IDs to enable software identification of the device at the particular Two-Wire bus address. The manufacturer ID is obtained by reading from pointer address FEh. The device ID is obtained by reading from pointer address FFh. The TMP421/22 both return 55h for the manufacturer code. The TMP421 returns 21h for the device ID and the TMP422 returns 22h for the device ID. These registers are read-only. BUS OVERVIEW The TMP421/22 is SMBus interface-compatible. In SMBus protocol, the device that initiates the transfer is called a master, and the devices controlled by the master are slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions. To address a specific device, a START condition is initiated. START is indicated by pulling the data line (SDA) from a high-to-low logic level while SCL is high. All slaves on the bus shift in the slave address byte, with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the slave being addressed responds to the master by generating an Acknowledge and pulling SDA low. Data transfer is then initiated and sent over eight clock pulses followed by an Acknowledge bit. During data transfer SDA must remain stable while SCL is high, because any change in SDA while SCL is high is interpreted as a control signal. Once all data have been transferred, the master generates a STOP condition. STOP is indicated by pulling SDA from low to high, while SCL is high. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 13 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 Table 9. TMP421 Slave Address Options SERIAL INTERFACE The TMP421/22 operate only as a slave device on either the Two-Wire bus or the SMBus. Connections to either bus are made via the open-drain I/O lines, SDA and SCL. The SDA and SCL pins feature integrated spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP421/22 support the transmission protocol for fast (1kHz to 400kHz) and high-speed (1kHz to 3.4MHz) modes. All data bytes are transmitted MSB first. TWO-WIRE SLAVE ADDRESS A1 A0 0011 100 Float 0 0011 101 Float 1 0011 110 0 Float 0011 111 1 Float 0101 010 Float Float 1001 100 0 0 1001 101 0 1 1001 110 1 0 1001 111 1 1 SERIAL BUS ADDRESS To communicate with the TMP421/22, the master must first address slave devices via a slave address byte. The slave address byte consists of seven address bits, and a direction bit indicating the intent of executing a read or write operation. The slave device address for the TMP422 is set by the connections between the external transistors and the TMP422 according to Figure 14 and Table 10. If one of the channels is unused, the respective DXP connection should be connected to GND, and the DXN connection should be left unconnected. The polarity of the transistor for external channel 2 (pins 3 and 4) sets the least significant bit of the slave address. The polarity of the transistor for external channel 1 (pins 1 and 2) sets the next least significant bit of the slave address. Two-Wire Interface Slave Device Addresses The TMP421 supports nine slave device addresses and the TMP422 supports four slave device addresses. The slave device address for the TMP421 is set by the A1 and A0 pins according to Table 9. Table 10. TMP422 Slave Address Options TWO-WIRE SLAVE ADDRESS DX1 DX2 DX3 DX4 1001 100 DXP1 DXN1 DXP2 DXN2 1001 101 DXP1 DXN1 DXN2 DXP2 1001 110 DXN1 DXP1 DXP2 DXN2 1001 111 DXN1 DXP1 DXN2 DXP2 SCL SDA V+ DX1 Q0 Q1 V+ DX2 SCL DX3 SDA DX4 GND DX1 Q2 Q3 Address = 1001100 V+ DX2 SCL DX3 SDA DX4 GND Address = 1001101 DX1 Q4 Q5 V+ DX2 SCL DX3 SDA DX4 GND DX1 Q6 Q7 Address = 1001110 V+ DX2 SCL DX3 SDA DX4 GND Address = 1001111 Figure 14. TMP422 Connections for Setup of Device Address 14 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 The TMP422 checks the polarity of the external transistor at power-on, or after software reset, by forcing current to pin 1 while connecting pin 2 to approximately 0.6V. If the voltage on pin 1 does not pull up to near the VDD of the TMP422, pin 1 functions as DXP for this channel, and the second LSB of the slave address is '0'. If the voltage on pin 1 does pull up to near V+, the TMP422 forces current to pin 2 while connecting pin 1 to 0.6V. If the voltage on pin 2 does not pull up to near V+, the TMP422 uses pin 2 for DXP of channel 1, and sets the second LSB of the slave address to '1'. If both pins are shorted to GND or if both pins are open, the TMP422 uses pin 1 as DXP and sets the address bit to '0'. This process is then repeated for channel 2 (pins 3 and 4). If the TMP422 is to be used with transistors that are located on another IC (such as a CPU, DSP, or graphics processor), it is recommended to use pin 1 or pin 3 as DXP to assure correct address detection. If the other IC has a lower supply voltage or is not powered when the TMP422 tries to detect the slave address, a protection diode may turn on during the detection process and the TMP422 may incorrectly choose the DXP pin and slave address. Using pin 1 and/or pin 3 for transistors that are on other ICs will ensure correction operation independent of supply sequencing or levels. When reading from the TMP421/22, the last value stored in the Pointer Register by a write operation is used to determine which register is read by a read operation. To change the register pointer for a read operation, a new value must be written to the Pointer Register. This transaction is accomplished by issuing a slave address byte with the R/W bit low, followed by the Pointer Register byte; no additional data are required. The master can then generate a START condition and send the slave address byte with the R/W bit high to initiate the read command. See Figure 18 for details of this sequence. If repeated reads from the same register are desired, it is not necessary to continually send the Pointer Register bytes, because the TMP421/22 retains the Pointer Register value until it is changed by the next write operation. Note that register bytes are sent MSB first, followed by the LSB. Read operations should be terminated by issuing a Not-Acknowledge command at the end of the last byte to be read. For a single-byte operation, the master should leave the SDA line high during the Acknowledge time of the first byte that is read from the slave. For a two-byte read operation, the master must pull SDA low during the Acknowledge time of the first byte read, and should leave SDA high during the Acknowledge time of the second byte read from the slave. READ/WRITE OPERATIONS Accessing a particular register on the TMP421/22 is accomplished by writing the appropriate value to the Pointer Register. The value for the Pointer Register is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the TMP421/22 requires a value for the Pointer Register (see Figure 16). Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 15 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 TIMING DIAGRAMS The TMP421/22 are Two-Wire and SMBus-compatible. Figure 15 to Figure 18 describe the various operations on the TMP421/22. Parameters for Figure 15 are defined in Table 11. Bus definitions are: Bus Idle: Both SDA and SCL lines remain high. Start Data Transfer: A change in the state of the SDA line, from high to low, while the SCL line is high, defines a START condition. Each data transfer is initiated with a START condition. Stop Data Transfer: A change in the state of the SDA line from low to high while the SCL line is high defines a STOP condition. Each data transfer terminates with a repeated START or STOP condition. t(LOW) Data Transfer: The number of data bytes transferred between a START and a STOP condition is not limited and is determined by the master device. The receiver acknowledges data transfer. Acknowledge: Each receiving device, when addressed, is obliged to generate an Acknowledge bit. A device that acknowledges must pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA line is stable low during the high period of the Acknowledge clock pulse. Setup and hold times must be taken into account. On a master receive, data transfer termination can be signaled by the master generating a Not-Acknowledge on the last byte that has been transmitted by the slave. tF tR t(HDSTA) SCL t(HDSTA) t(HIGH) t(HDDAT) t(SUSTO) t(SUSTA) t(SUDAT) SDA t(BUF) P S S P Figure 15. Two-Wire Timing Diagram Table 11. Timing Characteristics for Figure 15 FAST MODE PARAMETER HIGH-SPEED MODE MIN MAX MIN MAX UNIT 0.4 0.001 3.4 MHz SCL Operating Frequency f(SCL) 0.001 Bus Free Time Between STOP and START Condition t(BUF) 600 160 ns t(HDSTA) 100 100 ns Repeated START Condition Setup Time t(SUSTA) 100 100 ns STOP Condition Setup Time t(SUSTO) 100 100 ns Data Hold Time t(HDDAT) 0 (1) 0 (2) ns Data Setup Time t(SUDAT) 100 10 ns SCL Clock LOW Period t(LOW) 1300 160 ns SCL Clock HIGH Period t(HIGH) 600 60 ns Hold time after repeated START condition. After this period, the first clock is generated. Clock/Data Fall Time tF 300 160 Clock/Data Rise Time tR 300 160 tR 1000 for SCL ≤ 100kHz (1) (2) 16 ns ns For cases with fall time of SCL less than 20ns and/or the rise or fall time of SDA less than 20ns, the hold time should be greater than 20ns. For cases with a fall time of SCL less than 10ns and/or the rise or fall time of SDA less than 10ns, the hold time should be greater than 10ns. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 1 9 9 1 ¼ SCL 1 SDA 0 0 1 1 0 0(1) Start By Master R/W P7 P6 P5 P4 P3 P2 P1 ¼ P0 ACK By TMP421/22 ACK By TMP421/22 Frame 2 Pointer Register Byte Frame 1 Two- Wire Slave Address Byte 9 1 1 9 SCL (Continued) SDA (Continued) D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 ACK By TMP421/22 D0 ACK By TMP421/22 Frame 3 Data Byte 1 Stop By Master Frame 4 Data Byte 2 NOTE: (1) Slave address 1001100 shown. Figure 16. Two-Wire Timing Diagram for Write Word Format 1 9 1 9 SCL SDA 1 0 0 1 1 0 0(1) P7 R/W Start By Master P6 P5 P4 P3 P2 P1 ¼ ¼ P0 ACK By TMP421/22 ACK By TMP421/22 Frame 1 Two-Wire Slave Address Byte Frame 2 Pointer Register Byte 1 9 1 9 ¼ SCL (Continued) SDA (Continued) 1 0 0 1 1 0 0(1) R/W Start By Master D7 D6 D5 D3 D2 D1 D0 From TMP421/22 ACK By TMP421/22 Frame 3 Two-Wire Slave Address Byte D4 ¼ NACK By Master(2) Frame 4 Data Byte 1 Read Register NOTES: (1) Slave address 1001100 shown. (2) Master should leave SDA high to terminate a single-byte read operation. Figure 17. Two-Wire Timing Diagram for Single-Byte Read Format Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 17 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 1 9 1 9 SCL SDA 0 1 0 1 1 0 0(1) R/W Start By Master P7 P6 P5 P4 P3 P2 P1 ¼ ¼ P0 ACK By TMP421/22 ACK By TMP421/22 Frame 1 Two-Wire Slave Address Byte Frame 2 Pointer Register Byte 1 9 1 9 ¼ SCL (Continued) SDA (Continued) 1 0 0 1 1 0 0(1) R/W Start By Master D7 D6 D5 ACK By TMP421/22 Frame 3 Two-Wire Slave Address Byte 1 D4 D3 D2 D1 D0 From TMP421/22 ¼ ACK By Master Frame 4 Data Byte 1 Read Register 9 SCL (Continued) SDA (Continued) D7 D6 D5 D4 D3 D2 From TMP421/22 D1 D0 NACK By Master(2) Stop By Master Frame 5 Data Byte 2 Read Register NOTES: (1) Slave address 1001100 shown. (2) Master should leave SDA high to terminate a two-byte read operation. Figure 18. Two-Wire Timing Diagram for Two-Byte Read Format 18 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 HIGH-SPEED MODE In order for the Two-Wire bus to operate at frequencies above 400kHz, the master device must issue a High-Speed mode (Hs-mode) master code (0000 1xxx) as the first byte after a START condition to switch the bus to high-speed operation. The TMP421/22 does acknowledge this byte, but switches the input filters on SDA and SCL and the output filter on SDA to operate in Hs-mode, allowing transfers at up to 3.4MHz. After the Hs-mode master code has been issued, the master transmits a Two-Wire slave address to initiate a data transfer operation. The bus continues to operate in Hs-mode until a STOP condition occurs on the bus. Upon receiving the STOP condition, the TMP421/22 switches the input and output filters back to fast mode operation. TIMEOUT FUNCTION The TMP421/22 reset the serial interface if either SCL or SDA are held low for 30ms (typical) between a START and STOP condition. If the TMP421/22 are holding the bus low, it releases the bus and waits for a START condition. To avoid activating the timeout function, it is necessary to maintain a communication speed of at least 1kHz for the SCL operating frequency. SHUTDOWN MODE (SD) The TMP421/22 Shutdown Mode allows the user to save maximum power by shutting down all device circuitry other than the serial interface, reducing current consumption to typically less than 3μA; see Figure 10, Shutdown Quiescent Current vs Supply Voltage. Shutdown Mode is enabled when the SD bit of the Configuration Register is high; the device shuts down once the current conversion is completed. When SD is low, the device maintains a continuous conversion state. SENSOR FAULT The TMP421 can sense a fault at the DXP input resulting from incorrect diode connection. Both the TMP421 and the TMP422 can sense an open circuit. Short-circuit conditions return a value of –64h. The detection circuitry consists of a voltage comparator that trips when the voltage at DXP exceeds (V+) – 0.6V (typical). The comparator output is continuously checked during a conversion. If a fault is detected, the OPEN bit (bit 0) in the temperature result register is set to '1' and the rest of the register bits should be ignored. When not using the remote sensor with the TMP421, the DXP and DXN inputs must be connected together to prevent meaningless fault warnings. When not using a remote sensor with the TMP422, the DX pins should be connected using Table 10 such that DXP connections are grounded and DXN connections are left open (unconnected). UNDERVOLTAGE LOCKOUT The TMP421/22 sense when the power-supply voltage has reached a minimum voltage level for the ADC to function. The detection circuitry consists of a voltage comparator that enables the ADC after the power supply (V+) exceeds 2.45V (typical). The comparator output is continuously checked during a conversion. The TMP421/22 does not perform a temperature conversion if the power supply is not valid. The PVLD bit (bit 1, see Table 3) of the Local/Remote Temperature Register is set to '1' and the temperature result may be incorrect. GENERAL CALL RESET The TMP421/22 support reset via the Two-Wire General Call address 00h (0000 0000b). The TMP421/22 acknowledge the General Call address and respond to the second byte. If the second byte is 06h (0000 0110b), the TMP421/22 execute a software reset. This software reset restores the power-on reset state to all TMP421/22 registers, and aborts any conversion in progress. The TMP421/22 take no action in response to other values in the second byte. FILTERING Remote junction temperature sensors are usually implemented in a noisy environment. Noise is most often created by fast digital signals, and it can corrupt measurements. The TMP421/22 have a built-in 65kHz filter on the inputs of DXP and DXN (TMP421), or on the inputs of DX1 through DX4 (TMP422), to minimize the effects of noise. However, a bypass capacitor placed differentially across the inputs of the remote temperature sensor is recommended to make the application more robust against unwanted coupled signals. The value of this capacitor should be between 100pF and 1nF. Some applications attain better overall accuracy with additional series resistance; however, this increased accuracy is application-specific. When series resistance is added, the total value should not be greater than 3kΩ. If filtering is needed, suggested component values are 100pF and 50Ω on each input; exact values are application-specific. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 19 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 REMOTE SENSING The TMP421/22 are designed to be used with either discrete transistors or substrate transistors built into processor chips and ASICs. Either NPN or PNP transistors can be used, as long as the base-emitter junction is used as the remote temperature sense. NPN transistors must be diode-connected. PNP transistors can either be transistoror diode-connected (see Figure 11). Errors in remote temperature sensor readings are typically the consequence of the ideality factor and current excitation used by the TMP421/22 versus the manufacturer-specified operating current for a given transistor. Some manufacturers specify a high-level and low-level current for the temperature-sensing substrate transistors. The TMP421/22 use 6μA for ILOW and 120μA for IHIGH. The TMP421/22 allow for different n-factor values; see the N-Factor Correction Register section. The ideality factor (n) is a measured characteristic of a remote temperature sensor diode as compared to an ideal diode. The ideality factor for the TMP421/22 is trimmed to be 1.008. For transistors that have an ideality factor that does not match the TMP421/22, Equation 4 can be used to calculate the temperature error. Note that for the equation to be used correctly, actual temperature (°C) must be converted to kelvins (K). ǒ Ǔ T ERR + n * 1.008 1.008 ǒ273.15 ) Tǒ°CǓǓ (4) Where: n = ideality factor of remote temperature sensor T(°C) = actual temperature TERR = error in TMP421/22 due to n ≠ 1.008 Degree delta is the same for °C and K For n = 1.004 and T(°C) = 100°C: ǒ Ǔ T ERR + 1.004 * 1.008 1.008 ǒ273.15 ) 100°CǓ T ERR + 1.48°C (5) If a discrete transistor is used as the remote temperature sensor with the TMP421/22, the best accuracy can be achieved by selecting the transistor according to the following criteria: 1. Base-emitter voltage > 0.25V at 6μA, at the highest sensed temperature. 2. Base-emitter voltage < 0.95V at 120μA, at the 20 lowest sensed temperature. 3. Base resistance < 100Ω. 4. Tight control of VBE characteristics indicated by small variations in hFE (that is, 50 to 150). Based on these criteria, two recommended small-signal transistors are the 2N3904 (NPN) or 2N3906 (PNP). MEASUREMENT ACCURACY AND THERMAL CONSIDERATIONS The temperature measurement accuracy of the TMP421/22 depends on the remote and/or local temperature sensor being at the same temperature as the system point being monitored. Clearly, if the temperature sensor is not in good thermal contact with the part of the system being monitored, then there will be a delay in the response of the sensor to a temperature change in the system. For remote temperature-sensing applications using a substrate transistor (or a small, SOT23 transistor) placed close to the device being monitored, this delay is usually not a concern. The local temperature sensor inside the TMP421/22 monitors the ambient air around the device. The thermal time constant for the TMP421/22 is approximately two seconds. This constant implies that if the ambient air changes quickly by 100°C, it would take the TMP421/22 about 10 seconds (that is, five thermal time constants) to settle to within 1°C of the final value. In most applications, the TMP421/22 package is in electrical, and therefore thermal, contact with the printed circuit board (PCB), as well as subjected to forced airflow. The accuracy of the measured temperature directly depends on how accurately the PCB and forced airflow temperatures represent the temperature that the TMP421/22 is measuring. Additionally, the internal power dissipation of the TMP421/22 can cause the temperature to rise above the ambient or PCB temperature. The internal power dissipated as a result of exciting the remote temperature sensor is negligible because of the small currents used. For a 5.5V supply and maximum conversion rate of eight conversions per second, the TMP421/22 dissipates 2.3mW (PDIQ = 5.5V × 415μA). A θJA of 100°C/W causes the junction temperature to rise approximately +0.23°C above the ambient. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 TMP421 TMP422 www.ti.com SBOS398A – JULY 2007 – REVISED SEPTEMBER 2007 LAYOUT CONSIDERATIONS Remote temperature sensing on the TMP421/22 measures very small voltages using very low currents; therefore, noise at the IC inputs must be minimized. Most applications using the TMP421/22 will have high digital content, with several clocks and logic level transitions creating a noisy environment. Layout should adhere to the following guidelines: 1. Place the TMP421/22 as close to the remote junction sensor as possible. 2. Route the DXP and DXN traces next to each other and shield them from adjacent signals through the use of ground guard traces, as shown in Figure 19. If a multilayer PCB is used, bury these traces between ground or VDD planes to shield them from extrinsic noise sources. 5 mil PCB traces are recommended. 3. Minimize additional thermocouple junctions caused by copper-to-solder connections. If these junctions are used, make the same number and approximate locations of copper-to-solder connections in both the DXP and DXN connections to cancel any thermocouple effects. 4. Use a 0.1μF local bypass capacitor directly between the V+ and GND of the TMP421/22, as shown in Figure 20. Minimize filter capacitance between DXP and DXN to 1000pF or less for optimum measurement performance. This capacitance includes any cable capacitance between the remote temperature sensor and TMP421/22. 5. If the connection between the remote temperature sensor and the TMP421/22 is less than 8 in long, use a twisted-wire pair connection. Beyond 8 in, use a twisted, shielded pair with the shield grounded as close to the TMP421/22 as possible. Leave the remote sensor connection end of the shield wire open to avoid ground loops and 60Hz pickup. 6. Thoroughly clean and remove all flux residue in and around the pins of the TMP421/22 to avoid temperature offset readings due to leakage paths between DXP or DXN and GND, or between DXP or DXN and V+. V+ DXP Ground or V+ layer on bottom and/or top, if possible. DXN GND NOTE: Use minimum 5 mil traces with 5 mil spacing. Figure 19. Suggested PCB Layer Cross-Section 0.1mF Capacitor GND PCB Via DXP 1 8 DXN 2 7 A1 3 6 A0 4 5 V+ TMP421 0.1mF Capacitor GND PCB Via DX1 1 8 DX2 2 7 DX3 3 6 DX4 4 5 V+ TMP422 Figure 20. Suggested Bypass Capacitor Placement and Trace Shielding Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMP421 TMP422 21 PACKAGE OPTION ADDENDUM www.ti.com 5-Oct-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TMP421AIDCNR ACTIVE SOT-23 DCN 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP421AIDCNRG4 ACTIVE SOT-23 DCN 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP421AIDCNT ACTIVE SOT-23 DCN 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP421AIDCNTG4 ACTIVE SOT-23 DCN 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP422AIDCNR ACTIVE SOT-23 DCN 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP422AIDCNRG4 ACTIVE SOT-23 DCN 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP422AIDCNT ACTIVE SOT-23 DCN 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP422AIDCNTG4 ACTIVE SOT-23 DCN 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 4-Oct-2007 TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TMP421AIDCNR DCN 8 SITE 48 179 8 3.2 3.2 1.4 4 8 Q1 TMP421AIDCNT DCN 8 SITE 48 179 8 3.2 3.2 1.4 4 8 Q1 TMP422AIDCNR DCN 8 SITE 48 179 8 3.2 3.2 1.4 4 8 Q1 TMP422AIDCNT DCN 8 SITE 48 179 8 3.2 3.2 1.4 4 8 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 4-Oct-2007 Device Package Pins Site Length (mm) Width (mm) Height (mm) TMP421AIDCNR DCN 8 SITE 48 195.0 200.0 45.0 TMP421AIDCNT DCN 8 SITE 48 195.0 200.0 45.0 TMP422AIDCNR DCN 8 SITE 48 195.0 200.0 45.0 TMP422AIDCNT DCN 8 SITE 48 195.0 200.0 45.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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