OBSOLETE CGS74LCT2524 www.ti.com SNOS710D – JANUARY 2000 – REVISED APRIL 2013 CGS74LCT2524 1 to 4 Minimum Skew (300 ps) 3V Clock Driver Check for Samples: CGS74LCT2524 FEATURES DESCRIPTION • This minimum skew clock driver is a 3V option of the current CGS74CT2524 Minimum Skew Clock Driver and is designed for Clock Generation and Support (CGS) applications operating at low voltage, high frequencies. This device ensures minimum output skew across the outputs of a given device. 1 23 • • • • • • • • Ideal for Low Power/Low Noise High Speed Applications Ensured: – 300 ps Pin-to-Pin Skew (tOSHL and tOSLH) Implemented on Texas Instruments' FACT® Family Process 1 Input to 4 Outputs Low Skew Clock Distribution Symmetric Output Current Drive: 12 mA IOH/IOL Industrial Temperature of −40°C to +85°C 8-Pin SOIC Package Low Dynamic Power Consumption Above 20 MHz Ensured 2 kV ESD Protection Skew parameters are also provided as a means to measure duty cycle requirements as those found in high speed clocking systems. This minimum skew clock driver with one input driving four outputs, is specifically designed for signal generation and clock distribution applications. LOGIC SYMBOL The output pins act as a single entity and will follow the state of the CLK when the clock distribution chip is selected. PIN DESCRIPTION Pin Names Description CLK Clock Input O0–O3 Outputs TRUTH TABLE (1) (1) Inputs Outputs CLK O0–O3 L L H H L = Low Logic Level H = High Logic Level 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. FACT is a registered trademark of Fairchild Semiconductor. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2013, Texas Instruments Incorporated OBSOLETE CGS74LCT2524 SNOS710D – JANUARY 2000 – REVISED APRIL 2013 www.ti.com CONNECTION DIAGRAMS Figure 1. 8-Pin SOIC See D Package Figure 2. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) (2) −0.5V to 7.0V Supply Voltage (VCC) DC Input Voltage Diode Current (IIK) V = −0.5V −20 mA V = VCC + 0.5V +20 mA −0.5V to VCC +0.5V DC Input Voltage (VI) DC Output Diode Current (IO) V = −0.5V −20 mA V = VCC + 0.5V +20 mA −0.5V to VCC +0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) ±50 mA DC VCC or Ground Current per Output Pin (ICC or IGND) ±50 mA −65°C to +150°C Storage Temperature (TSTG) Junction Temperature (θJA) (1) (2) Min Typ Max Airflow 0 225 500 LFM M 167 132 117 °C/W The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be ensured. The device should not be operated at these limits. The parametric values defined in the DC ELECTRICAL CHARACTERISTICS and AC ELECTRICAL CHARACTERISTICS tables are not ensured at the absolute maximum ratings. The Recommended Operating Conditions will define the conditions for actual device operation. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. RECOMMENDED OPERATING CONDITIONS Supply Voltage (VCC) 3.0V to 3.6V Input Voltage (VIN) 0V to VCC Output Voltage (VO) Operating Temperature (TA) 0V to VCC Industrial Commercial Input Rise and Fall Times 2 (0.8V to 2.0V) Submit Documentation Feedback −40°C to +85°C 0°C to +70°C 9.6 ns max Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: CGS74LCT2524 OBSOLETE CGS74LCT2524 www.ti.com SNOS710D – JANUARY 2000 – REVISED APRIL 2013 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions unless specified otherwise. CGS74LCT2524 Symbol Parameter VCC (V) Conditions VIH TA = −40°C to +85°C TA = +25°C Typ Units Ensured Limits VOUT = 0.1V or VCC−0.1V 3.6 1.5 2.0 2.0 V VOUT = 0.1V or VCC−0.1V 3.6 1.5 0.8 0.8 V Minimum High Level VIN = VIL or VIH, IOUT = −50 μA 3.0 2.9 2.9 V Output Voltage VIN = VIL or VIH, IOH = −12 mA 3.0 2.5 2.4 V Minimum Low Level VIN = VIL or VIH, IOUT = 50 μA 3.0 0.1 0.1 V Output Voltage VIN = VIL or VIH, IOL = −12 mA 3.0 0.3 0.4 V Maximum Input VIN = VCC, GND 3.6 ±0.1 ±1.0 μA Minimum High Level Input Voltage VIL Maximum Low Level Input Voltage VOH VOL IIN Leakage Current ICCT Maximum ICC/Input VIN = 3.0V 3.6 100 μA IOLD Minimum Dynamic VOLD = 0.8V (max) 3.6 36 mA IOHD Output Current VOHD = 2.0V (min) 3.6 −25 mA ICC Maximum Quiescent VIN = VCC or GND 3.6 10 μA 2.5 Supply Current AC ELECTRICAL CHARACTERISTICS Over recommended operating conditions unless specified otherwise. All typical values are measured at VCC = 3.3V, TA = 25°C LCT2524 VCC = 3.0V to 3.6V Symbol TA = −40°C to +85°C Parameter Units CL = 50 pF, RL = 500Ω Min tPLH Low-to-High Propagation Delay Typ Max 6 15.0 ns 6 15.0 ns CLK to On tPHL High-to-Low Propagation Delay CLK to On Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: CGS74LCT2524 3 OBSOLETE CGS74LCT2524 SNOS710D – JANUARY 2000 – REVISED APRIL 2013 www.ti.com AC ELECTRICAL CHARACTERISTICS - EXTENDED Over recommended operating conditions unless specified otherwise. All typical values are measured at VCC = 3.3V, TA = 25°C LCT2524 VCC = 3.0V to 3.6V Symbol TA = −40°C to +85°C Parameter Units CL = 50 pF, RL = 500Ω Min fmax Maximum Operating Frequency Typ Max 75 MHz Maximum Skew Common Edge Output-to-Output Variation (1) tOSLH Maximum Skew Common Edge Output-to-Output Variation (1) tPS Maximum Skew Pin (Signal) Transition Variation (2) tRISE/ tFALL Rise Time/Fall Time (from 0.8V to 2.0V/2.0V to 0.8V) THIGH Time High 4 ns TLOW Time Low 4 ns tOSHL (1) (2) 300 ps 300 ps 2.5 ns 2.5 ns Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL) or LOW-toHIGH (tOSLH) or in opposite directions both HL and LH (tOST). Limits are characterized and ensured by design @ 66 MHz. Pin transition skew is the absolute difference between HIGH-to-LOW and LOW-to-HIGH propagation delay, measured at a given output pin. TIMING DIAGRAMS 4 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: CGS74LCT2524 OBSOLETE CGS74LCT2524 www.ti.com SNOS710D – JANUARY 2000 – REVISED APRIL 2013 TEST CIRCUIT RL is 500Ω CL is 50 pF for all propagation delays and skew measurements. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: CGS74LCT2524 5 OBSOLETE CGS74LCT2524 SNOS710D – JANUARY 2000 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision C (April 2013) to Revision D • 6 Page Changed layout of National Data Sheet to TI format ............................................................................................................ 5 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: CGS74LCT2524 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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