IKSEMICON IK3301

IK3301
Triple DC to DC Converter Control IC for CCD Image sensor
DESCRIPTION
IK3301 is to be used as power supply control IC for the system that is based on CCD image sensor. IK3301
supplies all the voltages that are needed to operate CCD image sensor, 15V, 5V and –8V, with excellently
controlled ripple voltage. The typical power efficiency of this device is 80% at a standard load current. Due
to the high power efficiency, the heat dissipation is suppressed, which can be fatal to the image quality of
CCD sensor. Excellent voltage ripple and suppressed heat dissipation will be very beneficial for the CCD
system that needs high image quality.
FEATURES
• Built-in 3-Channel Voltage Output Option : 15V / 5.0V / -8V, 12V / 3.3V / -8V
• PWM Method
• High Power Efficiency (80%)
• Low Heat Dissipation
• 9~18V Wide Operating Voltage
• Very Low Ripple Voltage Noise (less than 20mV)
• High Driving Current (300mA@Vout 3.3V or 5.0V)
• Small Package Size :16pin MLP (QFN)
• Simple and Low Cost External Circuit
• Built-in Protection Circuit for External Damage
APPLICATION
• B/W CCD Camera System
• Color CCD Camera System
• Other CCD Image Sensor Power Supply
1
Rev. 01
IK3301
General Description
Figure 1 shows the simplified block diagram of IK3301. The device consists of two highly efficient DC-DC
converters, a negative charge pump, clock generator to supply clock signals to each circuit and reference
voltage generator.
The 15V supply voltage is generated by UP voltage converter, which utilizes one external inductor, one
external capacitor and two external diodes. The internal comparator continuously monitors the output
voltage and adjusts it to 15V by controlling PWM (Pulse Width Modulation) circuit. The 5V supply voltage is
generated by DOWN voltage converter, which utilizes one external inductor, one PFET switch, one external
capacitor and one external diode. The internal comparator continuously monitors the output voltage and
adjusts it to 5V by controlling PWM circuit. The –8V supply voltage is generated by negative charge pump.
This circuit needs two diodes, two external capacitors, and one external inductor. The user can adjust the
output voltages by changing the feedback resistor ratio for all three output voltages.
The reference voltage is generated from internal Band-gap reference circuit and almost constant to the
temperature and the power supply voltage. As a result, 15V, 5V, and -8V voltage outputs are also constant
to temperature and power supply voltage.
Block Diagram
Figure 1. Block Diagram
2
Rev. 01
IK3301
Pin Description for IK3301 (16-QFN)
Figure 2. Package Pin-out Diagram
Pin Description
Pin No
Pin Name
I/O, P/G
Description
1
VFB2
I
Feedback Input2
2
VFB1
I
Feedback Input1
3
VDD
P
Analog Signal Block Power Supply (Common supply at the PCB)
4
VSS
G
Analog Signal Block Ground (Common GROUND point at the PCB)
5
BG
O
Bandgap Reference Voltage Output
6
VFB3
I
Feedback Input3
7
IPK
I
Peak Current Sense
8
PG5
G
Power Ground for 5V Generation (Common GROUND point at the PCB)
9
Vo5
O
PWM Output for 5V Output
10
PVcc3
P
Power Block Power Supply for 5V Output (Common supply at the PCB)
11
Vo15P
O
PSIDE PWM Output for 15V Output
12
PG15
G
Power Ground for 15V Generation (Common GROUND point at the PCB)
13
Vo15
O
NSIDE PWM Output for 15V Output
14
PVcc2
P
Power Supply for -8V output (Common supply at the PCB)
15
PG8
G
Power Ground for -8V Generation (Common GROUND point at the PCB)
16
Vo8
O
PWM Output for -8V Output
3
Rev. 01
IK3301
Absolute Maximum Ratings and Recommand Operating Conditions
Absolute Maximum Ratings
Power Supply Voltage
VDD, PVcc2, PVcc3
Recommand Operating Conditions
-0.5V to +25.0V
Voltage on Any Pin
with GND = 0V (VI)
-0.5V to +25.0V
Storage Temperature
Range (TS)
-65°C to +150°C
Electrical Characteristics
Symbol
Parameter
Power Supply Voltage
VDD, PVcc2, PVcc3
Operating
Temperature(TA)
9V to 18V
-40°C to 85°C
(VDD = 9V~15V, -40°C < TA < 85°C, Except as Specified)
Conditions
Min
Typ
Max
Units
IDD
Power Supply
Current
VDD, PVCC2,
PVCC3=12.0V
--
10
20
mA
Iout5
Output Current of 5V
Output
VDD, PVCC2,
PVCC3=12.0V
300
--
--
mA
Iout15
Output Current of
15V Output
VDD, PVCC2,
PVCC3=12.0V
15
--
--
mA
IoutN8
Output Current of -8V
Output
VDD, PVCC2,
PVCC3=12.0V
10
--
--
mA
Vo5
5V Output Voltage
4.8
5.0
5.2
V
Vo15
15V Output Voltage
14.5
15.0
15.5
V
Vo8
-8V Output Voltage
-7.7
-8.0
-8.3
V
Vo33
3.3V Output Voltage
3.17
3.3
3.4
V
Vo12
12V Output Voltage
11.5
12.0
12.5
V
4
Rev. 01
IK3301
Electrical Description
The standard external components for standard load are shown in Figure 4.
1. Multi-output Generation(-8V & 5V & 15V)
IK3301 consists of CMOS step-down, step-up, and Voltage-inverting switching regulator, which produces
5V, 15V, and -8V. This device contains an internal temperature compensated bandgap reference,
comparator, duty cycle controlled oscillator with cycle-cycle current limit circuit, and high current
output switch with logic gates. Three outputs of 5V, 15V, and -8V are adjustable through two
external feedback resistors with 2% reference voltage accuracy. The power efficiency depends on
the value and the efficiency of external components, the load current and the target ripple voltage.
The minimum efficiency of the 5V voltage generator is 80% with the reference circuit shown in
Figure 4. The maximum load current of 5V of the reference circuit is 300mA, the maximum ripple
voltage is 20mV. To save external components, internal Pch and Nch Power MOS FET are used
to generate -8V and 15V. The 5V Pch Power MOS FET is used as external component because of
high peak current and package power dissipation.
2. Internal BG Reference
IK3301 generates three outputs which are determined by the internal bandgap reference voltage and the
ratio of the feedback resistors. Therefore, the output voltages of 15V, 5V, and -8V are also
insensitive of the temperature and power supply variations.
3. Internal Oscillator
IK3301 has an internal oscillator which charges and discharges the internal timing capacitor using current
sourcing and sinking between an upper and lower predetermined threshold voltage. The upper
threshold voltage is 1.8V and the lower threshold voltage is 0.8V. The charging current and
discharging current ratio is one to six which will vary depending on running frequency. The
oscillator frequency is around 500KHz which is determined by the chosen internal capacitor value
and charging & discharging current and oscillator amplitude.
Internal Oscillator
5
Rev. 01
IK3301
Maximum Output Voltage of the Charge Pump
Figure 3. Internal oscillator & Maximum output voltage of the charge pump
6
Rev. 01
IK3301
Functional Block Diagrams and Application Circuits
VFB2
VFB1
VDD
1
2
V
BG
VDD
3
VBG
V
A
B
O_C
A
B
V
FB1
VFB3
IPK
PG_5
OSC
CT
O_C
t
16 Vo8
Vcc
t
4
5
Ipk
ERR_Comp
FB2
VSS
VBG
BG
Ref
S
R
S
R
Q
Q
15
14
Current
Limit
13
12
11
6
7
8
0.46uH BAT62/SIE
PG8
PVcc2
V
Vo_N_8V
R3
Vo _ 8v =
FB2
10uH
56uF
R4
R3 + R 4
× VBG
R4
V
Vo_5V
BG
Vo15
Vo_15V
46uH
PG15
Vo15P
BAT62/SIE
V
R1
Vo _ 15v =
FB1
R1 + R 2
× VBG
R2
56uF
R2
PVcc3
V
FB2
O_C
t
A
B
S
R
Q
10
9 Vo5
FDFS2P103A
12uH R5
V
FB3
R6
Vo_5V
220uF
Vo _ 5v =
R5 + R 6
× V BG
R6
Figure 4. Functional Block Diagrams and Application Circuits
7
Rev. 01
IK3301
4. Functional Description
In figure 4., during ramping up portion of the cycle, the AND gate input “A” will be high. If the output voltage
of switching regulator is below than target voltage, the AND gate input “B” will be high. This
condition will set the latch and cause the “Q” output to be high enabling the driver and output
switch to be on (for NFET switch case). When the oscillator reaches its upper threshold, Ct will
start to discharge and the AND gate input will be low. The logic level is also connected to an
inverter whose output produces a logic “high” to the reset input of the latch. This condition will
cause “Q” to go low, which disables the driver out output switch.
The comparator output can set the latch only during the ramp-up of Ct and can initiate a partial or full oncycle of output switch conduction. Once the comparator has set the latch, it cannot reset it. The
latch will remain set until Ct begins ramping down. Thus the comparator can initiate the output
switch conduction, but cannot stop it and the latch is always reset when Ct begins remaining down.
The comparator’s output will be “high” when the output voltage of the switching regulator is above
target output voltage.
The current limiting is achieved by monitoring the voltage drop across an external sense resistor placed in
series with supply and the output switch. The voltage drop developed across this resistor is
mornitored by the Ipk sense pin. When this voltage becomes grater than presetting offset voltage,
the current limit circuit provides an additional current path to charge the timing capacitor Ct, which
decreases the time of output switch conduction and reduces the amount of energy stored in the
inductor. Operation of switching regulator in an overload or shorted condition will cause a very
short but finite time of output conduction.
8
Rev. 01
IK3301
Package Dimensions (16-QFN)
All dimension in mm
9
Rev. 01