Inchange Semiconductor Product Specification 2N6542 2N6543 Silicon NPN Power Transistors DESCRIPTION ・With TO-3 package ・High voltage,high speed APPLICATIONS ・Switching regulators ・PWM inverters and motor controls ・Solenoid and relay drivers ・Deflection circuits PINNING PIN DESCRIPTION 1 Base 2 Emitter 3 Collector Fig.1 simplified outline (TO-3) and symbol 导体 半 电 R O T UC Absolute maximum ratings(Ta=℃) 固 SYMBOL VCBO PARAMETER CONDITIONS D N O IC 2N6542 M E S GE Collector-base voltage Open emitter 2N6543 VCEO VEBO N A H INC Collector-emitter voltage Emitter-base voltage 2N6542 VALUE 650 V 850 300 Open base 2N6543 UNIT V 400 Open collector 8 V IC Collector current 5 A ICM Collector current-peak 10 A IB Base current 5 A IE Emitter current 10 A IEM Emitter current-peak 20 A PD Total Power Dissipation 100 W Tj Junction temperature 200 ℃ Tstg Storage temperature -65~200 ℃ TC=25℃ Inchange Semiconductor Product Specification 2N6542 2N6543 Silicon NPN Power Transistors CHARACTERISTICS Tj=25℃ unless otherwise specified SYMBOL VCEO(SUS) PARAMETER Collector-emitter sustaining voltage CONDITIONS 2N6542 MIN TYP. MAX UNIT 300 IC=0.1A ;IB=0 V 400 2N6543 VCEsat-1 Collector-emitter saturation voltage IC=3A; IB=0.6A 1.0 V VCEsat-2 Collector-emitter saturation voltage IC=5A; IB=1.0A 5.0 V Base-emitter saturation voltage IC=3A; IB=0.6A 1.4 V 2N6542 VCE=650V; VBE(off)=1.5V TC=100℃ 0.5 3.0 2N6543 VCE=850V; VBE(off)=1.5V TC=100℃ 0.5 3.0 1.0 VBEsat ICEV Collector cut-off current 导体 半 电 IEBO Emitter cut-off current VEB=8V; IC=0 hFE-1 DC current gain IC=1.5A ; VCE=2V DC current gain IC=3A ; VCE=2V hFE-2 固 fT Trainsistion frequency Switching times IN td Delay time tr Rise time tstg tf IC M E ES G N A CH 60 OND IC=0.2A ; VCE=10V;f=1MHz 35 6 VCC=250V; IC=3.0A IB1=-IB2=0.6A;tp=0.1ms Storage time mA R O T UC 12 7 mA Fall time 35 MHz 0.05 μs 0.7 μs 4.0 μs 0.8 μs THERMAL CHARACTERISTICS SYMBOL Rth j-c PARAMETER Thermal resistance junction to case 2 VALUE UNIT 1.75 ℃/W Inchange Semiconductor Product Specification 2N6542 2N6543 Silicon NPN Power Transistors PACKAGE OUTLINE 导体 半 电 固 R O T UC D N O IC M E S GE N A H INC Fig.2 outline dimensions (unindicated tolerance:±0.10mm) 3