LT1806/LT1807 325MHz, Single/Dual, Rail-to-Rail Input and Output, Low Distortion, Low Noise Precision Op Amps DESCRIPTION FEATURES n n n n n n n n n n n n n n n n Gain Bandwidth Product: 325MHz Slew Rate: 140V/μs Wide Supply Range: 2.5V to 12.6V Large Output Current: 85mA Low Distortion, 5MHz: –80dBc Low Voltage Noise: 3.5nV/√Hz Input Common Mode Range Includes Both Rails Output Swings Rail-to-Rail Input Offset Voltage (Rail-to-Rail): 550μV Max Common Mode Rejection: 106dB Typ Power Supply Rejection: 105dB Typ Unity-Gain Stable Power Down Pin (LT1806) Operating Temperature Range: – 40°C to 85°C Single in SO-8 and 6-Pin SOT-23 Packages Dual in SO-8 and 8-Pin MSOP Packages The LT®1806/LT1807 are single/dual low noise rail-to-rail input and output unity-gain stable op amps that feature a 325MHz gain-bandwidth product, a 140V/μs slew rate and a 85mA output current. They are optimized for low voltage, high performance signal conditioning systems. The LT1806/LT1807 have a very low distortion of – 80dBc at 5MHz, a low input referred noise voltage of 3.5nV/√Hz and a maximum offset voltage of 550μV that allows them to be used in high performance data acquisition systems. The LT1806/LT1807 have an input range that includes both supply rails and an output that swings within 20mV of either supply rail to maximize the signal dynamic range in low supply applications. The LT1806/LT1807 maintain their performance for supplies from 2.5V to 12.6V and are specified at 3V, 5V and ±5V supplies. The inputs can be driven beyond the supplies without damage or phase reversal of the output. APPLICATIONS n n n n n Low Voltage, High Frequency Signal Processing Driving A/D Converters Rail-to-Rail Buffer Amplifiers Active Filters Video Line Driver The LT1806 is available in an 8-pin SO package with the standard op amp pinout and a 6-pin SOT-23 package. The LT1807 features the standard dual op amp pinout and is available in 8-pin SO and MSOP packages.These devices can be used as plug-in replacements for many op amps to improve input/output range and performance. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Gain of 20 Differential A/D Driver 4096 Point FFT Response 0 + 1/2 LT1807 R1 100Ω R2 909Ω C1 5.6pF VIN 5V R5 49.9Ω C3 470pF C2 5.6pF +AVIN LTC®1420 PGA GAIN = 1 V –AVIN REF = 4.096V R6 49.9Ω 12 BITS 10Msps AMPLITUDE (dB) – VS = p5V AV = 20 fSAMPLE = 10Msps fIN = 1.4086MHz SFDR = 83dB NONAVERAGED VIN = 200mVP-P –20 –40 –60 –80 –100 18067 TA01 R3 100Ω – R4 1k 1/2 LT1807 –5V –120 0 1 2 3 FREQUENCY (MHz) 4 5 18067 TA02 + 18067fb 1 LT1806/LT1807 ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V+ to V –)..............................12.6V Input Voltage (Note 2).............................................. ±VS Input Current (Note 2)......................................... ±10mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4)....– 40°C to 85°C Specified Temperature Range (Note 5) ....– 40°C to 85°C Junction Temperature ........................................... 150°C Storage Temperature Range...................– 65°C to 150°C Lead Temperature (Soldering, 10 sec) .................. 300°C PIN CONFIGURATION TOP VIEW TOP VIEW V– 2 SHDN 1 8 NC –IN 2 7 V+ 6 OUT 5 NC 5 SHDN +IN 3 + – 6 V+ OUT 1 +IN 3 4 –IN V– 4 S6 PACKAGE 6-LEAD PLASTIC SOT-23 S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 160°C/W (Note 9) TJMAX = 150°C, θJA = 100°C/W (Note 9) TOP VIEW TOP VIEW 1 2 3 4 8 7 6 5 OUT A 1 V+ OUT B –IN B +IN B –IN A 2 +IN A 3 V– MS8 PACKAGE 8-LEAD PLASTIC MSOP 4 + – OUT A –IN A +IN A V– – + 8 V+ 7 OUT B 6 –IN B 5 +IN B S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 135°C/W (Note 9) TJMAX = 150°C, θJA = 100°C/W (Note 9) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT1806CS6#PBF LT1806CS6#TRPBF LTNK 6-Lead Plastic SOT-23 –40°C to 85°C LT1806IS6#PBF LT1806IS6#TRPBF LTNL 6-Lead Plastic SOT-23 –40°C to 85°C LT1806CS8#PBF LT1806CS8#TRPBF 1806 8-Lead Plastic SO –40°C to 85°C LT1806IS8#PBF LT1806IS8#TRPBF 1806I 8-Lead Plastic SO –40°C to 85°C LT1807CMS8#PBF LT1807CMS8#TRPBF LTTT 8-Lead Plastic MSOP –40°C to 85°C LT1807IMS8#PBF LT1807IMS8#TRPBF LTTV 8-Lead Plastic MSOP –40°C to 85°C LT1807CS8#PBF LT1807CS8#TRPBF 1807 8-Lead Plastic SO –40°C to 85°C LT1807IS8#PBF LT1807IS8#TRPBF 1807I 8-Lead Plastic SO –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 18067fb 2 LT1806/LT1807 ELECTRICAL CHARACTERISTICS TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage ΔVOS Input Offset Voltage Shift VCM = V + VCM = V – VCM = V + (LT1806 SOT-23) VCM = V – (LT1806 SOT-23) VCM = V – to V+ VCM = V – to V+ (LT1806 SOT-23) VCM = V – to V+ Input Offset Voltage Match (Channel-to-Channel) (Note 10) IB ΔIB Input Bias Current VCM = V + VCM = V – + 0.2V MIN –13 TYP MAX UNITS 100 100 100 100 550 550 700 700 μV μV μV μV 50 100 550 700 μV μV 200 1000 μV 1 –5 4 μA μA Input Bias Current Shift VCM = V – to V+ 6 17 μA Input Bias Current Match (Channel-to-Channel) (Note 10) 0.03 0.05 1.2 3.0 μA μA 0.03 0.05 0.6 1.5 μA μA 0.08 2.1 μA IOS Input Offset Current ΔIOS Input Offset Current Shift VCM = V + VCM = V – + 0.2V VCM = V + VCM = V – + 0.2V VCM = V – + 0.2V to V + Input Noise Voltage 0.1Hz to 10Hz 800 en Input Noise Voltage Density f = 10kHz 3.5 nV/√Hz in Input Noise Current Density f = 10kHz 1.5 pA/√Hz CIN Input Capacitance AVOL Large-Signal Voltage Gain VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 VS = 5V, VO = 1V to 4V, RL = 100 to VS/2 VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2 75 9 60 220 22 150 V/mV V/mV V/mV CMRR Common Mode Rejection Ratio VS = 5V, VCM = V – to V + VS = 3V, VCM = V – to V + 79 74 100 95 dB dB CMRR Match (Channel-to-Channel) (Note 10) VS = 5V, VCM = V – to V + VS = 3V, VCM = V – to V + 73 68 100 95 dB dB 2 V– Input Common Mode Range PSRR nVp-p pF V+ V Power Supply Rejection Ratio VS = 2.5V to 10V, VCM = 0V 90 105 dB PSRR Match (Channel-to-Channel) (Note 10) VS = 2.5V to 10V, VCM = 0V 84 105 dB Minimum Supply Voltage (Note 6) 2.3 2.5 V VOL Output Voltage Swing LOW (Note 7) No Load ISINK = 5mA ISINK = 25mA 8 50 170 50 130 375 mV mV mV VOH Output Voltage Swing HIGH (Note 7) No Load ISOURCE = 5mA ISOURCE = 25mA 15 85 350 65 180 650 mV mV mV 18067fb 3 LT1806/LT1807 ELECTRICAL CHARACTERISTICS TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP ISC Short-Circuit Current VS = 5V VS = 3V ±35 ±30 ±85 ±65 IS Supply Current per Amplifier ISHDN MAX UNITS mA mA 9 13 mA Disable Supply Current VS = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V 0.40 0.22 0.9 0.7 mA mA SHDN Pin Current VS = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V 150 100 350 300 μA μA Shutdown Output Leakage Current VSHDN = 0.3V 0.1 75 μA 0.3 V VL SHDN Pin Input Voltage LOW VH SHDN Pin Input Voltage HIGH tON Turn-On Time VSHDN = 0.3V to 4.5V, RL = 100Ω 80 ns tOFF Turn-Off Time VSHDN = 4.5V to 0.3V, RL = 100Ω 50 ns GBW Gain Bandwidth Product Frequency = 6MHz 325 MHz SR Slew Rate VS = 5V, AV = –1, RL = 1k, VO = 4V 125 V/μs FPBW Full Power Bandwidth VS = 5V, VOUT = 4VP-P 10 MHz HD Harmonic Distortion VS = 5V, AV = 1, RL = 1k, VO = 2VP-P, fC = 5MHz –78 dBc tS Settling Time 0.01%, VS = 5V, VSTEP = 2V, AV = 1, RL = 1k 60 ns ΔG Differential Gain (NTSC) VS = 5V, AV = 2, RL = 150 0.015 % Δθ Differential Phase (NTSC) VS = 5V, AV = 2, RL = 150 0.05 Deg V+ – 0.5 V The l denotes the specifications which apply over the 0°C < TA < 70°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. SYMBOL PARAMETER CONDITIONS TYP MAX UNITS VOS Input Offset Voltage l l l l 200 200 200 200 700 700 850 850 μV μV μV μV VOS TC Input Offset Voltage Drift (Note 8) l l 1.5 1.5 5 5 ΔVOS Input Offset Voltage Shift VCM = V + VCM = V – VCM = V + (LT1806 SOT-23) VCM = V – (LT1806 SOT-23) VCM = V + VCM = V – VCM = V – to V+ VCM = V – to V+ (LT1806 SOT-23) VCM = V –, VCM = V+ l l 100 100 700 850 μV μV l 300 1200 μV VCM = V + – 0.2V VCM = V – + 0.4V l l 1 –5 5 μA μA VCM = V – + 0.4V to V+ – 0.2V l 6 20 μA Input Offset Voltage Match (Channel-to-Channel) (Note 10) IB ΔIB Input Bias Current Input Bias Current Shift MIN –15 μV/°C μV/°C 18067fb 4 LT1806/LT1807 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the 0°C < TA < 70°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. SYMBOL PARAMETER CONDITIONS Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V + – 0.2V VCM = V – + 0.4V VCM = V + – 0.2V VCM = V – + 0.4V VCM = V – + 0.4V to V+ – 0.2V MIN TYP MAX UNITS l l 0.03 0.05 1.5 3.5 μA μA l l 0.03 0.05 0.75 1.80 μA μA l 0.08 2.55 μA IOS Input Offset Current ΔIOS Input Offset Current Shift AVOL Large-Signal Voltage Gain VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2 VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2 l l l 60 7.5 45 175 20 140 V/mV V/mV V/mV CMRR Common Mode Rejection Ratio VS = 5V, VCM = V – to V + VS = 3V, VCM = V – to V + l l 77 72 94 89 dB dB CMRR Match (Channel-to-Channel) (Note 10) VS = 5V, VCM = V – to V + VS = 3V, VCM = V – to V + l l 71 66 94 89 dB dB l V– Input Common Mode Range V+ V Power Supply Rejection Ratio VS = 2.5V to 10V, VCM = 0V l 88 105 dB PSRR Match (Channel-to-Channel) (Note 10) VS = 2.5V to 10V, VCM = 0V l 82 105 dB Minimum Supply Voltage (Note 6) VCM = VO = 0.5V l 2.3 2.5 V VOL Output Voltage Swing LOW (Note 7) No Load ISINK = 5mA ISINK = 25mA l l l 12 60 180 60 140 425 mV mV mV VOH Output Voltage Swing HIGH (Note 7) No Load ISOURCE = 5mA ISOURCE = 25mA l l l 30 110 360 120 220 700 mV mV mV ISC Short-Circuit Current VS = 5V VS = 3V l l IS Supply Current per Amplifier PSRR ISHDN ±30 ±25 ±65 ±55 mA mA l 10 14 mA Disable Supply Current VS = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V l l 0.40 0.22 1.1 0.9 mA mA SHDN Pin Current VS = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V l l 160 110 400 350 μA μA Shutdown Output Leakage Current VSHDN = 0.3V l 1 VL SHDN Pin Input Voltage LOW VH SHDN Pin Input Voltage HIGH l l μA 0.3 V + – 0.5 V V tON Turn-On Time VSHDN = 0.3V to 4.5V, RL = 100Ω l 80 ns tOFF Turn-Off Time VSHDN = 4.5V to 0.3V, RL = 100Ω l 50 ns GBW Gain Bandwidth Product Frequency = 6MHz l 300 MHz SR Slew Rate VS = 5V, AV = –1, RL= 1k, VO = 4V l 100 V/μs FPBW Full Power Bandwidth VS = 5V, VO = 4VP-P l 8 MHz 18067fb 5 LT1806/LT1807 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the –40°C < TA < 85°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS TYP MAX UNITS VOS Input Offset Voltage VCM = V + VCM = V – VCM = V + (LT1806 SOT-23) VCM = V – (LT1806 SOT-23) l l l l 200 200 200 200 800 800 950 950 μV μV μV μV VOS TC Input Offset Voltage Drift (Note 8) VCM = V + VCM = V – l l 1.5 1.5 5 5 ΔVOS Input Offset Voltage Shift VCM = V – to V + VCM = V – to V + (LT1806 SOT-23) l l 100 100 800 950 μV μV l 200 1400 μV 1 –5 6 μA μA Input Offset Voltage Match (Channel-to-Channel) VCM = V –, VCM = V+ (Note 10) IB ΔIB MIN μV/°C μV/°C VCM = V + – 0.2V VCM = V – + 0.4V l l Input Bias Current Shift VCM = V – + 0.4V to V+ – 0.2V l 6 22 μA Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V + – 0.2V VCM = V – + 0.4V VCM = V + – 0.2V VCM = V – + 0.4V VCM = V – + 0.4V to V + – 0.2V l l 0.02 0.05 1.8 4 μA μA l l 0.02 0.05 0.9 2.1 μA μA l 0.07 3 μA Input Bias Current –16 IOS Input Offset Current ΔIOS Input Offset Current Shift AVOL Large-Signal Voltage Gain VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2 VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2 l l l 50 6 35 140 16 100 V/mV V/mV V/mV CMRR Common Mode Rejection Ratio VS = 5V, VCM = V – to V+ VS = 3V, VCM = V – to V+ l l 75 71 94 89 dB dB CMRR Match (Channel-to-Channel) (Note 10) VS = 5V, VCM = V – to V+ VS = 3V, VCM = V – to V+ l l 69 65 94 89 dB dB Input Common Mode Range l V– 86 105 dB 80 105 dB V+ V Power Supply Rejection Ratio VS = 2.5V to 10V, VCM = 0V l PSRR Match (Channel-to-Channel) (Note 10) VS = 2.5V to 10V, VCM = 0V l Minimum Supply Voltage (Note 6) VCM = VO = 0.5V l 2.3 2.5 V VOL Output Voltage Swing LOW (Note 7) No Load ISINK = 5mA ISINK = 20mA l l l 15 65 170 70 150 400 mV mV mV VOH Output Voltage Swing HIGH (Note 7) No Load ISOURCE = 5mA ISOURCE = 20mA l l l 30 110 350 130 240 700 mV mV mV ISC Short-Circuit Current VS = 5V VS = 3V l l IS Supply Current per Amplifier PSRR Disable Supply Current VS = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V ±22 ±20 ±45 ±40 mA mA l 11 16 mA l l 0.4 0.3 1.2 1 mA mA 18067fb 6 LT1806/LT1807 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the –40°C < TA < 85°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS TYP MAX UNITS ISHDN SHDN Pin Current VS = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V l l MIN 170 120 450 400 μA μA Shutdown Output Leakage Current VSHDN = 0.3V l 1.2 μA VL SHDN Pin Input Voltage LOW VH SHDN Pin Input Voltage HIGH tON Turn-On Time VSHDN = 0.3V to 4.5V, RL = 100Ω l 80 ns tOFF Turn-Off Time VSHDN = 4.5V to 0.3V, RL = 100Ω l 50 ns l l 0.3 V + – 0.5 V V GBW Gain Bandwidth Product Frequency = 6MHz l 250 MHz SR Slew Rate VS = 5V, AV = –1, RL= 1k, VO = 4V l 80 V/μs FPBW Full Power Bandwidth VS = 5V, VO = 4VP-P l 6 MHz TA = 25°C. VS = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage ΔVOS Input Offset Voltage Shift VCM = V + VCM = V – VCM = V + (LT1806 SOT-23) VCM = V – (LT1806 SOT-23) VCM = V – to V + VCM = V – to V + (LT1806 SOT-23) VCM = V –, VCM = V+ Input Offset Voltage Match (Channel-to-Channel) (Note 10) IB Input Bias Current VCM = V + VCM = V – + 0.2V MIN –14 TYP MAX UNITS 100 100 100 100 700 700 750 750 μV μV μV μV 50 50 700 750 μV μV 200 1200 μV 1 –5 5 μA μA Input Bias Current Shift VCM = V – + 0.2V to V + 6 19 μA Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V + VCM = V – + 0.2V 0.03 0.05 1.4 3.2 μA μA IOS Input Offset Current VCM = V + VCM = V – + 0.2V 0.03 0.04 0.7 1.6 μA μA ΔIOS Input Offset Current Shift VCM = V – + 0.2V to V + 0.07 2.3 Input Noise Voltage 0.1Hz to 10Hz 800 nVp-p en Input Noise Voltage Density f = 10kHz 3.5 nV/√Hz in Input Noise Current Density f = 10kHz 1.5 pA/√Hz CIN Input Capacitance f = 10kHz 2 AVOL Large-Signal Voltage Gain VO = –4V to 4V, RL = 1k VO = –2.5V to 2.5V, RL = 100Ω ΔIB 100 10 300 27 μA pF V/mV V/mV 18067fb 7 LT1806/LT1807 ELECTRICAL CHARACTERISTICS TA = 25°C. VS = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP CMRR Common Mode Rejection Ratio VCM = V – to V + 83 106 = V – to V + 77 106 CMRR Match (Channel-to-Channel) (Note 10) VCM V– Input Common Mode Range MAX UNITS dB dB V+ V Power Supply Rejection Ratio V + = 2.5V to 10V, V – = 0V 90 105 dB PSRR Match (Channel-to-Channel) (Note 10) V + = 2.5V to 10V, V – = 0V 84 105 dB VOL Output Voltage Swing LOW (Note 7) No Load ISINK = 5mA ISINK = 25mA 14 55 180 60 140 450 mV mV mV VOH Output Voltage Swing HIGH (Note 7) No Load ISOURCE = 5mA ISOURCE = 25mA 20 90 360 70 200 700 mV mV mV ISC Short-Circuit Current IS Supply Current per Amplifier PSRR ISHDN ±40 ±85 mA 11 16 mA Disable Supply Current VSHDN = 0.3V 0.4 1.2 mA SHDN Pin Current VSHDN = 0.3V 150 350 μA Shutdown Output Leakage Current VSHDN = 0.3V 0.3 75 μA 0.3 V VL SHDN Pin Input Voltage LOW VH SHDN Pin Input Voltage HIGH tON Turn-On Time VSHDN = 0.3V to 4.5V, RL = 100Ω 80 ns tOFF Turn-Off Time VSHDN = 4.5V to 0.3V, RL = 100Ω 50 ns GBW Gain Bandwidth Product Frequency = 6MHz 170 325 MHz SR Slew Rate AV = –1, RL = 1k, VO = ±4V, Measured at VO = ±3V 70 140 V/μs V + – 0.5 V FPBW Full Power Bandwidth VO = 8VP-P 5.5 MHz HD Harmonic Distortion AV = 1, RL = 1k, VO = 2VP-P , fC = 5MHz – 80 dBc tS Settling Time 0.01%, VSTEP = 8V, AV = 1, RL = 1k 120 ns ΔG Differential Gain (NTSC) AV = 2, RL = 150 0.01 % Δθ Differential Phase (NTSC) AV = 2, RL = 150 0.01 Deg The l denotes the specifications which apply over the 0°C < TA < 70°C temperature range. VS = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage VOS TC Input Offset Voltage Drift (Note 8) ΔVOS Input Offset Voltage Shift VCM = V + VCM = V – VCM = V + (LT1806 SOT-23) VCM = V – (LT1806 SOT-23) VCM = V + VCM = V – VCM = V – to V + VCM = V – to V + (LT1806 SOT-23) MIN TYP MAX UNITS l l l l 200 200 200 200 800 800 900 900 μV μV μV μV l l 1.5 1.5 5 5 l l 100 100 800 900 μV/°C μV/°C μV μV 18067fb 8 LT1806/LT1807 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the 0°C < TA < 70°C temperature range. VS = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS Input Offset Voltage Match (Channel-to-Channel) VCM = V –, VCM = V + (Note 10) IB ΔIB MIN l TYP MAX UNITS 300 1400 μV 1 –6 6 μA μA VCM = V + – 0.2V VCM = V – + 0.4V l l Input Bias Current Shift VCM = V – + 0.4V to V + – 0.2V l 7 21 μA Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V + – 0.2V VCM = V – + 0.4V VCM = V + – 0.2V VCM = V – + 0.4V VCM = V – + 0.4V to V + – 0.2V l l 0.03 0.04 1.8 3.8 μA μA l l 0.03 0.04 0.9 1.9 μA μA l 0.07 2.8 μA 80 8 250 25 V/mV V/mV dB Input Bias Current IOS Input Offset Current ΔIOS Input Offset Current Shift –15 AVOL Large-Signal Voltage Gain VO = –4V to 4V, RL = 1k VO = –2.5V to 2.5V, RL = 100Ω l l CMRR Common Mode Rejection Ratio VCM = V – to V + l 81 100 CMRR Match (Channel-to-Channel) (Note 10) VCM = V – to V + l 75 100 dB l V– Power Supply Rejection Ratio V + = 2.5V to 10V, V – = 0V l 88 105 dB PSRR Match (Channel-to-Channel) (Note 10) V + = 2.5V to 10V, V – = 0V l 82 106 dB VOL Output Voltage Swing LOW (Note 7) No Load ISINK = 5mA ISINK = 25mA l l l 18 60 185 80 160 500 mV mV mV VOH Output Voltage Swing HIGH (Note 7) No Load ISOURCE = 5mA ISOURCE = 25mA l l l 40 110 360 140 240 750 mV mV mV ISC Short-Circuit Current IS Supply Current per Amplifier Input Common Mode Range PSRR ISHDN l ±35 V+ ±75 V mA l 14 20 mA Disable Supply Current VSHDN = 0.3V l 0.4 1.4 mA SHDN Pin Current VSHDN = 0.3V l 160 400 μA Shutdown Output Leakage Current VSHDN = 0.3V l 1 VL SHDN Pin Input Voltage LOW l μA 0.3 V VH SHDN Pin Input Voltage HIGH tON Turn-On Time VSHDN = 0.3V to 4.5V, RL = 100Ω l 80 ns tOFF Turn-Off Time VSHDN = 4.5V to 0.3V, RL = 100Ω l 50 ns GBW Gain Bandwidth Product Frequency = 6MHz l 150 300 MHz SR Slew Rate AV = –1, RL = 1k, VO = ± 4V, Measure at VO = ±3V l 60 120 V/μs FPBW Full Power Bandwidth VO = 8VP-P l 4.5 MHz l V + – 0.5 V 18067fb 9 LT1806/LT1807 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the −40°C < TA < 85°C temperature range. VS = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS TYP MAX UNITS VOS Input Offset Voltage VCM = V + VCM = V – VCM = V + (LT1806 SOT-23) VCM = V – (LT1806 SOT-23) l l l l 200 200 200 200 900 900 975 975 μV μV μV μV VOS TC Input Offset Voltage Drift (Note 8) VCM = V + VCM = V – l l 1.5 1.5 5 5 ΔVOS Input Offset Voltage Shift VCM = V – to V + VCM = V – to V + (LT1806 SOT-23) l l 100 100 900 975 μV μV l 300 1600 μV 1.2 –5 7 μA μA Input Offset Voltage Match (Channel-to-Channel) VCM = V –, VCM = V + (Note 10) IB ΔIB MIN μV/°C μV/°C VCM = V + – 0.2V VCM = V – + 0.4V l l Input Bias Current Shift VCM = V – + 0.4V to V + – 0.2V l 6 23 μA Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V + – 0.2V VCM = V – + 0.4V VCM = V + – 0.2V VCM = V – + 0.4V VCM = V – + 0.4V to V + – 0.2V l l 0.03 0.04 2 4.5 μA μA l l 0.03 0.04 1.0 2.2 μA μA l 0.07 3.2 μA Input Bias Current –16 IOS Input Offset Current ΔIOS Input Offset Current Shift AVOL Large-Signal Voltage Gain VO = – 4V to 4V, RL = 1k VO = –2V to 2V, RL =100Ω l l 60 7 175 17 V/mV V/mV CMRR Common Mode Rejection Ratio VCM = V – to V+ l 80 100 dB = V – to V+ l 74 100 l V– l 86 105 dB l 80 105 dB CMRR Match (Channel-to-Channel) (Note 10) VCM Input Common Mode Range PSRR Power Supply Rejection Ratio V + = 2.5V to 10V, V – = 0V PSRR Match (Channel-to-Channel) (Note 10) dB V+ V VOL Output Voltage Swing LOW (Note 7) No Load ISINK = 5mA ISINK = 20mA l l l 20 65 200 100 170 500 mV mV mV VOH Output Voltage Swing HIGH (Note 7) No Load ISOURCE = 5mA ISOURCE = 20mA l l l 50 115 360 160 260 700 mV mV mV ISC Short-Circuit Current l IS Supply Current per Amplifier l 15 22 mA mA ISHDN ±25 ±55 mA Disable Supply Current VSHDN = 0.3V l 0.45 1.5 SHDN Pin Current VSHDN = 0.3V l 170 400 Shutdown Output Leakage Current VSHDN = 0.3V l 1.2 VL SHDN Pin Input Voltage LOW VH SHDN Pin Input Voltage HIGH tON Turn-On Time l l VSHDN = 0.3V to 4.5V, RL = 100Ω l 0.3 V + – 0.5 μA μA V V 80 ns 18067fb 10 LT1806/LT1807 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the −40°C < TA < 85°C temperature range. VS = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS tOFF Turn-Off Time VSHDN = 4.5V to 0.3V, RL = 100Ω l GBW Gain Bandwidth Product Frequency = 6MHz l SR Slew Rate A V = –1, RL = 1k, VO = ±4V, Measure at VO = ±3V l FPBW Full Power Bandwidth VO = 8VP-P l Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by back-to-back diodes. If the differential input voltage exceeds 1.4V, the input current should be limited to less than 10mA. This parameter is guaranteed to meet specified performance through design and/or characterization. It is not 100% tested. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. Note 4: The LT1806C/LT1806I and LT1807C/LT1807I are guaranteed functional over the temperature range of –40°C and 85°C. Note 5: The LT1806C/LT1807C are guaranteed to meet specified performance from 0°C to 70°C. The LT1806C/LT1807C are designed, MIN TYP MAX UNITS 50 ns 125 290 MHz 50 100 V/μs 4 MHz characterized and expected to meet specified performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LT1806I/ LT1807I are guaranteed to meet specified performance from –40°C to 85°C. Note 6: Minimum supply voltage is guaranteed by power supply rejection ratio test. Note 7: Output voltage swings are measured between the output and power supply rails. Note 8: This parameter is not 100% tested. Note 9: Thermal resistance varies depending upon the amount of PC board metal attached to the V – pin of the device. θJA is specified for a certain amount of 2oz copper metal trace connecting to the V – pin as described in the thermal resistance tables in the Applications Information section. Note 10: Matching parameters are the difference between the two amplifiers of the LT1807. TYPICAL PERFORMANCE CHARACTERISTICS VOS Distribution, VCM = 0V (PNP Stage) 50 VS = 5V, 0V VCM = 0V 30 20 10 0 –500 VS = 5V, 0V VCM = 5V 40 PERCENT OF UNITS (%) PERCENT OF UNITS (%) 40 ΔVOS Shift for VCM = 0V to 5V 50 30 20 10 –300 100 300 –100 INPUT OFFSET VOLTAGE (μV) 500 18067 G01 0 –500 VS = 5V, 0V 40 PERCENT OF UNITS (%) 50 VOS Distribution, VCM = 5V (NPN Stage) 30 20 10 –300 100 300 –100 INPUT OFFSET VOLTAGE (μV) 500 18067 G02 0 –500 –300 100 300 –100 INPUT OFFSET VOLTAGE (μV) 500 18067 G03 18067fb 11 LT1806/LT1807 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current per Amp vs Supply Voltage Offset Voltage vs Input Common Mode 5 500 400 300 OFFSET VOLTAGE (μV) 15 TA = 125°C 10 TA = 25°C TA = –55°C 200 TA = 25°C 100 0 –100 TA = –55°C –200 –300 0 0 1 2 3 4 5 6 7 8 9 10 11 12 TOTAL SUPPLY VOLTAGE (V) –500 10 OUTPUT SATURATION VOLTAGE (V) –2 –3 PNP ACTIVE VS = 5V, 0V VCM = 0V –4 –5 –6 –7 –8 –50 –35 –20 –5 10 25 40 55 TEMPERATURE (°C) 70 85 10 1 0.1 TA = 125°C 0.01 TA = –55°C 0.001 0.01 TA = 25°C 0.1 1 10 LOAD CURRENT (mA) OUTPUT SHORT-CIRCUIT CURRENT (mA) 0.6 0.4 TA = 125°C 0 –0.2 –0.4 TA = 25°C –0.6 TA = –55°C –0.8 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 TOTAL SUPPLY VOLTAGE (V) 5.0 18067 G10 TA = 125°C TA = 25°C 0.01 TA = –55°C 0.1 1 10 LOAD CURRENT (mA) 18067 G09 18 100 100 Supply Current vs SHDN Pin Voltage TA = –55°C 16 TA = 125°C 14 VS = 5V, 0V 80 TA = 25°C 60 “SINKING” 40 20 0 –20 “SOURCING” –40 TA = –55°C –60 –80 TA = 25°C TA = 125°C 1.5 4.0 4.5 2.0 2.5 3.0 3.5 POWER SUPPLY VOLTAGE (pV) TA = 125°C 12 TA = 25°C 10 8 6 TA = –55°C 4 2 –100 –1.0 0.1 0.001 0.01 120 0.2 1 Output Short-Circuit Current vs Power Supply Voltage 1.0 CHANGE IN OFFSET VOLTAGE (mV) 100 VS = p5V 18067 G08 Minimum Supply Voltage 6 Output Saturation Voltage vs Load Current (Output High) VS = p5V 18067 G07 0.8 4 5 1 2 3 COMMON MODE VOLTAGE (V) 18067 G06 SUPPLY CURRENT (mA) INPUT BIAS (μA) –1 0 –1 5 Output Saturation Voltage vs Load Current (Output Low) 2 NPN ACTIVE VS = 5V, 0V VCM = 5V TA = 125°C TA = 25°C TA = –55°C 18067 G05 Input Bias Current vs Temperature 0 –5 –10 1 3 4 2 INPUT COMMON MODE VOLTAGE (V) 0 18067 G04 1 TA = 125°C TA = 25°C TA = –55°C 0 VS = 5V, 0V TYPICAL PART –400 OUTPUT SATURATION VOLTAGE (V) 5 VS = 5V, 0V TA = 125°C INPUT BIAS CURRENT (μA) 20 SUPPLY CURRENT (mA) Input Bias Current vs Common Mode Voltage 5.0 18067 G11 0 0 1 4 3 2 SHDN PIN VOLTAGE (V) 5 18067 G12 18067fb 12 LT1806/LT1807 TYPICAL PERFORMANCE CHARACTERISTICS SHDN Pin Current vs SHDN Pin Voltage 20 VS = 5V, 0V 0 Open-Loop Gain 300 –80 TA = 25°C –100 TA = –55°C –120 200 INPUT VOLTAGE (μV) TA = 125°C –60 RL = 1k 100 0 –100 RL = 100Ω –200 200 0 –100 –300 –400 –400 –180 –500 –500 3 4 2 SHDN PIN VOLTAGE (V) 0 5 0.5 1.5 2.0 1.0 OUTPUT VOLTAGE (V) Warm-Up Drift vs Time (LT1806S8) Offset Voltage vs Output Current 300 OFFSET VOLTAGE (mV) 200 RL = 1k RL = 100Ω –200 40 TA = 125°C 1.5 100 45 VS = p5V 2.0 OFFSET VOLTAGE DRIFT (μV) 2.5 VS = p5V 400 –100 18067 G15 18067 G14 Open-Loop Gain 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 OUTPUT VOLTAGE (V) 3.0 2.5 18067 G13 500 TA = 25°C 1.0 0.5 0 TA = –55°C –0.5 –1.0 30 25 20 10 –400 –2.0 5 –2.5 –100 –80 –60 –40 –20 0 20 40 60 80 100 OUTPUT CURRENT (mA) 0 4 5 18067 G16 12 PNP ACTIVE VCM = 2.5V 4 800 6 0 0 100 18067 G19 PNP ACTIVE VCM = 2.5V 4 2 1 10 FREQUENCY (kHz) 600 8 2 0.1 40 60 80 100 120 140 160 TIME AFTER POWER-UP (SEC) 1000 VS = 5V, 0V OUTPUT VOLTAGE (nV) NOISE CURRENT (pA/Hz) NOISE VOLTAGE (nV/Hz) 6 20 0.1Hz to 10Hz Output Voltage Noise 10 10 NPN ACTIVE VCM = 4.5V 0 18067 G18 Input Noise Current vs Frequency VS = 5V, 0V 8 VS = p1.5V 18067 G17 Input Noise Voltage vs Frequency 12 VS = p2.5V 15 –1.5 –5 –4 –3 –2 –1 0 1 2 3 OUTPUT VOLTAGE (V) VS = p5V 35 –300 –500 RL = 100Ω –200 –160 1 RL = 1k 100 –300 0 VS = 5V, 0V RL TO GND 400 300 –20 –40 –140 INPUT VOLTAGE (μV) 500 VS = 3V, 0V RL TO GND 400 INPUT VOLTAGE (μV) SHDN PIN CURRENT (μA) Open-Loop Gain 500 400 200 0 –200 –400 –600 NPN ACTIVE VCM = 4.5V 0.1 –800 1 10 FREQUENCY (kHz) 100 18067 G19 –1000 0 1 2 3 4 5 6 TIME (SEC) 7 8 9 10 18067 G21 18067fb 13 LT1806/LT1807 TYPICAL PERFORMANCE CHARACTERISTICS 55 50 50 45 35 30 GAIN BANDWIDTH PRODUCT 350 30 350 250 250 1 2 3 4 5 6 7 8 TOTAL SUPPLY VOLTAGE (V) 9 GBW PRODUCT VS = p5V 400 300 0 Gain and Phase vs Frequency Gain vs Frequency (AV = 2) CL = 10pF 24 RL = 100Ω 135 18 15 90 12 12 6 9 45 30 PHASE VS = 3V 0 GAIN (dB) 180 60 PHASE VS = p5V CL = 10pF 18 RL = 100Ω 0 VS = p5V –45 0 –90 –12 –135 –18 –3 –180 –24 –6 –20 CL = 5pF RL = 100Ω –30 0.1 1 10 FREQUENCY (MHz) GAIN VS = 3V –225 500 100 VS = 3V –36 0.1 1 10 FREQUENCY (MHz) 100 100 COMMON MODE REJECTION RATIO (dB) 100 10 1 AV = 2 AV = 10 AV = 1 0.1 0.01 0.001 100k 1M 10M FREQUENCY (Hz) 100M –9 0.1 500 500M 18067 G28 1 10 FREQUENCY (MHz) 100 Power Supply Rejection Ratio vs Frequency VS = 5V, 0V 90 80 70 60 50 40 30 20 10 0 0.01 0.1 1 10 FREQUENCY (MHz) 100 500 18067 G27 Common Mode Rejection Ratio vs Frequency Output Impedance vs Frequency VS = 5V, 0V VS = 3V 18067 G26 18067 G25 600 3 0 500 18067 G29 100 POWER SUPPLY REJECTION RATIO (dB) –10 –6 VS = p5V 6 10 GAIN VS = p5V 5 25 45 65 85 105 125 TEMPERATURE (°C) 18067 G24 21 PHASE (DEG) GAIN (dB) 75 –55 –35 –15 Gain vs Frequency (AV = 1) 50 OUTPUT IMPEDANCE (Ω) VS = p2.5V 30 225 20 125 18067 G23 70 40 VS = p5V 100 5 25 45 65 85 105 125 TEMPERATURE (°C) 18067 G22 AV = –1 RF = RG = 1k RL = 1k 150 GBW PRODUCT VS = 3V 200 –55 –35 –15 10 40 35 300 200 45 PHASE MARGIN VS = 3V GAIN (dB) 400 PHASE MARGIN VS = p5V 175 PHASE MARGIN (DEG) 40 PHASE MARGIN (DEG) GAIN BANDWIDTH (MHz) PHASE MARGIN Slew Rate vs Temperature 55 GAIN BANDWIDTH (MHz) TA = 25°C Gain Bandwidth and Phase Margin vs Temperature SLEW RATE (μV/μs) Gain Bandwidth and Phase Margin vs Supply Voltage VS = 5V, 0V TA = 25°C 90 80 70 POSITIVE SUPPLY 60 50 40 NEGATIVE SUPPLY 30 20 10 0 0.001 0.01 0.1 1 FREQUENCY (MHz) 10 100 18067 G30 18067fb 14 LT1806/LT1807 TYPICAL PERFORMANCE CHARACTERISTICS Series Output Resistor vs Capacitive Load Series Output Resistor vs Capacitive Load 50 VS = 5V, 0V 45 AV = 2 ROS = 20Ω 30 25 20 15 10 35 25 20 ROS = 20Ω 15 0 100 CAPACITIVE LOAD (pF) 1000 100 CAPACITIVE LOAD (pF) 10 1000 18067 G31 Distortion vs Frequency Distortion vs Frequency –40 AV = 1 VOUT = 2VP-P VS = p5V –50 –70 RL = 100Ω, 2ND RL = 100Ω, 3RD RL = 1k, 3RD –90 RL = 100Ω, 2ND –80 RL = 1k, 2ND –90 10 1 FREQUENCY (MHz) 10 4.6 –60 RL = 100Ω, 2ND RL = 1k, 2ND –80 RL = 1k, 3RD –90 –100 –110 –120 0.3 RL = 1k, 3RD –120 0.3 30 1 10 30 FREQUENCY (MHz) 18067 G36 Maximum Undistorted Output Signal vs Frequency AV = 2 VOUT = 2VP-P VS = 5V, 0V RL = 100Ω, 3RD –70 RL = 1k, 2ND –90 18067 G35 Distortion vs Frequency –50 RL = 100Ω, 2ND FREQUENCY (MHz) 18067 G34 –40 –80 –110 –110 0.3 30 RL = 100Ω, 3RD –70 –100 RL = 1k, 3RD –100 1 AV = 2 VOUT = 2VP-P VS = p5V –60 RL = 100Ω, 3RD –70 RL = 1k, 2ND –100 –110 0.3 –50 1 10 30 FREQUENCY (MHz) 18067 G37 OUTPUT VOLTAGE SWING (VP-P) –80 Distortion vs Frequency –40 AV = 1 VOUT = 2VP-P VS = 5V, 0V –60 DISTORTION (dBc) –60 DISTORTION (dBc) DISTORTION (dBc) –50 18067 G33 18067 G32 DISTORTION (dBc) 10 –40 VS = p5V 20ns/DIV VOUT = p4V RL = 500Ω tS = 120ns (SETTLING TIME) ROS = RL = 50Ω 5 0 OUTPUT SETTLING RESOLUTION (2mV/DIV) ROS = 10Ω 30 10 ROS = RL = 50Ω 5 INPUT SIGNAL GENERATION (2V/DIV) 40 ROS = 10Ω OVERSHOOT (%) OVERSHOOT (%) 40 35 0.01% Settling Time 50 VS = 5V, 0V 45 AV = 1 VS = 5V, 0V 4.5 AV = –1 4.4 4.3 AV = 2 4.2 4.1 4.0 3.9 0.1 1 10 FREQUENCY (MHz) 100 18067 G38 18067fb 15 LT1806/LT1807 TYPICAL PERFORMANCE CHARACTERISTICS ±5V Large-Signal Response ±5V Small-Signal Response 0V 0V VS = p5V 40ns/DIV FREQ = 1.92MHz AV = 1 RL = 1k VS = p5V 20ns/DIV FREQ = 4.48MHz AV = 1 RL = 1k 18067 G39 5V Large-Signal Response 18067 G40 5V Small-Signal Response 0V 0.5V VS = 5V, 0V 20ns/DIV FREQ = 5.29MHz AV = 1 RL = 1k VS = 5V, 0V AV = 1 RL = 1k 18067 G41 Output Overdriven Recovery 10ns/DIV 18067 G42 Shutdown Response VIN (1V/DIV) VSHDN (2V/DIV) 0V VOUT (2V/DIV) 0V 0V VOUT (2V/DIV) 0V VS = 5V, 0V AV = 2 RL = 1k 100ns/DIV 18067 G43 VS = 5V, 0V AV = 2 RL = 100Ω 20ns/DIV 18067 G44 18067fb 16 LT1806/LT1807 APPLICATIONS INFORMATION Rail-to-Rail Characteristics The LT1806/LT1807 have input and output signal range that covers from negative power supply to positive power supply. Figure 1 depicts a simplified schematic of the amplifier. The input stage is comprised of two differential amplifiers, a PNP stage Q1/Q2 and a NPN stage Q3/Q4 that are active over different ranges of common mode input voltage. The PNP differential pair is active between the negative supply to approximately 1.5V below the positive supply. As the input voltage moves closer toward the positive supply, the transistor Q5 will steer the tail current I1 to the current mirror Q6/Q7, activating the NPN differential pair. The PNP pair becomes inactive for the rest of the input common mode range up to the positive supply. A pair of complementary common emitter stages Q14/Q15 that enable the output to swing from rail to rail constructs the output stage. The capacitors C1 and C2 form the local feedback loops that lower the output impedance at high frequency. These devices are fabricated on Linear Technology’s proprietary high speed complementary bipolar process. Power Dissipation The LT1806/LT1807 amplifiers combine high speed with large output current in a small package, so there is a need to ensure that the die’s junction temperature does not exceed 150°C. The LT1806 is housed in an SO-8 package or a 6-lead SOT-23 package and the LT1807 is in an SO-8 or V+ R6 40k R3 Q16 V+ Q17 V+ ESDD5 D9 SHDN R7 100k R4 R5 V– ESDD1 + D1 ESDD2 Q12 Q11 I1 Q13 +IN D6 D8 D5 D7 ESDD6 V– –IN Q5 I2 CC V– OUT Q1 Q2 D3 ESDD3 V– + VBIAS Q4 Q3 ESDD4 BIAS GENERATION D2 Q15 C2 BUFFER AND OUTPUT BIAS Q10 V+ D4 Q9 Q8 C1 Q7 Q14 Q6 R1 V– R2 18067 F01 Figure 1. LT1806 Simplified Schematic Diagram 18067fb 17 LT1806/LT1807 APPLICATIONS INFORMATION 8-lead MSOP package. All packages have the V – supply pin fused to the lead frame to enhance the thermal conductance when connecting to a ground plane or a large metal trace. Metal trace and plated through-holes can be used to spread the heat generated by the device to the backside of the PC board. For example, on a 3/32" FR-4 board with 2oz copper, a total of 660 square millimeters connects to Pin 4 of LT1807 in an SO-8 package (330 square millimeters on each side of the PC board) will bring the thermal resistance, θJA , to about 85°C/W. Without extra metal trace beside the power line connecting to the V – pin to provide a heat sink, the thermal resistance will be around 105°C/W. More information on thermal resistance for all packages with various metal areas connecting to the V – pin is provided in Tables 1, 2 and 3. Table 1. LT1806 6-Lead SOT-23 Package COPPER AREA TOPSIDE (mm2) BOARD AREA (mm2) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 270 2500 135°C/W 100 2500 145°C/W 20 2500 160°C/W 0 2500 200°C/W Device is mounted on topside. Table 2. LT1806/LT1807 SO-8 Package COPPER AREA TOPSIDE (mm2) BACKSIDE (mm2) BOARD AREA (mm2) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 1100 1100 2500 65°C/W 330 330 2500 85°C/W 35 35 2500 95°C/W 35 0 2500 100°C/W 0 0 2500 105°C/W Table 3. LT1807 8-Lead MSOP Package COPPER AREA TOPSIDE (mm2) BACKSIDE (mm2) BOARD AREA (mm2) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 540 540 2500 110°C/W 100 100 2500 120°C/W 100 0 2500 130°C/W 30 0 2500 135°C/W 0 0 2500 140°C/W Device is mounted on topside. Junction temperature TJ is calculated from the ambient temperature TA and power dissipation PD as follows: TJ = TA + (PD • θJA) The power dissipation in the IC is the function of the supply voltage, output voltage and the load resistance. For a given supply voltage, the worst-case power dissipation PD(MAX) occurs at the maximum quiescent supply current and at the output voltage which is half of either supply voltage (or the maximum swing if it is less than 1/2 the supply voltage). PD(MAX) is given by: PD(MAX) = (VS • IS(MAX)) + (VS/2)2/RL Example: An LT1807 in SO-8 mounted on a 2500mm2 area of PC board without any extra heat spreading plane connected to its V – pin has a thermal resistance of 105°C/W, θJA. Operating on ±5V supplies with both amplifiers simultaneously driving 50Ω loads, the worst-case power dissipation is given by: PD(MAX) = 2 • (10 • 14mA) + 2 • (2.5)2/50 = 0.28 + 0.25 = 0.53W Device is mounted on topside. 18067fb 18 LT1806/LT1807 APPLICATIONS INFORMATION The maximum ambient temperature that the part is allowed to operate is: TA = TJ – (PD(MAX) • 105°C/W) = 150°C – (0.53W • 105°C/W) = 94°C To operate the device at higher ambient temperature, connect more metal area to the V – pin to reduce the thermal resistance of the package as indicated in Table 2. Input Offset Voltage The offset voltage will change depending upon which input stage is active and the maximum offset voltage is guaranteed to less than 550μV. To maintain the precision characteristics of the amplifier, the change of VOS over the entire input common mode range (CMRR) is limited to be less than 550μV on a single 5V and 3V supply. Input Bias Current The input bias current polarity depends on a given input common voltage at which the input stage is operating. When the PNP input stage is active, the input bias currents flow out of the input pins. When the NPN input stage is activated, the input bias current flows into the input pins. Because the input offset current is less than the input bias current, matching the source resistances at the input pins will reduce total offset error. Output The LT1806/LT1807 can deliver a large output current, so the short-circuit current limit is set around 85mA to prevent damage to the device. Attention must be paid to keep the junction temperature of the IC below the absolute maximum rating of 150°C (refer to the Power Dissipation section) when the output is continuously short-circuited. The output of the amplifier has reverse-biased diodes connected to each supply. If the output is forced beyond either supply, unlimited current will flow through these diodes. If the current is transient and limited to one hundred milliamps or less, no damage to the device will occur. Overdrive Protection When the input voltage exceeds the power supplies, two pairs of crossing diodes D1 to D4 will prevent the output from reversing polarity. If the input voltage exceeds either power supply by 700mV, diode D1/D2 or D3/D4 will turn on to keep the output at the proper polarity. For the phase reversal protection to perform properly, the input current must be limited to less than 5mA. If the amplifier is severely overdriven, an external resistor should be used to limit the overdrive current. 18067fb 19 LT1806/LT1807 APPLICATIONS INFORMATION The LT1806/LT1807’s input stages are also protected against large differential input voltages of 1.4V or higher by a pair of back-to-back diodes, D5/D8, that prevent the emitter-base breakdown of the input transistors. The current in these diodes should be limited to less than 10mA when they are active. The worst-case differential input voltage usually occurs when the input is driven while the output is shorted to ground in a unity gain configuration. In addition, the amplifier is protected against ESD strikes up to 3kV on all pins by a pair of protection diodes, ESDD1 to ESDD6, on each pin that are connected to the power supplies as shown in Figure 1. Feedback Components Capacitive Load SHDN Pin The LT1806/LT1807 are optimized for high bandwidth and low distortion applications. They can drive a capacitive load of about 20pF in a unity-gain configuration, and more for higher gain. When driving a larger capacitive load, a resistor of 10Ω to 50Ω should be connected between the output and the capacitive load to avoid ringing or oscillation. The feedback should still be taken from the output so that the resistor will isolate the capacitive load to ensure stability. Graphs on capacitive loads indicate the transient response of the amplifier when driving the capacitive load with a specified series resistor. The LT1806 has a SHDN pin to reduce the supply current to less than 0.9mA. When the SHDN pin is pulled low, it will generate a signal to power down the device. If the pin is left unconnected, an internal pull-up resistor of 40k will keep the part fully operating as shown in Figure 1. The output will be high impedance during shutdown, and the turn-on and turn-off time is less than 100ns. Because the input is protected by a pair of back to back diodes, the input signal will feed through to the output during shutdown mode if the amplitude of signal between the inputs is larger than 1.4V. When feedback resistors are used to set up gain, care must be taken to ensure that the pole formed by the feedback resistors and the total capacitance at the inverting input does not degrade stability. For instance, the LT1806/LT1807 in a noninverting gain of 2, set up with two 1k resistors and a capacitance of 3pF (part plus PC board) will probably ring in transient response. The pole is formed at 106MHz that will reduce phase margin by 34 degrees when the crossover frequency of the amplifier is around 70MHz. A capacitor of 3pF or higher connected across the feedback resistor will eliminate any ringing or oscillation. 18067fb 20 LT1806/LT1807 TYPICAL APPLICATIONS Driving A/D Converter The LT1806/LT1807 have 60ns settling time to 0.01% on a 2V step signal, and 20Ω output impedance at 100MHz, that makes them ideal for driving high speed A/D converters. With the rail-to-rail input and output, and low supply voltage operation, the LT1806/LT1807 are also desirable for single supply applications. As shown in the application on the front page of this data sheet, the LT1807 drives a 10Msps, 12-bit, LTC1420 ADC in a gain of 20. Driving the LTC1420 differentially will optimize the signal-to-noise ratio, SNR, and the total harmonic distortion, THD, of the A/D converter. The lowpass filter, R5, R6 and C3 reduce noise or distortion products that might come from the input signal. High quality capacitors and resistors, NPO chip capacitor and metal film surface mount resistors, should be used since these components can add to distortion. The voltage glitch of the converter, due to its sampling nature is buffered by the LT1807, and the ability of the amplifier to settle it quickly will affect the spurious free dynamic range of the system. Figure 2 depicts the LT1806 driving LTC1420 at noninverting gain of 2 configuration. The FFT responses show a better than 92dB of spurious free dynamic range, SFDR. 0 VS = p5V AV = 2 fSAMPLE = 10Msps fIN = 1.4086MHz SFDR = 92.5dB 5V 5V VIN 1.5VP-P + R3 49.9Ω LT1806 +AIN C1 470pF – –5V –AIN LTC1420 PGA GAIN = 1 REF = 2.048V R2 1k • • • 18067 F02 –5V R1 1k 12 BITS 10Msps AMPLITUDE (dB) –20 –40 –60 –80 –100 –120 0 1 2 3 FREQUENCY (MHz) 5 4 18067 F03 Figure 2. Noninverting A/D Driver Figure 3. 4096 Point FFT Response 18067fb 21 LT1806/LT1807 TYPICAL APPLICATIONS Single Supply Video Line Driver The LT1806/LT1807 are wideband rail-to-rail op amps with large output current that allows them to drive video signals in low supply applications. Figure 4 depicts a single supply video line driver with AC coupling to minimize the quiescent power dissipation. Resistors R1 and R2 are used to levelshift the input and output to provide the largest signal swing. The gain of 2 is set up with R3 and R4 to restore the signal at VOUT, which is attenuated by 6dB due to the matching of the 75Ω line with the back-terminated resistor, R5. The back termination will eliminate any reflection of the signal that comes from the load. The input termination resistor, RT, is optional—it is used only if matching of the incoming line is necessary. The values of C1, C2 and C3 are selected to minimize the droop of the luminance signal. In some less stringent requirements, the value of capacitors could be reduced. The –3dB bandwidth of the driver is about 90MHz on 5V supply, and the amount of peaking will vary upon the value of capacitor C4. 5V + R1 5k 3 VIN RT 75Ω R2 5k C3 1000μF 7 + 6 LT1806 2 – 4 75W COAX CABLE VOUT RLOAD 75Ω R4 1k 18067 F04 C4 3pF R3 1k + R5 75Ω + C1 33μF C2 150μF Figure 4. 5V Single Supply Video Line Driver 5 4 VS = 5V, 0V VOLTAGE GAIN (dB) 3 2 1 0 –1 –2 –3 –4 –5 0.2 1 10 FREQUENCY (MHz) 100 18067 F05 Figure 5. Video Line Driver Frequency Response 18067fb 22 LT1806/LT1807 TYPICAL APPLICATIONS Single 3V Supply, 4MHz, 4th Order Butterworth Filter Benefiting from a low voltage supply operation, low distortion and rail-to-rail output of LT1806/LT1807, a low distortion filter that is suitable for antialiasing can be built as shown in Figure 6. On a 3V supply, the filter built with LT1807 has a passband of 4MHz with 2.5VP-P signal and stopband that is greater than 70dB to frequency of 100MHz. As an option to minimize the DC offset voltage at the output, connect a series resistor of 365Ω and a bypass capacitor at the noninverting inputs of the amplifiers as shown in Figure 6. 232Ω 274Ω 47pF 22pF 232Ω 665Ω – VIN 220pF VS 274Ω 562Ω – 1/2 LT1807 470pF + 365Ω (OPTIONAL) 1/2 LT1807 VOUT + 2 18067 F06 4.7μF (OPTIONAL) Figure 6. Single 3V Supply, 4MHz, 4th Order Butterworth Filter 10 0 –10 GAIN (dB) –20 –30 –40 –50 –60 –70 –80 VS = 3V, 0V VIN = 2.5VP-P –90 10k 100k 1M 10M FREQUENCY (Hz) 100M 18067 F07 Figure 7. Filter Frequency Response 18067fb 23 LT1806/LT1807 TYPICAL APPLICATIONS 1MHz Series Resonant Crystal Oscillator with Square and Sinusoid Outputs edge and the crystal capacitance (middle trace of Figure 9). Sinusoid amplitude stability is maintained by the fact that the sine wave is basically a filtered version of the square wave; the usual amplitude control loops associated with sinusoidal oscillators are not immediately necessary.1 One can make use of this sine wave by buffering and filtering it, and this is the combined task of the LT1806. It is configured as a bandpass filter with a Q of 5 and does a good job of cleaning up and buffering the sine wave. Distortion was measured at –70dBc and –60dBc on the second and third harmonics. Figure 8 shows a classic 1MHz series resonant crystal oscillator. At series resonance, the crystal is a low impedance and the positive feedback connection is what brings about oscillation at the series resonance frequency. The RC feedback around the other path ensures that the circuit does not find a stable DC operating point and refuse to oscillate. The comparator output is a 1MHz square wave with a measured jitter of 28psRMS with a 5V supply and 40psRMS with a 3V supply. On the other side of the crystal, however, is an excellent looking sine wave except for the fact of the small high frequency glitch caused by the fast therefore controllable. The important difference here is that any added amplitude stabilization loop will not be faced with the classical task of avoiding regions of nonoscillation versus clipping. C4 100pF R5 6.49k 1k 1MHZ AT-CUT 1Amplitude will be a linear function of comparator output swing, which is supply dependent and C3 100pF VS R1 1k R2 1k R7 15.8k R6 162Ω 100pF R4 210Ω VS 2 1 + R9 2k 7 3 – LE 5 8 4 7 – LT1806 C2 0.1μF SQUARE WAVE 2 3 VS LT1713 VS + R8 2k 6 SINE WAVE 1 (NC) 4 18067 F08 6 R3 1k VS = 2.7V TO 6V C1 0.1μF Figure 8. LT1713 Comparator is Configured as a Series Resonant Crystal Oscillator. The LT1806 Op Amp is Configured in a Q = 5 Bandpass Filter with fC = 1MHz 3V/DIV 1V/DIV 1V/DIV 200ns/DIV 18067 F09 Figure 9. Oscillator Waveforms with VS = 3V. Top Trace is Comparator Output. Middle Trace is Crystal Feedback to Pin 2 at LT1713. Bottom Trace is Buffered, Inverted and Bandpass Filtered with a Q of 5 by the LT1806 18067fb 24 LT1806/LT1807 PACKAGE DESCRIPTION S6 Package 6-Lead Plastic SOT-23 (Reference LTC DWG # 05-08-1634) (Reference LTC DWG # 05-08-1636) 0.62 MAX 2.90 BSC (NOTE 4) 0.95 REF 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 – 0.45 6 PLCS (NOTE 3) 0.95 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) 1.90 BSC S6 TSOT-23 0302 REV B NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 18067fb 25 LT1806/LT1807 PACKAGE DESCRIPTION MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 p 0.127 (.035 p .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.42 p 0.038 (.0165 p .0015) TYP 3.00 p 0.102 (.118 p .004) (NOTE 3) 0.65 (.0256) BSC 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 p 0.102 (.118 p .004) (NOTE 4) 4.90 p 0.152 (.193 p .006) DETAIL “A” 0o – 6o TYP GAUGE PLANE 1 0.53 p 0.152 (.021 p .006) DETAIL “A” 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.1016 p 0.0508 (.004 p .002) MSOP (MS8) 0307 REV F NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 18067fb 26 LT1806/LT1807 PACKAGE DESCRIPTION S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .189 – .197 (4.801 – 5.004) NOTE 3 .045 p.005 .050 BSC 8 .245 MIN 7 6 5 .160 p.005 .150 – .157 (3.810 – 3.988) NOTE 3 .228 – .244 (5.791 – 6.197) .030 p.005 TYP 1 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 s 45o (0.254 – 0.508) .008 – .010 (0.203 – 0.254) 3 4 .053 – .069 (1.346 – 1.752) .004 – .010 (0.101 – 0.254) 0o– 8o TYP .016 – .050 (0.406 – 1.270) NOTE: 1. DIMENSIONS IN 2 .014 – .019 (0.355 – 0.483) TYP INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) .050 (1.270) BSC SO8 0303 18067fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 27 LT1806/LT1807 TYPICAL APPLICATION FET Input, Fast, High Gain Photodiode Amplifier total output noise was below 1mVRMS measured over a 10MHz bandwidth. Table 4 shows results achieved with various values of RF and Figure 11 shows the time domain response with RF = 499k. Figure 10 shows a fast, high gain transimpedance amplifier applied to a photodiode. A JFET buffer is used for its extremely low input bias current and high speed. The LT1097 and 2N3904 keep the JFET biased at IDSS for zero offset and lowest voltage noise. The JFET then drives the LT1806, with RF closing the high speed loop back to the JFET input and setting the transimpedance gain. C4 helps improve the phase margin of the fast loop. Output voltage noise density was measured as 9nV/√Hz with RF short circuited. With RF varied from 100k to 1M, Table 4. Results Achieved for Various RF, 1.2V Output Step VS+ R1 10M 3 3 6 LT1097 – 4 VS– 94ns 4.6MHz 499k 154ns 3MHz 1M 263ns 1.8MHz C4 3pF * – 7 LT1806 7 + 2 2 C1 100pF VS+ 200k VS+ R2 1M VS– –3dB BANDWIDTH 6.8MHz RF 2N5486 SIEMENS/ INFINEON SFH213FA PHOTODIODE 100k 10% to 90% RISE TIME 64ns RF + 6 49.9Ω VOUT 50W 4 VS– 18067 F10 R3 10k C2 2200pF 2N3904 C3 0.1μF R4 2.4k R5 33Ω *ADJUST PARASITIC CAPACITANCE AT RF FOR DESIRED RESPONSE CHARACTERISTICS VS = p5V VS– Figure 10. Fast, High Gain Photodiode Amplifier 100mV/DIV 20ns/DIV 18067 F11 Figure 11. Step Response with RF = 499k RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1395 400MHz Current Feedback Amplifier 800V/μs Slew Rate, Shutdown LT1399 Triple 300MHz Current Feedback Amplifier 0.1dB Gain Flatness to 150MHz, Shutdown LT1632/LT1633 Dual/Quad 45MHz, 45V/μs Rail-to-Rail Input and Output Amplifiers High DC Accuracy 1.35mV VOS(MAX), 70mA Output Current, Max Supply Current 5.2mA/Amp LT1809/LT1810 Single/Dual 180MHz Input and Output Rail-to-Rail Amplifiers 350V/μs Slew Rate, Shutdown, Low Distortion –90dBc at 5MHz 18067fb 28 Linear Technology Corporation LT 0908 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2000