NJU8789 Monaural BTL Output Clock-less Switching Driver for Class D Amplifier PACKAGE OUTLINE GENERAL DESCRIPTION The NJU8789 is a monaural BTL output switching driver for class D amplifier including Separated Power Source terminals between Input and Output. It converts 1bit digital signal input, such as PWM or PDM signal. The NJU8789 realizes very high power-efficiency by class D operation. Therefore, It is suitable for portable set with speaker. NJU8789V PIN CONFIGURATION FEATURES Clock-less switching driver 1-channel 1bit Audio Signal Input Monaural BTL Output Standby(Hi-Z) Control Function Operating Voltage : 1.8V to 4.5V Driving Voltage : VDD to 4.5V CMOS Technology Package Outline : SSOP10 VDD IN NC TEST STBYb 1 2 3 4 5 10 9 8 7 6 VSS OUTP VDDO OUTN VSS BLOCK DIAGRAM VDD IN VDDO OUTN LEVEL SHIFTER OUTP STBYb LEVEL SHIFTER NJU8789 VSS Ver.2009-01-21 -1- NJU8789 TERMINAL DESCRIPTION No. 1 8 6 10 2 9 7 SYMBOL VDD VDDO I/O − − VSS − Function Power Supply Output Power Supply GND terminal 1-bit Data Input Terminal Positive output Negative output Standby Control Terminal 5 STBYB I L: Standby Maker test Terminal 4 TEST I L: Normal operation Non connection 3 NC − *VSS(Terminal No.6,10) should be connected at a nearest point to the IC. IN OUTP OUTN I O O INPUT TERMINAL STRUCTURE VDD Input Terminal VSS -- 2 2 -- Ver.2009-01-21 NJU8789 NJU3555 FUNCTIONAL DESCRIPTION (1) IN terminal (Input Signal) The input signals are PWM signals or PDM signals. (2) OUTP and OUTN terminal (Output Signal) The OUTP and OUTN generate PMW output signal The NJU8789 drives a speaker by the BTL output, and OUTP is a positive output and OUTN is a negative outputs. A switching regulator with a high response against a voltage fluctuation is the best selection for the VDDO, which is the power supply for output drivers. (3) Standby Control Function By setting the STBYb terminal to “L”, the NJU8789 becomes standby condition. During standby condition, OUTP and OUTN are in Hi-Z. The STBYb terminal must be connected to VDD when not using the Standby Function. Ver.2009-01-21 -3- NJU8789 ABSOLUTE MAXIMUM RATINGS (Ta=25°C) PARAMETER SYMBOL VDD VDDO RATING -0.3 to +5.5 -0.3 to +5.5 UNIT Input Voltage Vin -0.3 to VDD+0.3 V Operating Temperature Ta -40 to +85 °C Tstg -40 to +125 °C Power Dissipation PD 370* mW Thermal Resistance θja 270 °C /W Supply Voltage Storage Temperature V * : Mounted on two-layer board of based on the EIA/JEDEC STD. Note 1) All voltage values are specified as VSS=0V. Note 2) If the LSI is used on condition beyond the absolute maximum rating, the LSI may be destroyed. Using LSI within electrical characteristics is strongly recommended for normal operation. Use beyond the electrical characteristics conditions will cause malfunction and poor reliability. Note 3) De-coupling capacitors should be connected between VDD-VSS and VDDO-VSS due to the stabilized operation. ELECTRICAL CHARACTERISTICS DC Characteristics (Ta=25°C, VDD=2.2V, VDDO=3.5V, VSS=0V, unless otherwise noted) PARAMETER SYMBOL MIN. TYP. MAX. UNIT VDD Supply Voltage VDD 1.8 2.2 4.5 V VDDO Supply Voltage VDD VDD 3.5 4.5 V Output Driver High side Resistance RONH VOUT=VDDO-0.1V - 0.6 1.2 Ω Output Driver Low side Resistance RONH VOUT=0.1V - 0.6 1.2 Ω VDD,IN=0V No-load operating - - 0.4 µA - - 0.4 µA - 50 100 µA - 180 360 µA 0.7VDD - VDD V IN 0 - 0.3VDD STBYb 0 - 0.5 IN,STBYb - - ±1 Operating Current at Standby Operating Current at Operating (Mute signal input) IST ISTO IDD IDDO VIH Input Voltage VIL Input Leakage Current -- 4 4 -- CONDITIONS ILK VDDO,IN=0V No-load operating VDD fIN=30kHz No-load operating VDDO fIN=30kHz No-load operating IN,STBYb V µA Ver.2009-01-21 NJU8789 NJU3555 AC Characteristics (Ta = 25 °C, VDD =2.2 V, VDDO =3.5 V, VSS = 0.0 V unless otherwise noted) SYMBOL CONDITIONS MIN TYP MAX UNIT PARAMETER Input Pulse Width "H" tH IN 25 - - ns Input Pulse Width "L" tL IN IN-OUTP, IN-OUTN, CL = 10 pF IN-OUTP, IN-OUTN, CL = 10 pF IN, STBYb IN, STBYb IN 25 - - ns - 25 - ns - 25 - ns 20 - 50 50 2000 ns ns kHz Turn up Pulse Delay Time tPDH Turn down Pulse Delay Time tPDL Turn up Time Turn down Time Input Frequency tUP tDN fin TIMING CHARACTERISTICS Input Pulse Width "H" and "L". IN 0.5VDD 0.5VDD tH 0.5VDD tL Pulse Delay Time IN 0.5VDD 0.5VDD OUTP 0.5VDDO 0.5VDDO OUTN 0.5VDDO 0.5VDDO tPDH tPDL Output Control Signal Input IN 0.7VDD 0.3VDD 0.7VDD 0.3VDD STBYb tri tUP Ver.2009-01-21 tfi tDN -5- NJU8789 APPLICATION CIRCUIT LO IN(2) Signal OUTN(7) 220µH Control 8Ω Speaker STBYb(5) TEST(4) 10µF Logic Power NJU8789 OUTP(9) 0.1µF + VDD(1) VDDO(8) 1µF 10µF + Output Power VSS(6or10) Note 4) De-coupling capacitors must be connected between each power supply terminal and GND terminal. Note 5) The power supply for VDDO requires fast driving response performance such as a switching regulator for T.H.D. Note 6) The above circuit shows only application example and does not guarantee the any electrical characteristics. Therefore, please consider and check the circuit carefully to fit your application. Note 7) VDD and VDDO must be applied with conbecting to VSS in STBYb must be connected to VSS. Note 8) STBYb must be connected to VSS when applying voltage to VDD and VDDO. Note 9) It is necessary to connect the Coil(Lo) to OUTN or OUTP terminal and Speaker for low power consumption of the NJU8789. Note 10) (1) to (10) indicates pin numbers. . [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. -- 6 6 -- Ver.2009-01-21