PT6355 VFD Driver/Controller IC DESCRIPTION PT6355 is a Vacuum Fluorescent Display Controller driven 5/16, 6/16, 14/16 and 15/16 duty factors. Eight to Eighteen Segment Output Lines, Seven to Ten Grid Output Lines, Ten Segment/Grid Output Drive Lines, 8-bit x 6-channel A-D Converter, Built-in Noise Filter are all incorporated into a single chip to build a highly reliable peripheral device for a single chip micro-computer. PT6355 also provides 4 serial interfaces via the CS, SIN, SOUT, SCLK Pins. Housed in 44-pin, LQFP Package, PT6355’s pin assignment and application circuit are optimized for easy PCB layout and cost saving benefits. FEATURES • • • • • • CMOS Technology Internal Pull-Low Resistor 4-Step Dimming Circuitry 8 to 18 Segment Outputs 7 to 10 Grid Outputs Built-in Noise Filter in Serial Clock and Serial Input Pins with 2 MHz sampling • 8-bit x 6 channels Analog-to-Digital Converter with +3LSB Accuracy • Available in 44-pin, LQFP Package APPLICATION • Micro-Computer Peripheral Device BLOCK DIAGRAM Tel: 886-66296288‧Fax: 886-29174598‧ http://www.princeton.com.tw‧2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan PT6355 APPLICATION CIRCUIT V1.6 2 PT6355 ORDER INFORMATION Valid Part Number PT6355-LQ/PT6355 Package Type 44-pin, LQFP Top Code PT6355-LQ/PT6355 PIN CONFIGURATION V1.6 3 PT6355 PIN DESCRIPTION Pin Name VCC OSC2 VSS OSC1 I/O O I /Reset I AN5 to AN0 /CS I I SIN I SOUT O n-channel open drain SCLK I VEE - GR0/P0 to GR7/P7 O p-channel open drain GR8/SEG17 to GR17/SEG8 O p-channel open drain SEG0 to SEG7 O p-channel open drain V1.6 Description Power supply Oscillation output pin Power supply Oscillation input pin Reset input pin Active ”L” Internal pull-high resistors are connected between this pin and the VCC pins. Analog to digital pin Chip select Serial input pin The clock is read twice with a 2MHz sampling rate in order to judge if the signal is a noise or not. Serial output pin During the Reset condition, this pin is in high-impedance state. Serial clock input pin The clock is read twice with a 2MHz sampling rate in order to judge if the signal is a noise or not. Pull-down power supply Supplies voltage to Pull-down resistors Grid/Port output pins This pin acts as either a Grid Output Pin or as an Ordinary Port Terminal. During the reset condition, this pin is set to VEE via a pull-down resistor. Grid/Segment output pins This pin acts as either a Grid Output Pin or as an Segment Output Pin. During the reset condition, this pin is set to VEE via a pull-down resistor. Segment output pin During the reset condition, this pin is set to VEE via a pull-down resistor. Pin No. 1, 44 2 3 4 5 6 to 11 12 13 14 15 16, 17 18 to 25 26 to 35 43 to 36 4 PT6355 PORT BLOCK DIAGRAM • Grid/Port Pin & Grid/Segment Pin • Grid Pin • Segment Pin • SOUT Pin • /CS Pin • SIN, SCLK Pins • A-D Input • OSC1 & OSC2 Pins Notes: 1. * = Dimmer signal is for setting the T off time 2. ** = High-break down voltage P channel transistor V1.6 5 PT6355 FUNCTION DESCRIPTION COMMANDS COMMAND 0: DISPLAY DATA SETTING b7 1 b6 1 b5 1 b4 - b3 b2 b1 b0 Number of segment setting: 00: 16 or less 01: 17 or above Number of grid setting: 00: 7 01: 8 10: 9 11: 10 COMMAND 1: DISPLAY STATE SETTING b7 1 b6 1 b5 0 b4 - b3 - b2 b1 b0 ON/OFF setting: 1: Display is turned ON 0: Display is turned OFF Display duty setting: 11: 15/16 10: 14/16 01: 6/16 00: 5/16 V1.6 6 PT6355 COMMAND 2: GRID SELECTION b7 1 b6 0 b5 1 b4 - b3 b2 b1 b0 Grid start pin settings: 0000: D17 0001: D16 0010: D15 0011: D14 0100: D13 0101: D12 0110: D11 0111: D10 1000: D9 1001: D8 1010: D7 COMMAND 3: PORT DATA SETTINGS b7 1 b6 0 b5 0 b4 b3 b2 b1 b0 P3 to P0 / P7 to P4 output data Port selection settings: 0: P3 to P0 1: P7 to P4 Note: In the event that a port has been selected (example: b4 = 0, P3 to P0 is selected), and at the same time the Grid Output Pin function is enabled, then the Grid Output having a higher priority than the Port Function will override the Port selection. V1.6 7 PT6355 SERIAL INTERFACE PORTOCOL BYTE PORTOCOL Note: When the CS Signal is “HIGH”, SOUT is in High-Impedance State. COMMAND 0 POTOCOL Notes: 1. The serial data which is transmitted after the execution of Command 0 is recognized as a Display Data. A-D Data 6 and above are defined as “x”. 2. After transferring a Display Data, the CS must be set to “HIGH” Level. COMMANS 1 TO COMMAND 3 V1.6 8 PT6355 SERIAL COMMUNICATION FORMAT 3-BYTE TRANSFER: 17 SEGMENTS AND ABOVE Note: The 2 Bytes namely “X” Data is outputted before the A-D Valid data. Please refer to the diagram above. 2-BYTE TRANSFER: 16 SEGMENTS OR BELOW Note: The 2 Bytes namely “X” Data is outputted before the A-D valid data. Please refer to the diagram above. 2-BYTE TRANSFER: 8 SEGMENTS OR LESS Note: The 2 Bytes namely “X” Data is outputted before the A-D valid data. Please refer to the diagram above. V1.6 9 PT6355 DISPLAY TIMING V1.6 10 PT6355 SEGMENT/GRID SETTING EXAMPLE Port 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 V1.6 P7 P6 P5 P4 P3 P2 P1 P0 GR GR17 GR16 GR15 GR14 GR13 GR12 GR11 GR10 GR9 GR8 GR7 GR6 GR5 GR4 GR3 GR2 GR1 GR0 SEG SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 Grid: 7 Segment: 8 S1 S2 S3 S4 S5 S6 S7 S8 G7 G6 G5 G4 G3 G2 G1 Grid: 10 Segment: 8 S1 S2 S3 S4 S5 S6 S7 S8 G10 G9 G8 G7 G6 G5 G4 G3 G2 G1 Grid: 10 Segment: 16 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 G10 G9 G8 G7 G6 G5 G4 G3 G2 G1 Grid: 7 Segment: 18 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 G7 G6 G5 G4 G3 G2 G1 11 PT6355 BIT ALLOCATION FOR DISPLAY MEMORY Address 0916 0A16 0B16 0D16 0E16 0F16 1116 1216 1316 1516 1616 1716 1916 1A16 1B16 1D16 1E16 1F16 2116 2216 2316 2516 2616 2716 2916 2A16 2B16 2D16 2E16 2F16 V1.6 b7 b6 b5 b4 b3 b2 SEG15 SEG7 SEG14 SEG6 SEG13 SEG5 SEG12 SEG4 SEG11 SEG3 SEG10 SEG2 SEG15 SEG7 SEG14 SEG6 SEG13 SEG5 SEG12 SEG4 SEG11 SEG3 SEG10 SEG2 SEG15 SEG7 SEG14 SEG6 SEG13 SEG5 SEG12 SEG4 SEG11 SEG3 SEG10 SEG2 SEG15 SEG7 SEG14 SEG6 SEG13 SEG5 SEG12 SEG4 SEG11 SEG3 SEG10 SEG2 SEG15 SEG7 SEG14 SEG6 SEG13 SEG5 SEG12 SEG4 SEG11 SEG3 SEG10 SEG2 SEG15 SEG7 SEG14 SEG6 SEG13 SEG5 SEG12 SEG4 SEG11 SEG3 SEG10 SEG2 SEG15 SEG7 SEG14 SEG6 SEG13 SEG5 SEG12 SEG4 SEG11 SEG3 SEG10 SEG2 SEG15 SEG7 SEG14 SEG6 SEG13 SEG5 SEG12 SEG4 SEG11 SEG3 SEG10 SEG2 SEG15 SEG7 SEG14 SEG6 SEG13 SEG5 SEG12 SEG4 SEG11 SEG3 SEG10 SEG2 SEG15 SEG7 SEG14 SEG6 SEG13 SEG5 SEG12 SEG4 SEG11 SEG3 SEG10 SEG2 b1 SEG17 SEG9 SEG1 SEG17 SEG9 SEG1 SEG17 SEG9 SEG1 SEG17 SEG9 SEG1 SEG17 SEG9 SEG1 SEG17 SEG9 SEG1 SEG17 SEG9 SEG1 SEG17 SEG9 SEG1 SEG17 SEG9 SEG1 SEG17 SEG9 SEG1 b0 SEG16 SEG8 SEG0 SEG16 SEG8 SEG0 SEG16 SEG8 SEG0 SEG16 SEG8 SEG0 SEG16 SEG8 SEG0 SEG16 SEG8 SEG0 SEG16 SEG8 SEG0 SEG16 SEG8 SEG0 SEG16 SEG8 SEG0 SEG16 SEG8 SEG0 Grid Grid 0 Grid 1 Grid 2 Grid 3 Grid 4 Grid 5 Grid 6 Grid 7 Grid 8 Grid 9 12 PT6355 RESET FUNCTION To enable the Reset Function of PT6355, the /RESET Pin must be set at “L” Level for 2 µs or more. After which the /RESET Pin reverts back to “H” Level and then the reset is released. The /RESET Pin returned to an “H” Level when the OSC1 oscillation is stable and the voltage of the power source is between 4.0 V and 5.5 V. It is very important to note that the Reset Input Voltage is less than 0.2VCC when the VCC is 4 V. The figure below is an example of a RESET Circuit. OSCILLATION CIRCUIT An oscillation circuit is constructed by connecting a capacitor between Oscillation pins -- OSC1 and OSC2 and VSS. The Oscillation Pins -- OSC1 and OSC2 must be as “SHORT” as possible. If you are supplying a clock externally, apply the clock signal to OSC1 and make OSC2 Pin floating or open. Please refer to the diagram below. SETTING UNUSED PINS If a segment or grid pin will not be used, just leave it floating or open. The Analog Input Pin, however, must be connected to VCC or VSS via a resistor if it is not used. Please refer to the table below. Pin Type Connection Segment Open Grid Open Analog Input Connect to VCC or VSS via a resistor V1.6 13 PT6355 ABSOLUTE MAXIMUMS RATINGS Parameter Power source voltage Pull-down power source voltage Input voltage (AN0~AN5) Input voltage (/CS, SIN, SCLK) Input voltage (/RESET) Symbol VCC VEE Vi Vi Vi Output voltage (GR0~GR17) (SEG0~SEG17) Vo Output voltage (SOUT) Vo Power dissipation Operating temperature Storage temperature Pd Topr Tstg Conditions All voltages are based on VSS Output transistors are cut off. All voltages are based on VSS. Output transistors are cut off. A waveform with frequency of 450 µs or more and a pulse width of 30 µs or less. Connect only capacitor load (CL = 200 pF) All voltage are based on Vss. Output transistors are cut off. Ta=25℃ - Ratings -0.3 to 7.0 Unit V VSS-38 to VCC+0.3 V -0.3 to VCC+0.3 -0.3 to VCC+0.3 -0.3 to VCC+0.3 V V V VCC-38 to VCC+0.3 V -0.3 to VCC+0.3 V 600 -40 to +85 -65 to +150 mW ℃ ℃ RECOMMENDED OPERATING CONDITIONS (Unless otherwise specified, VCC = 5 V, Ta = -20 to +85℃) Parameter Symbol Power source voltage VCC Power source voltage VSS Pull-down power source voltage VEE “H” input voltage (/CS, SIN, SCLK) VIH “H” input voltage (/RESET) VIH “L” input voltage (/CS, SIN, SCLK) VIL “L” input voltage (/RESET) VIL Min. 4.5 Typ. 5.0 0 VCC-35 0.75VCC 0.8VCC 0 0 Max. 5.5 VCC VCC VCC 0.25VCC 0.2VCC Unit V V V V V V V Max. Unit -240 mA -120 mA -40 -20 10 -18 -7 5.0 5.2 mA mA mA mA mA mA MHz KHz RECOMMENDED OPERATING CONDITIONS (Unless otherwise specified, VCC = 5 V, Ta = -20 to +85℃) Parameter Symbol “H” total peak output currentNote1 Σ IOH (peak) GR0~GR17, SEG0~SEG17 “H” total peak output current Σ IOH (avg.) GR0~GR17, SEG0~SEG17 Note2 “H” peak output current GR0~GR17 IOH (peak) “H” peak output currentNote2 SEG0~SEG7 IOH (peak) “L” peak output current SOUTNote2 IOL (peak) “H” peak output currentNote3 GR0~GR17 IOH (avg.) “H” peak output currentNote3 SEG0~SEG17 IOH (avg.) “L” peak output currentNote3 SOUT IOL (avg.) Main clock input oscillatorNote4 frequency f (OSC1) Serial I/O external clock frequency f (SCLK)) Min. Typ. 4.0 250 Notes: 1. The total output current is the sum of all the current flowing through all the applicable ports. The total average current is the average/ or mean value measured over 100 ms. The total peak current is the peak value of all the currents. 2. The peak output current is the peak current flowing in each port. 3. The average output current is an average or mean value measured per 100 ms. 4. Under the condition that the oscillation frequency has a 50% duty cycle. V1.6 14 PT6355 ELECTRICAL CHARACTERISTICS (Unless otherwise specified, VCC = 5 V, Ta = -20 to +85℃) Parameter Symbol Conditions “H” output GR Output IOH = -18 mA VOH voltage SEG Output IOH = -7 mA “L” output SOUT VOL IOL = 5 mA voltage SIN,SCLK,/CS Hysteresis VT+~VTVCC = 5V /RESET,OSC1 SIN,SCLK,/CS “H” input VIH VI = VCC /RESET current OSC1 SIN,SCLK,/CS “L” input VIL VI = VSS /RESET current OSC1Note Output load GR0~GR17 VEE = VCC-35 V, VOL = VCC, ILOAD current SEG0~SEG17 Output Transistors OFF Output leakage GR0~GR17 VEE = VCC-35 V, VOL = VCC-35 V, ILEAK current SEG0~SEG17 Output Transistors OFF RAM hold voltage VRAM When the clock is stopped VCC = 5 V, f(OSC1) = 4 MHz, Output transistors OFF when A-D Power source current ICC Converter is operating Min. VCC-2 VCC-2 Typ. Max. Unit V V 2.0 V 0.5 0.5 5.0 5.0 4.0 -5.0 -150 -0.8 250 500 2.0 0.5 V V µA µA µA µA µA mA 750 µA -10 µA 5.5 V 1.0 mA Note: See OSC1 & OSC2 Pins Port Diagram A-D CONVERTER CHARACTERISTICS (Unless otherwise specified, VCC = 5 V, Ta = -20 to +85℃) Parameter Symbol Conditions Resolution Absolute accuracy VCC = 5.12 V (excluding quantization error) Conversion time Tconv Analog input voltage VIA Analog port input current IIA Ladder resistor Rladder V1.6 Min. Typ. 0 0.5 35 Max. 8 Unit Bits +3 LSB 100 VCC 5.0 tc (OSC1) V µA KΩ 15 PT6355 TIMING REQUIRMENTS (Unless otherwise specified, VCC = 5 V, Ta = -20 to +85℃) Parameter Symbol Reset input “L” pulse width tw (/RESET) Main clock input cycle time tc (OSC1) (OSC1 input) Main clock input “H” pulse width twH (OSC1) (OSC1 Input) Main clock input “L” pulse width twL (OSC1) (OSC1 Input) Note2 Serial clock input cycle time tc (SCLK) Serial clock input “H” pulse widthNote2 twH (SCLK) Serial clock input “L” pulse widthNote2 twL (SCLK) Serial input set-up timeNote2 tsu (SIN-SCLK) Serial input hold timeNote2 th (SCLK-SIN) Serial input set-up time tsu (/CS) Serial input hold time th (/CS) Serial clock interval time trec (SCLK) Min. 2 Typ. Max. Unit µs 192 ns 60 ns 60 ns 5 2 3 2 3 50tc (OSC1) 50tc (OSC1) 50tc (OSC1) CLKs CLKs CLKs CLKs CLKs ns ns ns Notes: 1. tc (OSC1) = 1/fosc 2. The unit means the number of Noise Filter Sampling Clock [2 x tc (OSC1)] 3. Test Mode Frequency Measurement (refer to diagram): a. fosc= 2 x Frequency Value outputted by the CS Pin. b. twH (SCLK) = [(1/fosc) x 2] x 2 c. twL (SCLK) = [(1/fosc) x 2 ] x 3 d. trec (SCLK) = [50 x (1/fosc)] e. twH (SCLK), twL (SCLK) & trec (SCLK) are very important factors in writing the PT6355 software program. V1.6 16 PT6355 SWITCHING CHARACTERISTICS (Unless otherwise specified, Vcc = 5 V, Ta = -20 to +85℃) Parameter Symbol Serial I/O output delay timeNote2 td (SCLK-SOUT) Serial I/O output valid timeNote2 tv (SCLK-SOUT) High break down voltage P-Channel tr (Pch) open drain output rising time External capacitor sizeNote3 Cosc Conditions CL = 100 pF VEE = VCC-35 V Min. 4 4 Typ. Max. Unit CLKs CLKs 1.8 µs 22 pF Notes: 1. tc(OSC1) = 1/fosc 2. The unit means the number of Noise Filter Sampling Clock (2 x tc(OSC1)). 3. An external capacitor size varies with a mounted condition. OUTPUT SWITCHING CHARACTERISTICS MEASUREMENT APPLICATION CIRCUIT TIMING DIAGRAM V1.6 17 PT6355 PACKAGE INFORMATION 44-PIN, LQFP (BODY SIZE: 10 X 10 MM, PITCH SIZE: 0.8 MM, THK BODY: 1.40 MM) V1.6 18 PT6355 Symbol A A1 A2 b c D D1 E E1 e θ θ1 θ2 θ3 L L1 R1 R2 S ccc Min. 0.05 1.35 0.30 0.09 0° 0° 11° 11° 0.45 0.08 0.08 0.20 Nom. 1.40 0.37 12.00 BSC 10.00 BSC 12.00 BSC 10.00 BSC 0.80 BSC 3.5° 12° 12° 0.60 1.00 REF 0.10 Max. 1.60 0.15 1.45 0.45 0.20 7° 13° 13° 0.75 0.20 - Notes: 1. All dimensions are in millimeters. 2. Refer to JEDEC MS-026 BCB. V1.6 19 PT6355 IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw V1.6 20