SILAN SC7315S

SC7315
2-CH OUTPUT STEREO AUDIO PROCESSOR
DESCRIPTION
The SC7315 is a volume, tone (bass and treble), balance (left/ right)
and fader processor for quality audio applications in car radio and Hi-Fi
systems. Selectable input gain and external loudness function are
provided. Control is accomplished by serial I 2C bus microprocessor
DIP-20-300-2.54
interface. The AC signal settings is obtained by resistor networks and
switches combined with operational amplifiers. Due to the Used CMOS
technology, low distortion, low noise and low DC stepping are obtained.
SOP-20-375-1.27
FEATURES
* 2 stereo inputs
* Two speaker attenuators:
--2 independent speakers control in 1.25dB steps for balance and fader
ORDERING INFORMATION
facilities
--Independent mute function
Device
Package
* All functions programmable via serial I 2C Bus
SC7315
DIP-20-300-2.54
* Loudness function
SC7315S
SOP-20-375-1.27
* Volume control in 1.25dB steps
* Treble and bass control
* Input and output for external equalizer ornoise reduction system
BLOCK DIAGRAM
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Page 1 of 13
SC7315
ABSOLUTE MAXIMUM RATING
Characteristics
Symbol
Ratings
Unit
VS
10.2
V
Operating Temperature
Tamb
-40 ~ +85
°C
Storage Temperature
Tstg
-55 ~ +150
°C
Supply Voltage
QUICK REFERENCE DATA
Characteristics
Symbol
Min.
Typ.
Max.
Unit
Vs
6
9
10
V
Maximum Input Signal Handling
VCL
2
Total Harmonic Distortion ,V=1Vrms,
f=1kHz
THD
0.01
Signal to Noise Ratio
S/N
106
Channel Separation, f=1kHz
SC
Supply Voltage
Volume Control, 1.25dB Step
Bass and Treble Control, 2dB step
Fader and Balance Control, 1.25dB step
Vrms
0.1
%
dB
103
dB
-78.75
0
dB
-14
+14
dB
-38.75
0
dB
0
11.25
dB
Input Gain, 3.75dB Step
Mute Attenuation
100
dB
ELECTRICAL CHARACTERISTICS (Refer to the test circuit)
(Tamb=25°C,VS=9.0V,RL=10kΩ
Characteristics
RG=600Ω
Symbol
all controls flat(G=0), f=1kHz,Unless otherwise specified)
Test conditions
Min.
Typ.
Max.
Unit
6
9
10.0
V
20.0
35.0
mA
SUPPLY VOLTAGE
Operating Supply Voltage
VS
Operating Supply Current
IS
Ripple Rejection of Supply Voltage
SVR
60
80
dB
RIV
20
33
50
kΩ
Control Range
Crange
70
75
80
dB
Minimum Attenuation
AV(min)
-1
0
1
dB
Maximum Attenuation
AV(max)
70
75
80
dB
Step Resolution
ASTEP
0.5
1.25
1.75
dB
-1.25
0
1.25
VOLUME CONTROL
Input Resistance
Attenuation Set Error
EA
Tracking Error
ET
DC Steps
VDC
AV=0 to –20dB
AV=-20 to –60dB
-3
Adjacent attenuation steps
From 0dB to AV max
2
dB
2
dB
0
3
mV
0.5
7.5
mV
37.5
40
dB
SPEAKER ATTENUATORS
Control Range
Crange
35
(To be continued)
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SC7315
(Continued)
Characteristics
Step Resolution
Attenuation Set Error
Output Mute Attenuation
DC Steps
Symbol
Test conditions
SSTEP
Min.
Typ.
Max.
Unit
0.5
1.25
1.75
dB
1.5
dB
EA
AMUTE
VDC
80
100
dB
Adjacent attenuation steps
0
3
mV
From 0dB to MUTE
1
10
mV
±12
±14
±16
dB
BASS CONTROL (note 1)
Control Range
GB
Step Resolution
BSTEP
1
2
3
dB
RB
34
44
58
kΩ
±13
±14
±15
dB
1
2
3
dB
2
2.5
Internal Feedback Resistance
Maximum boost/cut
TREBLE CONTROL (note 1)
Control Range
Gt
Step Resolution
TSTEP
Maximum boost/cut
AUDIO OUTPUTS
Clipping Level
VOCL
Output Load Resistance
RL
Output Load Capacitance
CL
THD=0.3%
Vrms
4
kΩ
10
nF
Output Resistance
ROUT
30
75
120
Ω
DC Voltage Level
VOUT
4.2
4.5
4.8
V
GENERAL
BW=20 ~20kHz,flat output muted
Output Noise
Signal to Noise Ratio
Distortion
Channel Separation Left/Right
eNO
S/N
d
5
A curve, all gains =0 dB
3
µV
All gains=0dB; Vo=1Vrms
106
dB
Av=0,VIN=10mV
0.01
0.1
%
Av=-20dB, VIN=1Vrms
0.09
0.3
%
Av=-20dB,VIN=0.3Vrms
0.04
%
103
dB
80
15
µV
BW=20 ~20kHz,flat All gains=0dB
Sc
Total Tracking Error
µV
2.5
AV=0 to –20 dB
0
1
dB
AV=-20 to –60 dB
0
2
dB
1
V
BUS INPUTS
Input Low Voltage
VIL
Input High Voltage
VIH
3
Input Current
IIN
-5
Output Voltage SDA Acknowledge
Vo
V
Io=1.6mA
+5
µA
0.4
V
NOTES:
(1) Bass and treble response see Figure 16. The center frequency and quality of the response behavior can be
chosen by the external circuitry. A standard first order bass response can realized by a standard feedback
network.
(2) The input is grounded through the 2.2µF capacitor.
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SC7315
PIN CONFIGURATIONS
CREF
1
20 SCL
VDD
2
19 SDA
GND
3
18 DGND
L
4
17 OUT L
R
5
16 OUT R
IN(R)
6
15 BOUT(R)
LOUD R
7
14 BIN(R)
NC
8
13 BOUT(L)
LOUD L
9
12 BIN(L)
BUS
INPUTS
TREBLE
BASS
NC 10
11 IN(L)
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SC7315
TYPICAL CHARACTERISTICS PERFORMANCE
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SC7315
TYPICAL CHARACTERISTICS PERFORMANCE (continued)
Fig.11 Supply Voltage Rejection
vs. Frequency
Fig.10 Input Separation vs. Frequency
100
100
VIN=1Vrms
AV=0dB
All controls Flat
90
80
90
Output Clipping Level (v)
Channel Separation (dB)
110
Channel Separation (dB)
Fig.12 Output Clipping Level vs.
Supply Voltage
80
70
Vsvr=0.5Vrms
All Input to GND
AV=0dB
All controls Flat
60
5.0
RL=10k ¸
f=1kHz
THD=0.3%
4.0
3.0
2.0
70
1.0
2
10
3
10
4
10
1
10
2
10
3
10
4
10
4
6
8
10
12
Frequency (Hz)
Frequency (Hz)
Supply Voltage (V)
Fig.13 Quiescent current vs. Supply
Voltage
Fig.14 Supply current vs.
Temperature
Fig.15 Bass resistance vs.
Temperature
8.0
6.0
4.0
50
8.5
48
)
9.0
Bass Resistance (k
Quiescent Current (mA)
Quiescent Current (mA)
1
10
8.0
Vs=9V
7.5
7.0
4
6
8
10
12
44
42
6.5
2.0
46
40
-60
-30
0
30
Temperature
Supply Voltage (V)
60
90
-60
-30
0
30
Temperature
( )
60
90
( )
Fig.16 Typical Tone Response
(with the Ext components indicated
the test circuit)
15
AV=0dB
Tone Response (dB)
10
5
0
-5
-10
-15
1
10
2
10
3
10
4
10
Frequency (Hz)
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SC7315
APPLICATION NOTES
1. I2C BUS INTERFACE
Data transmission from microprocessor to the SC7315 and viceversa takes place through the 2 wires I 2C BUS
interface, consisting of the two lines SDA and SCL(pull-up resistors to positive supply voltage must be
connected).
2. DATA VALIDITY
As shown in Figure 17, the data of the SDA line must be stable during the high period of the clock. The HIGH
and LOW state of the dtat line can only change when the clock signal on the SCL line is LOW.
Fig. 17 Data Validity on the I2C BUS
3. START AND STOP CONDITIONS
As shown in Figure 18, a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The
stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Fig. 18 Timing diagram of I2C BUS
4. BYTE FORMAT
Every byte transferred on the SDA line must obtain 8 bits. Each byte must be followed by the an acknowledge
bit. The MSB is transferred first.
5. ACKNOWLEDGE
The master(microprocessor) puts a resistive HIGH level on the SDA line during the acknowledge clock
pulse(see Figure 19). The peripheral(audioprocessor) that acknowledges has to pull-down(LOW) the SDA line
during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse.
The audioprocessor which has been addressed has to generate an acknowledge after the reception of each
byte , otherwise the SDA line remain at the HIGH level during the ninth clock pulse time. In this case the master
transmitter can generate the STOP information in order to abort the transfer.
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SC7315
Fig. 19 Acknowledge on the I2C BUS
6. Transmission without acknowledge
Avoiding to detect the acknowledge of the audioprocessor, the microprocessor can use a simpler transmission:
simply it waits one clock without checking the slave acknowledgig, and sends the new data.
This approach of course is less protected from mis-working and decreases the noise immunity.
SOFTWARE SPECIFICATION
1. Interface protocol
The interface protocol comprises:
•
•
A start conditions
A chip address byte, containing the SC7315 address(the 8 th bit of the bytes must be 0). The SC7315 must
always acknowledge at the end of each transmitted byte.
•
•
A sequence of data(N-bytes + acknowledge)
A stop condition (P)
SC7315 address
MSB
LSB
MSB
S 1 0 0 0 0 0 0 0 ACK
LSB
DATA
MSB
ACK
LSB
DATA
ACK P
Data Transferred
(N-Bytes + Acknowledge)
ACK: Acknowledge
S: Start
P: Stop
Max clock speed: 100kbits/sec
2. Chips address
1 (MSB)
0
0
0
0
0
0
0 (LSB)
3. Data bytes
MSB
LSB
Function
0
0
B2
B1
B0
A2
A1
A0
Volume Control
1
0
0
B1
B0
A2
A1
A0
Speaker ATT L
1
0
1
B1
B0
A2
A1
A0
Speaker ATT R
0
1
0
*
*
L
*
*
0
1
1
0
C3
C2
C1
C0
Bass control
0
1
1
1
C3
C2
C1
C0
Treble control
Loudness control
Note: Ax=1.25dB steps;Bx=10dB steps;Cx=2dB steps;Gx=3.75dB steps;*=no effect.
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SC7315
DETAILED DESCRIPTION OF DATA BYTES
1. Volume
MSB
0
0
0
0
B2
B1
B0
LSB
Function
A2
A1
A0
Volume 1.25dB steps
0
0
0
0
0
0
1
-1.25
0
1
0
-2.5
0
1
1
-3.75
1
0
0
-5
1
0
1
-6.25
1
1
0
-7.5
1
1
1
-8.75
A2
A1
A0
Volume 10dB steps
B2
B1
B0
0
0
0
0
0
0
1
-10
0
1
0
-20
0
1
1
-30
1
0
0
-40
1
0
1
-50
1
1
0
-60
1
1
1
-70
For example, a volume of –45dB is given by: 00100100
2. Speaker attenuators
MSB
LSB
Function
1
0
0
B1
B0
A2
A1
A0
Speaker ATT L
1
0
1
B1
B0
A2
A1
A0
Speaker ATT R
0
0
0
0
0
0
1
-1.25
0
1
0
-2.5
0
1
1
-3.75
1
0
0
-5
1
0
1
-6.25
1
1
0
-7.5
1
1
1
-8.75
0
0
0
0
1
-10
1
0
-20
1
1
-30
1
1
1
1
1
MUTE
For example, attenuation of 25dB on speaker R is given by: 10110100
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SC7315
3.Loudness function
MSB
0
1
0
*
*
L
LSB
Function
*
Loudness control
*
0
Loudness ON
1
Loudness OFF
Note:*=no effect
4.Bass and treble
MSB
LSB
Function
0
1
1
0
C3
C2
C1
C0
Bass
0
1
1
1
C3
C2
C1
C0
Terble
0
0
0
0
-14
0
0
0
1
-12
0
0
1
0
-10
0
0
1
1
-8
0
1
0
0
-6
0
1
0
1
-4
0
1
1
0
-2
0
1
1
1
0
1
1
1
1
0
1
1
1
0
2
1
1
0
1
4
1
1
0
0
6
1
0
1
1
8
1
0
1
0
10
1
0
0
1
12
1
0
0
0
14
C3=Sign
For Example, bass at –10dB is obtained by the following 8 bit string is: 01100010.
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SC7315
TEST AND TYPICAL APPLICATION CIRCUIT
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SC7315
PACKAGE OUTLINE
DIP-20-300-2.54
UNIT: mm
2.54
1.27
15 degree
26.4±0.3
0.51MIN
0.51
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9.525
7.6±0.3
UNIT: mm
10.2±0.4
SOP-20-375-1.27
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2004.08.03
Page 12 of 13
SC7315
HANDLING MOS DEVICES:
Electrostatic charges can exist in many things. All of our MOS devices are internally protected against
electrostatic discharge but they can be damaged if the following precautions are not taken:
• Persons at a work bench should be earthed via a wrist strap.
• Equipment cases should be earthed.
• All tools used during assembly, including soldering tools and solder baths, must be earthed.
• MOS devices should be packed for dispatch in antistatic/conductive containers.
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