54F164A 54F164A Serial-In, Parallel-Out Shift Register Literature Number: SNOS160 54F/74F164A Serial-In, Parallel-Out Shift Register General Description Features The ’F164A is a high-speed 8-bit serial-in/parallel-out shift register. Serial data is entered through a 2-input AND gate synchronous with the LOW-to-HIGH transition of the clock. The device features an asynchronous Master Reset which clears the register, setting all outputs LOW independent of the clock. The ’F164A is a faster version of the ’F164. Y Commercial Package Number Military 74F164APC N14A 54F164ADM (Note 2) Y Y Y Y Y Typical shift frequency of 90 MHz Asynchronous Master Reset Gated serial data input Fully synchronous data transfers Guaranteed 4000V min ESD protection ’F164A is a faster version of the ’F164 Package Description 14-Lead (0.300× Wide) Molded Dual-In-Line J14A 14-Lead Ceramic Dual-In-Line 74F164ASC (Note 1) M14A 14-Lead (0.150× Wide) Molded Small Outline, JEDEC 74F164ASJ (Note 1) M14D 14-Lead (0.300× Wide) Molded Small Outline, EIAJ 74F164AFM (Note 2) W14B 14-Lead Cerpack 74F164ALM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C Note 1: Devices also available in 13× reel. Use suffix e SCX and SJX. Note 2: Military grade device with environmental and burn-in processing. Use suffix e DMQB, FMQB and LMQB. Logic Symbols IEEE/IEC TL/F/10613 – 1 TL/F/10613 – 4 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/10613 RRD-B30M75/Printed in U. S. A. 54F/74F164A Serial-In, Parallel-Out Shift Register January 1995 Connection Diagrams Pin Assignment for DIP, SOIC and Flatpak Pin Assignment for LCC TL/F/10613–2 TL/F/10613 – 3 Unit Loading/Fan Out 54F/74F Pin Names A, B CP MR Q0 – Q7 Description U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL Data Inputs Clock Pulse Input (Active Rising Edge) Master Reset Input (Active LOW) Outputs 1.0/1.0 1.0/1.0 1.0/1.0 50/33.3 20 mA/b0.6 mA 20 mA/b0.6 mA 20 mA/b0.6 mA b 1 mA/20 mA Functional Description The ’F164A is an edge-triggered 8-bit shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (A or B); either of these inputs can be used as an active HIGH Enable for data entry through the other input. An unused input must be tied HIGH. Each LOW-to-HIGH transition on the Clock (CP) input shifts data one place to the right and enters into Q0 the logical AND of the two data inputs (A # B) that existed before the rising clock edge. A LOW level on the Master Reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all Q outputs LOW. Mode Select Table Inputs Outputs Operating Mode MR A B Q0 Reset (Clear) L X X L L-L Shift H H H H l l h h l h l h L L L H q0 –q6 q0 –q6 q0 –q6 q0 –q6 Q1 –Q7 H(h) e HIGH Voltage Levels L(l) e LOW Voltage Levels X e Immaterial qn e Lower case letters indicate the state of the referenced input or output one setup time prior to the LOW-to-HIGH clock transition. Logic Diagram TL/F/10613 – 5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 2 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Storage Temperature b 65§ C to a 150§ C Ambient Temperature under Bias Junction Temperature under Bias Plastic b 55§ C to a 125§ C Free Air Ambient Temperature Military Commercial b 55§ C to a 125§ C 0§ C to a 70§ C Supply Voltage Military Commercial b 55§ C to a 175§ C b 55§ C to a 150§ C a 4.5V to a 5.5V a 4.5V to a 5.5V VCC Pin Potential to Ground Pin b 0.5V to a 7.0V b 0.5V to a 7.0V Input Voltage (Note 2) b 30 mA to a 5.0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0.5V to VCC Standard Output b 0.5V to a 5.5V TRI-STATEÉ Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol 54F/74F Parameter Min VIH Input HIGH Voltage VIL Input LOW Voltage VCD Input Clamp Diode Voltage VOH Output HIGH Voltage 54F 10% VCC 74F 10% VCC 74F 5% VCC VOL Output LOW Voltage 54F 10% VCC 74F 10% VCC IIH Input HIGH Current IBVI Typ Units VCC Conditions Max 2.0 V Recognized as a HIGH Signal 0.8 V b 1.2 V Min IIN e b18 mA V Min IOH e b1 mA IOH e b1 mA IOH e b1 mA 0.5 0.5 V Min IOL e 20 mA IOL e 20 mA 54F 74F 20.0 5.0 mA Max VIN e 2.7V Input HIGH Current Breakdown Test 54F 74F 100 7.0 mA Max VIN e 7.0V ICEX Output HIGH Leakage Current 54F 74F 250 50 mA Max VOUT e VCC VID Input Leakage Test 74F V 0.0 IID e 1.9 mA All other pins grounded IOD Output Leakage Circuit Current 74F 3.75 mA 0.0 VIOD e 150 mV All other pins grounded IIL Input LOW Current IOS Output Short-Circuit Current ICC Power Supply Current 2.5 2.5 2.7 4.75 b 60 35 3 Recognized as a LOW Signal b 0.6 mA Max VIN e 0.5V b 150 mA Max VOUT e 0V 55 mA Max CP e HIGH MR e GND, A, B e GND AC Electrical Characteristics Symbol Parameter 74F 54F 74F TA e a 25§ C VCC e a 5.0V CL e 50 pF TA, VCC e Mil CL e 50 pF TA, VCC e Com CL e 50 pF Max Min Max Min Typ fmax Maximum Clock Frequency 80 120 tPLH tPHL Propagation Delay CP to Qn 3.0 3.5 4.8 5.0 7.5 8.0 2.5 3.0 9.0 8.5 3.0 3.5 7.5 8.0 ns tPHL Propagation Delay MR to Qn 5.0 7.0 10.0 4.0 12.5 5.0 10.5 ns 60 Min Units Max 80 MHz AC Operating Requirements Symbol Parameter 74F 54F 74F TA e a 25§ C VCC e a 5.0V TA, VCC e Mil TA, VCC e Com Min Min Min Max Max Units Max ts(H) ts(L) Setup Time, HIGH or LOW A or B to CP 4.5 4.0 5.5 4.0 4.5 4.0 th(H) th(L) Hold Time, HIGH or LOW A or B to CP 1.0 1.0 1.0 1.0 1.0 1.0 tw(H) tw(L) CP Pulse Width HIGH or LOW 4.0 7.0 4.0 7.0 4.0 7.0 ns tw(L) MR Pulse Width, LOW 4.0 5.0 4.0 ns trec Recovery Time MR to CP 5.0 6.5 5.0 ns ns Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74F 164A S Temperature Range Family 74F e Commercial 54F e Military C X Special Variations QB e Military grade device with environmental and burn-in processing X e Devices shipped in 13× reel Device Type Package Code P e Plastic DIP D e Ceramic DIP S e Small Outline Package SOIC JEDEC SJ e Small Outline SOIC EIAJ L e Package Leadless Chip Carrier (LCC) F e Flatpak Temperature Range C e Commercial (0§ C to a 70§ C) M e Military (b55§ C to a 125§ C) 4 Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier, Type C (L) NS Package Number E20A 14-Lead Ceramic Dual-In-Line Package (D) NS Package Number J14A 5 Physical Dimensions inches (millimeters) (Continued) 14-Lead (0.150× Wide) Molded Small Outline Package, JEDEC (S) NS Package Number M14A 6 Physical Dimensions inches (millimeters) (Continued) 14-Lead (0.300× Wide) Molded Small Outline Package, EIAJ (SJ) NS Package Number M14D 14-Lead (0.300× Wide) Plastic Dual-In-Line Package (P) NS Package Number N14A 7 54F/74F164A Serial-In, Parallel-Out Shift Register Physical Dimensions inches (millimeters) (Continued) 14-Lead Cerpack (F) NS Package Number W14B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 2900 Semiconductor Drive P.O. Box 58090 Santa Clara, CA 95052-8090 Tel: 1(800) 272-9959 TWX: (910) 339-9240 National Semiconductor GmbH Livry-Gargan-Str. 10 D-82256 F4urstenfeldbruck Germany Tel: (81-41) 35-0 Telex: 527649 Fax: (81-41) 35-1 National Semiconductor Japan Ltd. Sumitomo Chemical Engineering Center Bldg. 7F 1-7-1, Nakase, Mihama-Ku Chiba-City, Ciba Prefecture 261 Tel: (043) 299-2300 Fax: (043) 299-2500 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductores Do Brazil Ltda. Rue Deputado Lacorda Franco 120-3A Sao Paulo-SP Brazil 05418-000 Tel: (55-11) 212-5066 Telex: 391-1131931 NSBR BR Fax: (55-11) 212-1181 National Semiconductor (Australia) Pty, Ltd. Building 16 Business Park Drive Monash Business Park Nottinghill, Melbourne Victoria 3168 Australia Tel: (3) 558-9999 Fax: (3) 558-9998 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. 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