SS6620/21/2 High Efficiency Synchronous Step-Up DC/DC Converter n DESCRIPTION n FEATURES l High efficiency of 93% (VIN=2.4V, VOUT=3.3V, IOUT=200mA). up DC/DC converters, with start-up voltage as l Quiescent supply current of 20µA. low as 0.8V and operating with an input voltage l Power-saving shutdown mode (0.1µA typical). Internal synchronous rectifier (no external diode ) Selectable current limit for reduced ripple (SS6622). Low noise, anti-ringing feature (SS6622) On-chip low-battery detector. Low-battery hysteresis down to 0.7V. Consuming only 20µA of quies- l l l l l The SS6620/21/22 are high-efficiency step- cent current, these devices offer a built-in synchronous rectifier that reduces size and cost by eliminating the need for an external Schottky diode, improving overall efficiency by minimizing losses. The switching frequency depends on the load n APPLICATIONS l l l l l l and the input voltage and can range up to 500KHz. The peak current of the internal switch Palmtop & notebook computers. PDAs Wireless phones Pocket organizers. Cameras. 1 to 2-cell hand-held devices is fixed at 0.8A (SS6620), at 0.45A (SS6621), or is selectable (SS6622) for design flexibility. Ripple does not exceed the product of the switch current limit and the filter capacitor equivalent-series-resistance (ESR). The SS6622 also features a circuit that eliminates noise caused by inductor ringing. n TYPICAL APPLICATION CIRCUIT VIN ON + 100µF OFF Low-Battery Detect In 22µH LX SHDN SS6620 SS6621 SS6622 LBI REF OUT + 220µF LBO FB LBO Output 3.3V, or Adj. (1.8V to 4.0V) up to 300mA Low-Battery Detect Out GND FB 0.1µF Rev.2.01 6/06/2003 www.SiliconStandard.com 1 of 12 SS6620/21/2 n ORDERING INFORMATION SS6620CX XX SS6621CX XX SS6622CX XX PIN CONFIGURATION (MSOP8) PACKING TYPE TR: TAPE & REEL TOP VIEW FB 1 PACKAGING TYPE O: MSOP8 (for SS6620/1) O: MSOP10 (for SS6622) LBI 2 LBO 3 SS6620 SS6621 REF 4 FB 1 à In MSOP8 Package in Tape & Reel 7 LX 6 GND 5 SHDN 10 OUT LBI 2 LBO 3 OUT TOP VIEW (MSOP10) Example: SS6620COTR 8 9 LX SS6622 CLSEL 4 REF 5 8 GND 7 BATT 6 SHDN n ABSOLUTE MAXIMUM RATINGS Supply Voltage (OUT to GND) 8.0V VOUT+ 0.3V Switch Voltage (LX to GND) Battery Voltage (Batt to GND) 6.0V SHDN , LBO to GND 6.0V VOUT+0.3V LBI, REF, FB, CLSEL to GND Switch Current (LX) -1.5A to +1.5A Output Current (OUT) -1.5A to +1.5A Operating Temperature Range -40°C ~ +85°C Storage Temperature Range -65°C ~150°C n TEST CIRCUIT Refer to Typical Application Circuit. Rev.2.01 6/06/2003 www.SiliconStandard.com 2 of 12 SS6620/21/2 n ELECTRICAL CHARACTERISTICS (V BATT=2.0V, VOUT=3.3V (FB=VOUT), RL=∝, T A=25°C, unless otherwise specified.) PARAMETER TEST CONDITIONS MIN. Minimum Input Voltage 1.1 RL=3KΩ (Note1) 0.8 Start-Up Voltage Tempco 1.8 FB = VOUT SS6620 SS6622 Steady State Output Current FB=OUT (CLSEL=OUT) (VOUT =3.3V) SS6621 (Note 2) SS6622 (CLSEL=GND) Reference Voltage IREF= 0 UNIT V 4.0 V 1.1 V -2 Output Voltage Range Output Voltage MAX. 0.7 Operating Voltage Start-Up Voltage TYP. mV/°C 4.0 3.17 3.3 300 400 3.43 V mA 150 220 1.199 1.23 Reference Voltage Tempco 1.261 0.024 V mV/°C Reference Load Regulation IREF = 0 to 100 µA 10 30 mV Reference Line Regulation VOUT = 1.8V to 4V 5 10 mV/V 1.23 1.261 V FB , LBI Input Threshold Internal Switch On-Resistance 1.199 ILX = 100mA Ω 0.3 SS6620,SS6622(CLSEL = OUT) 0.6 0.8 1.0 SS6621,SS6622(CLSEL = GND) 0.3 0.45 0.6 0.05 1 µA LX Switch Current Limit A LX Leakage Current VLX=0V, 4V; VOUT=4V Operating Current into OUT VFB = 1.4V , VOUT = 3.3V 20 35 µA SHDN = GND 0.1 1 µA VOUT= 3.3V ,ILOAD = 200mA 90 VOUT = 2V ,ILOAD = 1mA 85 (Note 3) Shutdown Current into OUT Efficiency % LX Switch On-Time VFB =1V , VOUT = 3.3V 2 4 7 µs LX Switch Off-Time VFB =1V , VOUT = 3.3V 0.6 0.9 1.3 µs FB Input Current VFB = 1.4V 0.03 50 nA Rev.2.01 6/06/2003 www.SiliconStandard.com 3 of 12 SS6620/21/2 n ELECTRICAL CHARACTERISTICS (Continued) PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT 1 50 nA LBI Input Current VLBI = 1.4V CLSEL Input Current SS6622 , CLSEL = OUT 1.4 3 µA SHDN Input Current V SHDN = 0 or VOUT 0.07 50 nA LBO Low Output Voltage VLBI = 0, ISINK = 1mA 0.2 0.4 µA LBO Off Leakage Current V LBO = 5.5V, VLBI = 5.5V 0.07 1 LBI Hystereisis 50 Damping Switch Resistance SS6622, VBATT = 2V mV 50 100 Ω 0.2VOUT SHDN Input Voltage V 0.8VOUT 0.2VOUT CLSEL Input Voltage V 0.8VOUT Note 1: Start-up voltage operation is guaranteed without the addition of an external Schottky diode between the input and output. Note 2: Steady-state output current indicates that the device maintains output voltage regulation under load. Note 3: Device is bootstrapped (power to the IC comes from OUT). This correlates directly with the actual battery supply. n TYPICAL PERFORMANCE CHARACTERISTICS 100 160 Input Battery Current (µA) 90 Efficiency (%) 80 VIN=2.4V 70 VIN=1.2V 60 50 40 30 20 140 120 100 80 I_limit=0.8A , VOUT=3.3V 60 40 I_limit=0.45A , VOUT =3.3V 20 10 0 0.01 0.1 1 10 100 1000 0 0.0 0.5 Loading (mA) Fig. 1 VOUT=3.3V Rev.2.01 6/06/2003 1.0 1.5 2.0 2.5 3.0 Input battery voltage (V) CLSEL=OUT (0.8A) Fig. 2 No-Load Battery Current vs. Input Battery Voltage www.SiliconStandard.com 4 of 12 SS6620/21/2 n TYPICAL PERFORMANCE CHARACTERISTICS 100 (Continued) 1.8 1.6 Start-up Voltage (V) Efficiency (%) 90 80 V IN=2.4V 70 V IN=1.2V 60 1.4 1.2 1.0 Without Diode 0.8 0.6 With Diode 0.4 50 0.2 40 0.01 0.1 1 10 100 0.0 0.01 1000 1 10 100 Load Current (mA) Fig. 3 V OUT=3.3V CLSEL=GND (0.45A) Fig. 4 Start-up Voltage vs. Load Current 0.10 2.2 0.08 2.0 Shutdown Threshold (V) Shutdown Current (µA) 0.1 Loading (mA) 0.06 0.04 0.02 0.00 -0.02 -0.04 -0.06 -0.08 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 -0.10 1.0 1.5 2.0 Fig. 5 2.5 3.0 3.5 4.0 VOUT (V) Shutdown Current vs. VOUT 0.0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Output Voltage (V) Fig. 6 Shutdown Threshold vs. Output Voltage Maximum Output Current (mA) 800 LX pin waveform VOUT=3.3V 700 600 CLSEL=OUT VOUT AC Couple 500 400 300 200 CLSEL=GND Inductor Current 100 VIN=2.4V VOUT=3.3V 0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 Input Voltage (V) Fig. 7 Maximum Output Current vs. Input Voltage Rev.2.01 6/06/2003 Fig. 8 www.SiliconStandard.com Heavy Load Waveform 5 of 12 SS6620/21/2 n TYPICAL PERFORMANCE CHARACTERISTICS Fig. 9 Without Damping Ringing Function VIN=2.4V VOUT=3.3V (Continued) Fig. 10 With Damping Ringing Function ∆IOUT=200mA VOUT AC Couple Fig. 11 Rev.2.01 6/06/2003 Load Transient Response www.SiliconStandard.com 6 of 12 SS6620/21/2 n BLOCK DIAGRAM SHDN CLSEL OUT Minimum Off-Time + Q1 One Shot BATT LX Q2 F/F S Damping Switch Q3 OUT 0.1µF L 1 47µF Q R C3 220µF R1 200Ω VIN + C1 100µF GND One Shot Maximum On-Time + Mirror FB + + Ref erence Voltage LBO REF C4 0.1µF LBI n PIN DESCRIPTIONS SS6620/ SS6621 PIN 1: FBConnect to OUT for +3.3V output. Use a resistor network to set the output voltage from +1.8V to +4.0V. PIN 2: LBI- Low-battery comparator input. Internally set to trip at +1.23V. PIN 3: LBO- Open-drain low battery comparator output. Output is low when VLBI is <1.23V. LBO is high impedance during shutdown. Rev.2.01 6/06/2003 PIN 4: REF- 1.23V reference voltage. Bypass with a 0.1µF capacitor. PIN 5: SHDN- Shutdown input. High=operating, low=shutdown. PIN 6: GND- Ground PIN 7: LXN-channel and P-channel power MOSFET drain. PIN 8: OUT- Power output. OUT provides bootstrap power to the IC. www.SiliconStandard.com 7 of 12 SS6620/21/2 SS6622 PIN 1: FB- Connect to OUT for +3.3V output. Use a resistor network to set the output voltage from +1.8V to +4.0V. PIN 2: LBI- Low-Battery comparator input. Internally set to trip at +1.23V. PIN 3: LBO- Open-drain low battery comparator output. Output is low when VLBI is <1.23V. LBO is high impedance during shutdown. PIN 4: CLSELCurrent-limit selects input. CLSEL= OUT sets the current limit to 0.8A. CLSEL=GND sets the current limit to 0.45A. PIN 5: REFPIN 6: SHDNPIN 7: BATT- PIN 8: GNDPIN 9: LXPIN 10: OUT- 1.23V reference voltage. Bypass with a 0.1µF capacitor. Shutdown input. High=operating, low=shutdown. Battery input and damping switch connection. If damping switch is unused, leave BATT unconnected. Ground. N-channel and P-channel power MOSFET drain. Power output. OUT provides bootstrap power to the IC. n APPLICATION INFORMATION Overview PFM Control Scheme The SS6620/21/22 series are high efficiency, step-up DC/DC converters, designed to feature a built-in synchronous rectifier, which reduces size and cost by eliminating the need for an external Schottky diode. The start-up voltage is as low as 0.8V and they can operate with an input voltage down to 0.7V. Quiescent supply current is only 20µA. In addition, the SS6622 feature a circuit that eliminates inductorringing to reduce noise. The internal P-MOSFET onresistance is typically 0.3Ω to improve overall efficiency by minimizing AC losses. The current limit of the SS6620 and SS6621 is 0.8A and 0.45A respectively. The SS6622 offers a selectable current limit (0.45A or 0.8A). The lower current limit allows the use of a physically smaller inductor in spacesensitive applications. Rev.2.01 6/06/2003 The key feature of the SS6620 series is a unique minimum-off-time, current-limited, pulse-frequencymodulation (PFM) control scheme (see BLOCK DIAGRAM) with ultra-low quiescent current. A constant-peak-current limit in the switching allows the inductor current to vary between this peak limit and some lesser value. The peak current of the internal NMOSFET power switch can be fixed at 0.8A, 0.45A or is selectable. The ripple voltage does not exceed the product of the peak current limit and the filter capacitor equivalent-series-resistance (ESR). The switch frequency depends on the loading condition and input voltage, and can range up to 500KHz. The switching frequency is governed by a pair of one-shots that set a minimum off-time (1µs) and a maximum on-time (4µs). www.SiliconStandard.com 8 of 12 SS6620/21/2 Synchronous Rectification BATT/Damping Switch Using the internal synchronous rectifier eliminates the need for an external Schottky diode. Therefore, the cost and board space is reduced. During the cycle of off-time, the P-MOSFET turns on and shunts the NMOSFET. Due to the low turn-on resistance of the MOSFET, the synchronous rectifier significantly improves efficiency without the addition of an external component. Thus, the conversion efficiency can be as high as 93%. The SS6622 is designed with an internal damping switch (Fig. 15) to reduce ringing at LX. The damping switch supplies a path to quickly dissipate the energy stored in the inductor and reduces the ringing at LX. Damping LX ringing does not reduce VOUT ripple, but does reduce EMI. A value of R1=200Ω works well for most application while reducing efficiency by only 1%. Larger R1 values provide less damping, but less impact on efficiency. In principle, lower values of R1 are needed to fully damp LX when the VOUT /VIN ratio is high. Reference Voltage The reference voltage (REF) is nominally 1.23V for excellent T.C. performance. In addition, the REF pin can source up to 100µA to an external circuit with good load regulation (<10mV). A bypass capacitor of 0.1µF is required for proper operation and good performance. Selecting the Output Voltage VOUT can be simply set to 3.3V by connecting the FB pin to OUT due to the internal resistor divider (Fig. 16). In order to adjust the output voltage, a resistor divider is connected to VOUT, FB, GND (Fig. 17). Use the following equation to calculate: R5=R6 [(VOUT / VREF )-1] where VREF =1.23V and VOUT may range from 1.8V to 4V. Shutdown The whole circuit is shutdown when V SHDN is low. During shutdown mode, current can flow from the battery to the output through the body diode of the PMOSFET. VOUT falls to approximately (Vin - 0.6V) and LX remains high impedance. The capacitance and load at OUT determine the rate at which VOUT decays. Shutdown can be pulled as high as 6V, regardless of the voltage at OUT. Low-Battery Detection The SS6620 series contain an on-chip comparator with 50mV internal hysteresis (REF, REF+50mV) for low battery detection. If the voltage at LBI falls below the internal reference voltage, LBO (an open-drain output) sinks current to GND. Current Limit Select Pin The SS6622 series allows a selectable inductor current limit of either 0.45A or 0.8A. This allows flexibility in designing for higher current or smaller applications. CLSEL draws 1.4µA when connected to OUT. Rev.2.01 6/06/2003 www.SiliconStandard.com 9 of 12 SS6620/21/2 Component Selection to the efficiency and steady state output current of 1. Inductor Selection the SS6620 series. Therefore HERMEI ca- An inductor value of 22µH performs well in most pacitor LT series with 220µF/6.3V is recom- applications. The SS6620 series also work mended. A smaller capacitor (down to 10µF with with inductors in the 10µH to 47µH range. An in- higher ESR) is acceptable for light loads or in ap- ductor with higher peak inductor current creates a plications that can tolerate higher output ripple. higher output voltage ripple (IPEAK output filter capacitor ESR). The inductor’s DC resistance sig- 3. PCB Layout and Grounding nificantly affects efficiency. We can calculate the maximum output current as follows: VIN VOUT − VIN I OUT(MAX ) = ILIM − t OFF VOUT 2×L η where IOUT(MAX)=maximum output current in amps VIN=input voltage L=inductor value in µH ? =efficiency (typically 0.9) tOFF=LX switch’ off-time in µS ILIM=0.45A or 0.8A Since the SS6622’s switching frequency can range up to 500kHz, the SS6622 can be very sensitive. Careful printed circuit layout is important for minimizing ground bounce and noise. The area around the IC’s OUT pin should be as clear as possible, and the GND pin should be placed close to the ground plane. Keep the IC’s GND pin and the ground leads of the input and output filter capacitors less than 0.2in (5mm) apart. In addition, keep all connections to the FB and LX pins as short as possible. In particular, when using exter- 2. Capacitor Selection nal feedback resistors, locate them as close to the The output voltage ripple is related to the peak in- FB pin as possible. To maximize output power ductor current and the output capacitor ESR. Be- and efficiency and minimize output ripple voltage, sides output ripple voltage, the output ripple cur- use a ground plane and solder the IC’s GND di- rent also needs to be considered. The smaller the rectly to the ground plane. Following are the rec- ESR of the output capacitor, the higher the ripple ommended layout diagrams. current. A filter capacitor with low ESR is helpful Figure 12. Top layer Rev.2.01 6/06/2003 Figure 13. Bottom layer www.SiliconStandard.com Figure 14. Placement 10 of 12 SS6620/21/2 n APPLICATION EXAMPLES VIN VOUT L 22µH R1 200Ω ohm OUT DAMPING SWITCH Q1 Q3 BATT BATT (SS6622) R1 200Ω LX LBI L1 OUT CLSEL (SS6622) 0.1µF C2 0.1µF R2 REF C3 220µF 100KΩ LBO C4 GND SS6622 VOUT SHDN R4 22µH Q2 LX R3 VIN C1 100µF FB LOW BATTERY OUTPUT SS6620 SS6621 SS6622 GND Fig. 16 VOUT = 3.3V Application Circuit. Fig. 15. Simplified Damping Switch Diagram VIN R1 200Ω L 22µH BATT (SS6622) R3 LBI LX VOUT OUT CLSEL (SS6622) C2 0.1µF SHDN R4 100KΩ R2 REF 0.1µF C4 C3 220µF R5 LBO GND SS6620 SS6621 SS6622 Rev.2.01 6/06/2003 Fig. 17 An Adjustable Output Application Circuit C1 100µF LOW BATTERY OUTPUT FB R6 www.SiliconStandard.com 11 of 12 SS6620/21/2 n PHYSICAL DIMENSION l 8 LEAD MSOP (unit: mm) D SYMBOL MIN MAX A1 -- 0.20 A2 0.76 0.97 b 0.28 0.38 C 0.13 0.23 D 2.90 3.10 E 4.80 5.00 E1 2.90 3.10 E E1 e A2 e C 0.65 0.40 0.66 SYMBOL MIN MAX A1 -- 0.20 A2 0.76 0.97 b 0.15 0.30 C 0.13 0.23 D 2.90 3.10 E 4.80 5.00 E1 2.90 3.10 A1 L b l L 10 LEAD MSOP (unit: mm) D E E1 e A2 e C 0.40 0.66 A1 L 0.50 b L Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.01 6/06/2003 www.SiliconStandard.com 12 of 12