SSM09N90GW N-channel Enhancement-mode Power MOSFET PRODUCT SUMMARY BVDSS 900V R DS(ON) 1.2Ω ID 8.6A DESCRIPTION The SSM09N90GW acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for high voltage applications such as AC/DC converters and offline power supplies. The SSM09N90GW is in a TO-247 (TO-3P) package, which is widely used for commercial and industrial applications, where the greater pin spacing is needed to meet safety specifications. The through-hole package is suitable for vertical mounting, where a small footprint is required on the board, and/or an external heatsink is to be attached. Pb-free; RoHS-compliant TO-247 G D S TO-247 (suffix W) ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Units VDS Drain-source voltage 900 V VGS Gate-source voltage ±30 V ID Continuous drain current, TC = 25°C 8.6 A 5 A 30 A TC = 100°C 1 IDM Pulsed drain current PD Total power dissipation, TC = 25°C 240 W Linear derating factor 1.92 W/°C 92 mJ 3 EAS Single pulse avalanche energy IAS Avalanche current 5.2 A E AR Repetitive avalanche energy 8.6 mJ TSTG Storage temperature range -55 to 150 °C TJ Operating junction temperature range -55 to 150 °C THERMAL CHARACTERISTICS Symbol Parameter Value Units RΘ JC Maximum thermal resistance, junction-case 0.52 °C/W RΘ JA Maximum thermal resistance, junction-ambient 40 °C/W Notes: 1. Pulse width must be limited to avoid exceeding the safe operating area. 2. Pulse width <300us, duty cycle <2%. 3. Starting Tj=25°C, VDD=50V , L=6.8mH , RG=25Ω , IAS=5.2A. 8/31/2006 Rev.3.1 www.SiliconStandard.com 1 of 5 SSM09N90GW ELECTRICAL CHARACTERISTICS Symbol (at Tj = 25°C, unless otherwise specified) Parameter Test Conditions Min. Typ. Max. Units 900 - - V V/°C BVDSS Drain-source breakdown voltage VGS=0V, ID=1mA ∆ BV DSS/∆ Tj Breakdown voltage temperature coefficient Reference to 25°C, ID=1mA - 0.67 - RDS(ON) Static drain-source on-resistance VGS=10V, ID=4.5A - - 1.2 Ω VGS(th) Gate threshold voltage VDS=VGS, ID=250uA 2 - 4 V gfs Forward transconductance VDS=10V, ID=4.5A - 11.5 - S IDSS Drain-source leakage current VDS=900V, VGS=0V - - 10 uA VDS=720V ,VGS=0V, Tj = 125°C - - 100 uA VGS=±30V - - ±100 nA ID=8.6A - 67.1 120 nC IGSS Gate-source leakage current 2 Qg Total gate charge Qgs Gate-source charge VDS=540V - 17 - nC Qgd Gate-drain ("Miller") charge VGS=10V - 19.9 - nC VDS=450V - 25.8 - ns 2 td(on) Turn-on delay time tr Rise time ID=5A - 10.3 - ns td(off) Turn-off delay time RG=10Ω , VGS=10V - 305 - ns tf Fall time RD=90Ω 536 - ns Ciss Input capacitance VGS=0V - 4087 6000 pF Coss Output capacitance VDS=25V - 221 - pF Crss Reverse transfer capacitance f=1.0MHz - 51 - pF Min. Typ. - - 1.5 V - 8.6 A - 3 A - Source-Drain Diode Symbol Parameter Test Conditions 2 VSD Forward voltage IS Continuous source current ( body diode ) I SM IS=8.6A, VGS=0V Pulsed source current (body diode ) VD=VG=0V, VS=1.5V 1 - Max. Units Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%. 8/31/2006 Rev.3.1 www.SiliconStandard.com 2 of 5 SSM09N90GW 21 10 10V 5.5V o T C =25 C 10V 5.0V 4.5V T C =150 o C ID , Drain Current (A) ID , Drain Current (A) 8 14 5.0V 7 6 4 V GS = 4.0 V 2 V GS =10V 0 0 0 10 20 30 40 0 12 V DS , Drain-to-Source Voltage (V) 24 36 V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 3 1.3 1.1 Normalized RDS(ON) Normalized BVDSS (V) I D =4.5A V GS =10V 0.9 2 1 0 0.7 -50 0 50 100 T j , Junction Temperature ( o -50 150 0 C) Fig 4. Normalized On-Resistance vs. Junction Temperature 4 10 3 VGS(th) (V) 100 IS (A) 150 T j , Junction Temperature ( C ) Temperature T j = 25 o C 1 2 1 0.1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 V SD , Source-to-Drain Voltage (V) Fig 5. Forward Characteristic of Reverse Diode 8/31/2006 Rev.3.1 100 o Fig 3. Normalized BVDSS vs. Junction T j = 150 o C 50 1.6 -50 0 50 100 150 T j , Junction Temperature ( o C) Fig 6. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 3 of 5 SSM09N90GW f=1.0MHz 10000 14 I D =8.6A Ciss V DS =180V V DS =360V V DS =540V 10 8 C (pF) VGS , Gate to Source Voltage (V) 12 6 Coss 100 Crss 4 2 0 1 0 10 20 30 40 50 60 70 80 90 1 5 9 Q G , Total Gate Charge (nC) 13 17 21 25 29 V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 1 Normalized Thermal Response (Rthjc) 100 10us 10 ID (A) 100us 1ms 1 10ms T C =25 o C Single Pulse DC Duty Factor = 0.5 0.2 0.1 0.1 0.05 PDM 0.02 t T 0.01 Single Pulse Duty Factor = t/T Peak Tj = PDM x Rthjc + T C 0.01 0.1 1 10 100 1000 10000 0.00001 0.0001 V DS , Drain-to-Source Voltage (V) Fig 9. Maximum Safe Operating Area 0.001 0.01 0.1 1 10 t , Pulse Width (s) Fig 10. Effective Transient Thermal Impedance VG VDS 90% QG 10V QGS QGD 10% VGS td(on) tr td(off) tf Fig 11. Switching Time Waveform 8/31/2006 Rev.3.1 Charge Q Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 of 5 SSM09N90GW PHYSICAL DIMENSIONS - TO-247 E A SYMBOLS φ MIN L1 c1 D b1 L3 Millimeters b2 A1 L NOM MAX A 4.60 4.80 5.00 A1 1.20 1.40 1.60 b b1 0.80 1.00 1.20 2.80 3.00 3.20 b2 1.80 2.00 2.20 c c1 0.55 0.60 0.75 1.45 1.50 1.65 D 19.70 19.90 20.10 E 15.40 15.60 15.80 e 5.15 5.45 5.75 L 16.20 16.50 16.80 L1 3.60 3.80 4.00 L3 3.30 3.50 3.70 1. All dimensions are in millimeters. 2. Dimensions do not include mold protrusions. c b e PART MARKING - TO-247 PACKING: Moisture sensitivity level MSL3 1000pcs in tubes packed inside a moisture barrier bag (MBB). 09N90GW YWWSSS PART NUMBER: 09N90GW = SSM09N90GW DATE/LOT CODE: Y = last digit of the year WW = work week (01 -> 52) SSS = lot code sequence Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 8/31/2006 Rev.3.1 www.SiliconStandard.com 5 of 5