SSM9926GM
Dual N-channel Enhancement-mode Power MOSFETs
PRODUCT SUMMARY
BVDSS
20V
R DS(ON)
30mΩ
ID
6A
DESCRIPTION
The SSM9926GM acheives fast switching performance
with low gate charge without a complex drive circuit. It
is suitable for low voltage applications such as DC/DC
converters and general load-switching circuits.
The SSM9926GM is supplied in an RoHS-compliant
SO-8 package, which is widely used for medium power
commercial and industrial surface mount applications.
Pb-free; RoHS-compliant SO-8
D2
D2
D1
D1
G2
S2
SO-8
S1
G1
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-source voltage
VGS
Gate-source voltage
ID
IDM
PD
Continuous drain current
Pulsed drain current
3
,
Value
Units
20
V
± 12
V
T A = 25°C
6
A
TA = 70°C
4.8
A
26
A
2
W
0.016
W/°C
1,2
3
Total power dissipation , TA = 25°C
Linear derating factor
TSTG
Storage temperature range
-55 to 150
°C
TJ
Operating junction temperature range
-55 to 150
°C
THERMAL CHARACTERISTICS
Symbol
RΘJA
Parameter
Maximum thermal resistance, junction-ambient
3
Value
Units
62.5
°C/W
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C.
2.Pulse width <300us, duty cycle <2%.
3.Mounted on a square inch of copper pad on FR4 board ; 135°C/W when mounted on the minimum pad area required for soldering.
3/16/2006 Rev.3.01
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SSM9926GM
ELECTRICAL CHARACTERISTICS
Symbol
(at Tj = 25°C, unless otherwise specified)
Parameter
Test Conditions
Min.
Typ.
Max. Units
20
-
-
V
BVDSS
Drain-source breakdown voltage
VGS=0V, ID=250uA
∆ BV DSS/∆ Tj
Breakdown voltage temperature coefficient
Reference to 25°C, ID=1mA
-
0.03
-
V/°C
RDS(ON)
Static drain-source on-resistance2
VGS=4.5V, ID=6A
-
-
30
mΩ
VGS=2.5V, ID=5.2A
-
-
45
mΩ
VDS=VGS, ID=250uA
-
-
1.2
V
VGS(th)
Gate threshold voltage
gfs
Forward transconductance
VDS=10V, ID=6A
-
20
-
S
IDSS
Drain-source leakage current
VDS=20V, VGS=0V
-
-
25
uA
VDS=20V ,VGS=0V, Tj = 70°C
-
-
250
uA
VGS=±12V
-
-
±100
nA
ID=6A
-
23
35
nC
IGSS
Gate-source leakage current
2
Qg
Total gate charge
Qgs
Gate-source charge
VDS=20V
-
4.5
7
nC
Qgd
Gate-drain ("Miller") charge
VGS=5V
-
7
11
nC
VDS=10V
-
30
60
ns
2
td(on)
Turn-on delay time
tr
Rise time
ID=1A
-
70
140
ns
td(off)
Turn-off delay time
RG=6Ω , VGS=5V
-
40
80
ns
tf
Fall time
RD=10Ω
-
65
130
ns
Ciss
Input capacitance
VGS=0V
-
1035
-
pF
Coss
Output capacitance
VDS=20V
-
320
-
pF
Crss
Reverse transfer capacitance
f=1.0MHz
-
150
-
pF
Min.
Typ.
Max. Units
-
0.78
1.2
V
-
-
1.54
A
Source-Drain Diode
Symbol
Parameter
2
VSD
Forward voltage
Is
Continuous source current (body diode)
Test Conditions
IS=1.7A, VGS=0V
VD=VG=0V , VS=1.3V
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C.
2.Pulse width <300us, duty cycle <2%.
3/16/2006 Rev.3.01
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SSM9926GM
20
25
T C =150 o C
T C =25 o C
ID , Drain Current (A)
ID , Drain Current (A)
16
4.5V
4.0V
20
3.5V
15
10
3.0V
3.5V
12
2.5V
5
4.5V
4.0V
3.0V
8
2.5V
4
2.0V
V GS = 2 .0V
0
V GS = 1 . 5 V
0
0
0.4
0.8
1.2
0
0.4
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1.2
1.6
Fig 2. Typical Output Characteristics
1.8
50
I D =6A
I D =6A
V GS =2.5V
V GS =4.5V
1.5
4.5V
Normalized RDS(ON)
40
RDS(ON) (mohm)
0.8
V DS , Drain-to-Source Voltage (V)
30
1.2
0.9
20
0.6
10
-50
0
50
100
150
-50
0
3/16/2006 Rev.3.01
100
150
T j , Junction Temperature ( C)
T j , Junction Temperature ( C)
Fig 3. RDS(ON) vs. Junction Temperature
50
o
o
Fig 4. Normalized On-Resistance
vs. Temperature
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SSM9926GM
2.5
8
7
2
5
1.5
PD (W)
ID , Drain Current (A)
6
4
3
1
2
0.5
1
0
0
25
50
75
100
125
150
0
50
o
100
150
o
T c , Case Temperature ( C)
Tc ( C )
Fig 5. Maximum Drain Current vs.
Case Temperature
Fig 6. Typical Power Dissipation
100
1
Normalized Thermal Response (R thja)
Duty Factor = 0.5
10
1ms
ID (A)
10ms
1
100ms
1s
T C =25 o C
Single Pulse
0.1
10s
DC
0.01
0.2
0.1
0.1
0.05
0.02
t
0.01
T
Single Pulse
Duty Factor = t/T
Peak Tj = P DM x Rthja + Ta
Rthja=135oC/W
0.001
0.1
1
10
100
0.0001
V DS (V)
0.001
0.01
0.1
1
10
100
1000
t , Pulse Width (S)
Fig 7. Maximum Safe Operating Area
3/16/2006 Rev.3.01
PDM
0.01
Fig 8. Effective Transient Thermal Impedance
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SSM9926GM
f=1.0MHz
10000
12
VGS , Gate to Source Voltage (V)
V DS =10V
V DS =15V
9
C (pF)
V DS =20V
6
Ciss
1000
3
Coss
Crss
0
100
0
9
18
27
36
45
1
10
Q G , Total Gate Charge (nC)
Fig 9. Typical Gate Charge vs. VGS
Fig 10. Typical Capacitance vs. VDS
1.2
10
T j =150 o C
0.95
T j =25 o C
Vth (V)
IF (A)
19
V DS (V)
1
0.7
0.45
0.2
0.1
0
0.4
0.8
1.2
1.6
-50
0
100
150
o
T j , Junction Temperature ( C )
V SD (V)
Fig 11. Forward Characteristic of
Reverse Diode
3/16/2006 Rev.3.01
50
Fig 12. Gate Threshold Voltage vs.
Junction Temperature
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SSM9926GM
VDS
90%
RD
VDS
D
0.5x RATED VDS
G
RG
TO THE
OSCILLOSCOPE
+
10%
VGS
S
5v
VGS
-
td(on)
Fig 13. Switching Time Circuit
td(off) tf
tr
Fig 14. Switching Time Waveform
VG
VDS
QG
TO THE
OSCILLOSCOPE
D
5V
RATED VDS
G
S
QGS
QGD
VGS
+
1~ 3 mA
IG
ID
Charge
Fig 15. Gate Charge Circuit
3/16/2006 Rev.3.01
Q
Fig 16. Gate Charge Waveform
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SSM9926GM
PHYSICAL DIMENSIONS
D
SYMBOL
MIN
MAX
A
1.35
1.75
A1
0.10
0.25
B
0.33
0.51
C
0.19
0.25
D
4.80
5.00
E
3.80
4.00
H
E
e
e
A
A1
C
B
L
1.27(TYP)
H
5.80
6.50
L
0.38
1.27
All dimensions in millimeters.
Dimensions do not include mold protrusions.
PART MARKING
PART NUMBER: 9926GM
XXXXXX
YWWSSS
DATE/LOT CODE: (YWWSSS)
Y = last digit of the year
WW = week
SSS = lot code sequence
PACKING: Moisture sensitivity level MSL3
3000 pcs in antistatic tape on a 13 inch (330mm) reel packed in a moisture barrier bag (MBB).
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
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