SSM28G45EM N-CHANNEL INSULATED-GATE BIPOLAR TRANSISTOR High input impedance C High peak current capability C VCE 450V ICP 130A C C 3.3V gate drive C G SO-8 E E G E E Absolute Maximum Ratings Parameter Rating Units VCE Symbol Collector-Emitter Voltage 450 V VGE Gate-Emitter Voltage ±6 V VGEP Pulsed Gate-Emitter Voltage ±8 V Pulsed Collector Current 130 A Maximum Power Dissipation 2.5 W TSTG Storage Temperature Range -55 to 150 °C TJ Operating Junction Temperature Range -55 to 150 °C ICP PD @ TC=25°C 1 Electrical Characteristics @ Tj=25oC (unless otherwise specified) Parameter Symbol Min. Typ. Max. Units - - 10 µA IGES Gate-Emitter Leakage Current Test Conditions VGE=± 6V, VCE=0V ICES Collector-Emitter Leakage Current (Tj=25°C) VCE=450V, VGE=0V - - 10 µA VCE(sat) Collector-Emitter Saturation Voltage VGE=3.3V, ICP=130A (Pulsed) - 3.8 6 V VGE(th) Gate Threshold Voltage VCE=VGE, IC=250µA - - 1 V Qg Total Gate Charge IC=40A - 74 120 nC Qge Gate-Emitter Charge VCE=360V - 8 - nC Qgc Gate-Collector Charge VGE=4.5V - 34 - nC td(on) Turn-on Delay Time VCC=200V - 20 - ns tr Rise Time IC=15A - 100 - ns td(off) Turn-off Delay Time RG=10Ω - 400 - ns tf Fall Time VGE=5V - 3 - µs Cies Input Capacitance VGE=0V - 3020 4830 pF Coes Output Capacitance VCE=25V - 220 - pF Reverse Transfer Capacitance f=1.0MHz - 50 - pF - - 50 °C/W Cres RthJA 1 Thermal Resistance Junction-Ambient Notes: 1.Surface mounted on 1 in2 copper pad of FR4 board ; 125°C/W when mounted on min. copper pad. 9/21/2004 Rev.2.01 www.SiliconStandard.com 1 of 4 SSM28G45EM 140 240 o IC , Collector Current (A) IC , Collector Current (A) 5.0V 4.0V T A =25 C 200 160 3.3V 120 2.0V 80 T A = 150 C 3.3 V 100 80 60 2.0V 40 V G =1.0V 40 V G =1.0V 20 0 0 0 2 4 6 8 10 12 0 1 Fig 1. Typical Output Characteristics 3 4 5 6 7 Fig 2. Typical Output Characteristics 240 9 V GE =4.0V VCE(sat) ,Saturation Voltage(V) V CE =6.0V 200 o 25 C IC , Collector Current(A) 2 V CE , Collector-Emitter Voltage (V) V CE , Collector-Emitter Voltage (V) o 70 C 160 125 o C T A =150 o C 120 80 40 0 7 I C =130A I C =120A 5 I C =100A I C =50A 3 1 0 1 2 3 4 5 6 0 20 40 60 80 100 120 140 160 Junction Temperature ( o C) V GE , Gate-Emitter Voltage (V) Fig 3. Collector Current vs. Gate-Emitter Voltage Fig 4. Collector- Emitter Saturation Voltage vs. Junction Temperature 1.2 10 VCE ,Collector-Emitter Voltage(V) VGE(th) ,Gate Threshold Voltage (V) 5.0V 4.0V o 120 1.0 0.8 0.6 0.4 0.2 0.0 o T A =25 C I C = 130 A 120A 100A 50A 8 6 4 2 0 -50 0 50 100 150 0 1 o Fig 5. Gate Threshold Voltage vs. Junction Temperature 9/21/2004 Rev.2.01 2 3 4 5 6 V GE , Gate-Emitter Voltage(V) Junction Temperature ( C ) Fig 6. Collector Current vs. Gate-Emitter Voltage www.SiliconStandard.com 2 of 4 SSM28G45EM f=1.0MHz 10000 160 o C (pF) 1000 Coes 100 Cres ICP , Peak Collector Current (A) T A =25 C Cies 10 120 80 40 0 1 5 9 13 17 21 25 29 0 2 4 6 8 V GE , Gate-to-Emitter Voltage (V) V CE , Collector-Emitter Voltage (V)) Fig 7. Typical Capacitance Characterisitics Fig 8. Maximum Pulse Collector Current VCE RC 90% TO THE OSCILLOSCOPE C VCE G RG VCC=200 V 10% E VGE + - 5V VGE td(on) tr Fig 9. Switching Time Test Circuit td(off) tf Fig 10. Switching Time Waveform VCE TO THE C OSCILLOSCOPE G VCC=360V VGE E + 1~3mA - IG IC VGE , Gate -Emitter Voltage (V) 12 I CP =40A V CE =360V 10 8 6 4 2 0 0 40 80 120 160 200 Q G , Gate Charge (nC) Fig 11. Gate Charge Test Circuit 9/21/2004 Rev.2.01 Fig 12. Gate Charge Waveform www.SiliconStandard.com 3 of 4 SSM28G45EM Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 9/21/2004 Rev.2.01 www.SiliconStandard.com 4 of 4