SSM70T03GH,J N-channel Enhancement-mode Power MOSFET PRODUCT SUMMARY BVDSS 30V R DS(ON) 9mΩ ID 60A DESCRIPTION The SSM70T03 acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as DC/DC converters and general load-switching circuits. The SSM70T03GH is in a TO-252 package, which is widely used for commercial and industrial surface-mount applications. Pb-free; RoHS-compliant TO-251 (IPAK) and TO-252 (DPAK) G The through-hole version, the SSM70T03GJ in TO-251, is available for vertical mounting, where a small footprint is required on the board, and/or an external heatsink is to be attached. These devices are manufactured with an advanced process, providing improved on-resistance and switching performance. The devices have a maximum junction temperature rating of 175°C for improved thermal margin and reliability. G D S D S TO-251 (suffix J) TO-252 (suffix H) ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Units VDS Drain-source voltage 30 V VGS Gate-source voltage ±20 V ID Continuous drain current, TC = 25°C 60 A 43 A 195 A 53 W 0.36 W/°C 29 mJ TC = 100°C 1 IDM Pulsed drain current PD Total power dissipation, TC = 25°C Linear derating factor 3 EAS Single pulse avalanche energy TSTG Storage temperature range -55 to 175 °C TJ Operating junction temperature range -55 to 175 °C THERMAL CHARACTERISTICS Symbol Parameter Value Units RΘ JC Maximum thermal resistance, junction-case 2.8 °C/W RΘ JA Maximum thermal resistance, junction-ambient 110 °C/W Notes: 1.Pulse width must be limited to avoid exceeding the safe operating area. 2.Pulse width <300us, duty cycle <2%. 3.VDD=25V , L=100uH , RG=25Ω , IAS=24A. 10/16/2005 Rev.3.1 www.SiliconStandard.com 1 of 5 SSM70T03GH,J ELECTRICAL CHARACTERISTICS Symbol (at Tj = 25°C, unless otherwise specified) Parameter BVDSS Drain-source breakdown voltage ∆ BV DSS/∆ T j Breakdown voltage temperature coefficient RDS(ON) Static drain-source on-resistance Test Conditions Min. VGS=0V, ID=250uA 30 Reference to 25°C, ID=1mA - Typ. Max. Units - - V 0.032 - V/°C VGS=10V, ID=33A - - 9 mΩ VGS=4.5V, ID=20A - - 18 mΩ Gate threshold voltage VDS=VGS, ID=250uA 1 - 3 V gfs Forward transconductance VDS=10V, ID=33A - 35 - S IDSS Drain-source leakage current VGS(th) IGSS Gate-source leakage current 2 VDS=30V, VGS=0V - - 1 uA VDS=24V ,VGS=0V, Tj=175°C - - 250 uA VGS= ±20V - - ±100 nA ID=33A - 16.5 - nC Qg Total gate charge Qgs Gate-source charge VDS=20V - 5 - nC Qgd Gate-drain ("Miller") charge VGS=4.5V - 10.3 - nC VDS=15V - 8.2 - ns 2 td(on) Turn-on delay time tr Rise time ID=33A - 105 - ns td(off) Turn-off delay time RG=3.3Ω , VGS=10V - 21.4 - ns tf Fall time RD=0.45Ω - 8.5 - ns Ciss Input capacitance VGS=0V - 1485 - pF Coss Output capacitance VDS=25V - 245 - pF Crss Reverse transfer capacitance f=1.0MHz - 170 - pF Source-Drain Diode Symbol VSD Parameter 2 Forward voltage 2 trr Reverse-recovery time Qrr Reverse-recovery charge Test Conditions Min. Typ. Max. Units IS=60A, VGS=0V - - 1.3 V IS=30A, VGS=0V, - 29 - ns dI/dt=100A/µs - 12 - nC Notes: 1.Pulse width must be limited to avoid exceeding the safe operating area. 2.Pulse width <300us, duty cycle <2%. 3.VDD=25V , L=100uH , RG=25Ω , IAS=24A. 10/16/2005 Rev.3.1 www.SiliconStandard.com 2 of 5 SSM70T03GH,J 120 200 o T C =25 C 90 ID , Drain Current (A) 150 ID , Drain Current (A) 10V 8.0V 6.0V T C =175 o C 10V 8.0V 6.0V 100 V GS =4.0V 50 60 V GS =4.0V 30 0 0 0.0 1.5 3.0 0.0 4.5 1.5 V DS , Drain-to-Source Voltage (V) 3.0 4.5 V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 2 60 I D =33A T C =25°C I D =33A V GS =10V 1.6 Normalized RDS(ON) RDS(ON) (mΩ ) 40 20 1.2 0.8 0.4 0 0 4 8 12 -50 16 25 T j , Junction Temperature ( C) Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 100 2 VGS(th) (V) 2.5 IS(A) 1000 Tj=175 o C Tj=25 o C 1 1.5 1 0.1 0.5 0 0.5 1 1.5 V SD , Source-to-Drain Voltage (V) Fig 5. Forward Characteristic of Reverse Diode 10/16/2005 Rev.3.1 175 o V GS , Gate-to-Source Voltage (V) 10 100 -50 25 100 T j , Junction Temperature ( 175 o C) Fig 6. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 3 of 5 SSM70T03GH,J 12 f=1.0MHz 10000 V DS =16V V DS =20V V DS =24V 9 C (pF) VGS , Gate to Source Voltage (V) I D =33A 6 C iss 1000 C oss C rss 3 100 0 0 10 20 1 30 8 15 22 29 V DS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 1000 Normalized Thermal Response (Rthjc) 1 10us ID (A) 100 100us 10 1ms T C =25 o C Single Pulse 10ms 100ms DC 1 Duty Factor = 0.5 0.2 0.1 0.1 0.05 0.02 PDM t 0.01 T Single Pulse Duty Factor = t/T Peak Tj = PDM x Rthjc + T C 0.01 0.1 1 10 100 0.00001 0.0001 V DS , Drain-to-Source Voltage (V) 0.001 0.01 0.1 1 t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig10. Effective Transient Thermal Impedance VG VDS 90% QG 4.5V QGS QGD 10% VGS td(on) tr td(off) t Fig 11. Switching Time Waveform 10/16/2005 Rev.3.1 Charge f Q Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 of 5 SSM70T03GH,J PHYSICAL DIMENSIONS A E H e SEE VIEW B MIN. MAX. 1.80 2.80 A1 0.00 0.13 b 0.40 1.00 b3 4.80 5.90 c 0.35 0.65 b c BASE METAL SECTION A-A θ SEATING PLANE L1 0.40 0.89 5.10 6.30 E 6.00 7.00 2.30 BSC H 7.80 11.05 L 1.00 2.55 L1 2.20 3.05 L2 0.35 0.65 L3 0.50 2.03 L4 0.50 1.20 θ 0° 8° A1 L2 L c2 D e WITH PLATING GAUGE PLANE MILLIMETERS A L3 D L4 A A TO-252-3L S Y M B O L c2 b3 VIEW B *Dimensions do not include mold protrusions. PART MARKING PART NUMBER: 70T03GH or 70T03GJ XXXXXX DATE/LOT CODE: (YWWSSS) Y = last digit of the year WW = week SSS = lot code sequence YWWSSS PACKING: Moisture sensitivity level MSL3 TO-252: 3000 pcs in antistatic tape on a reel packed inside a moisture barrier bag (MBB). TO-251: 1000pcs in an antistatic bag packed inside a moisture barrier bag (MBB). Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 10/16/2005 Rev.3.1 www.SiliconStandard.com 5 of 5