SSM2318GEN
N-channel Enhancement-mode Power MOSFET
PRODUCT SUMMARY
BVDSS
30V
R DS(ON)
720mΩ
ID
1A
DESCRIPTION
The SSM2318GEN acheives fast switching performance
with low gate charge without a complex drive circuit. It
is suitable for low voltage applications such as DC/DC
converters and general load-switching circuits.
The SSM2318GEN is supplied in an RoHS-compliant
SOT-23-3 package, which is widely used for lower
power commercial and industrial surface mount
applications.
Pb-free; RoHS-compliant SOT-23-3
D
The gate has internal ESD protection.
S
SOT-23-3
G
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-source voltage
VGS
Gate-source voltage
ID
IDM
PD
Continuous drain current
Pulsed drain current
3
,
Value
Units
30
V
± 16
V
T A = 25°C
1
A
TA = 70°C
800
mA
2
A
1.38
W
0.01
W/°C
1,2
3
Total power dissipation , TA = 25°C
Linear derating factor
TSTG
Storage temperature range
-55 to 150
°C
TJ
Operating junction temperature range
-55 to 150
°C
THERMAL CHARACTERISTICS
Symbol
RΘJA
Parameter
Maximum thermal resistance, junction-ambient
3
Value
Units
90
°C/W
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C.
2.Pulse width <300us, duty cycle <2%.
3.Mounted on a square inch of copper pad on FR4 board ; 270°C/W when mounted on the minimum pad area required for soldering.
6/16/2006 Rev.3.01
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SSM2318GEN
ELECTRICAL CHARACTERISTICS
Symbol
(at Tj = 25°C, unless otherwise specified)
Parameter
Test Conditions
BVDSS
Drain-source breakdown voltage
VGS=0V, ID=250uA
∆ BV DSS/∆ Tj
Breakdown voltage temperature coefficient
Reference to 25°C, ID=1mA
RDS(ON)
Static drain-source on-resistance
VGS=4V, ID=500mA
VGS=2.5V, ID=200mA
VGS(th)
Gate threshold voltage
Min.
Typ.
30
-
-
V
-
0.04
-
V/°C
720
mΩ
-
-
Max. Units
-
-
1200
mΩ
VDS=VGS, ID=250uA
0.4
-
1.3
V
gfs
Forward transconductance
VDS=4V, ID=500mA
-
725
-
mS
IDSS
Drain-source leakage current
VDS=30V, VGS=0V
-
-
1
uA
VDS=24V ,VGS=0V, Tj = 70°C
-
-
25
uA
VGS=±16V
-
-
±30
uA
ID=1A
-
1.1
1.8
nC
IGSS
Gate-source leakage current
2
Qg
Total gate charge
Qgs
Gate-source charge
VDS=25V
-
0.4
-
nC
Qgd
Gate-drain ("Miller") charge
VGS=4.5V
-
0.4
-
nC
VDS=15V
-
17
-
ns
-
ns
2
td(on)
Turn-on delay time
tr
Rise time
ID=1A
-
44
td(off)
Turn-off delay time
RG=3.3Ω , VGS=5V
-
45
-
ns
tf
Fall time
RD=15Ω
-
55
-
ns
Ciss
Input capacitance
VGS=0V
-
30
48
pF
Coss
Output capacitance
VDS=25V
-
12
-
pF
Crss
Reverse transfer capacitance
f=1.0MHz
-
11
-
pF
Source-Drain Diode
Symbol
VSD
Parameter
Forward voltage
2
Test Conditions
IS=1A, VGS=0V
Min.
Typ.
-
-
Max. Units
1.3
V
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C.
2.Pulse width <300us, duty cycle <2%.
6/16/2006 Rev.3.01
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SSM2318GEN
2.5
2.5
5.0V
4.5V
4.0 V
ID , Drain Current (A)
2.0
o
5.0V
4.5V
TA=150 C
2.0
ID , Drain Current (A)
o
T A = 25 C
1.5
1.0
2.5V
4.0 V
1.5
1.0
2.5V
0.5
0.5
V G = 1 .5V
V G = 1 .5V
0.0
0.0
0.0
2.0
4.0
0.0
6.0
2.0
4.0
6.0
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3300
2.0
I D =500mA
V G =4V
I D =200mA
T A =25 o C
Normalized RDS(ON)
1.6
RDS(ON) (mΩ )
2300
1300
1.2
0.8
0.4
300
1
2
3
4
-50
5
0
V GS , Gate-to-Source Voltage (V)
50
100
150
o
T j , Junction Temperature ( C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
2.0
1.0
0.8
Normalized VGS(th) (V)
IS(A)
1.5
0.6
T j =150 o C
T j =25 o C
0.4
1.0
0.5
0.2
0.0
0.0
0
0.2
0.4
0.6
0.8
1
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
1.2
-50
0
100
150
Fig 6. Gate Threshold Voltage vs.
Reverse Diode
6/16/2006 Rev.3.01
50
T j , Junction Temperature ( o C)
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Junction Temperature
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SSM2318GEN
f=1.0MHz
12
100
V DS =15V
V DS =20V
V DS =25V
9
C (pF)
VGS , Gate to Source Voltage (V)
I D =1A
6
C iss
3
C oss
C rss
10
0
0.0
0.5
1.0
1.5
2.0
1
2.5
5
9
13
17
21
25
29
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1
Normalized Thermal Response (Rthja)
10
1
ID (A)
10ms
100ms
0.1
T A =25 o C
Single Pulse
1s
DC
Duty factor=0.5
0.2
0.1
0.1
PDM
t
T
0.05
Duty factor = t/T
Peak Tj = PDM x Rthja + T a
Rthja = 270°C/W
0.01
Single Pulse
0.01
0.01
0.1
1
10
100
0.0001
0.001
0.01
V DS , Drain-to-Source Voltage (V)
0.1
1
10
100
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
2.0
VG
V DS =5V
ID , Drain Current (A)
1.5
QG
4.5V
T j =25 o C
T j =150 o C
QGS
1.0
QGD
0.5
Charge
Q
0.0
0
2
4
6
V GS , Gate-to-Source Voltage (V)
Fig 11. Transfer Characteristics
6/16/2006 Rev.3.01
Fig 12. Gate Charge Circuit
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SSM2318GEN
PHYSICAL DIMENSIONS
SOT-23-3
SOT-23-3
SYMBOL MILLIMETERS
MIN.
MAX.
A
0.89
1.45
A1
0
0.15
A2
0.70
1.30
b
0.30
0.50
c
0.08
0.25
D
2.65
3.10
E
2.10
3.00
E1
1.19
2.30
e
0.95BSC
e1
1.90BSC
L
0.30
L1
Θ
0.60
0.60REF
0°
8°
*Dimensions do not include mold protrusions.
PART MARKING
PART NUMBER CODE: NM = SSM2318GEN
First character is underlined to indicate Pb-free part
NMXX
XX = DATE/LOT CODE - contact SSC for
information on decoding this.
PACKING: Moisture sensitivity level MSL3
3000 pcs in antistatic tape on a reel packed in a moisture barrier bag (MBB).
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
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responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
6/16/2006 Rev.3.01
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