APT7846 Touch Screen Controller Features Description • • • • 16 Pin SSOP or TSSOP • Calibration The APT7846 is enhance function of APT7843 added battery and temperature monitor function and offer of a bandgap reference voltage for system user. The APT7846 Touch Screen Controller IC provides all the screen driver , A/D converter and control circuits to easily interface to 4 wire resistive touch screen. The IC continually monitors the screen waiting for a touch. When the screen touched , the IC performs A/D converter to determine the location of touch. Also , this device has 1 auxiliary input to A/D converter , allowing for the measurement of other input signal. • • • Operates With Four Wire Touch Screen 8-Bit or 12-Bit A/D Converter Ratiometric Conversion Eliminates Screen 1 Auxiliary Analog Input Full Power Down Control Internal Bandgap Reference Serial Interface To Microprocessor Pin Assignment Applications • • • • • PDAs Hand held computer Touch-screen mobile phone Protable electronic dictionary Smart IA +Vcc 1 16 DCLK X+ 2 15 CS Y+ 3 14 DIN X- 4 13 BUSY Y- 5 12 DOUT GND 6 11 PENIRQ V*)6 7 10 +Vcc IN 8 9 V4-. Ordering Information Package Code N : SSOP Temp. Range I : - 40 to 85 °C Handling Code TU : Tube APT7846 Handling Code Temp. Range O : TSSOP TR : Tape & Reel Package Code ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 1 www.anpec.com.tw APT7846 Block Diagram PENIRQ DCLK X+ CS XY+ Screen Driver Y- 12 Bit or 8 Bit A/D Converter MUX DIN Serial Interface DOUT V*)6 BUSY IN Internal Reference V4-. Pin Description PIN NAME 1 +Vcc 2 X+ Connect to X+ on touch screen. 3 Y+ Connect to Y+ on touch screen. 4 X- Connect to X- on touch screen. 5 Y- Connect to Y- on touch screen. 6 GND 7 V*)6 8 IN 9 V4-. Voltage Reference Input or Output. 10 +Vcc Power Supply , 2.7V to 5V. DESCRIPTION Power Supply , 2.7V to 5V. Ground Measure Battery Input. Auxiliary input of A/D converter. 11 PENIRQ 12 DOUT Serial Data Output. This output is high impedance when CS is HIGH. 13 BUSY Busy Output. This output is high impedance whenCS is HIGH. 14 DIN 15 CS 16 DCLK Pen interrupt. (requires to 100kΩ pull-up resistor externally) Serial Data input. Chip Select. (Active Low) Serial Clock. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 2 www.anpec.com.tw APT7846 Electrical Characteristics At TA = -40°C to 85°C, VCC = +2.7V , VREF = +2.5V , fSAMPLE = 125kHz , fCLK = 16 f SAMPLE = 2MHz , 12-bit mode , and digital inputs = GND or Vcc , unless otherwise noted. PARAMETER CONDITIONS APT7846 MIN TYP MAX UNIT DC ACCURACY Resolution 12 No missing code Bits 11 Bits Integral Nonlinearity ±2 LSB Offset Error ±6 LSB 1 LSB ±4 LSB 1 LSB Offset Error Match 0.1 Gain Error Gain Error Match 0.1 Noise 30 uV rms Power Supply Rejection 70 dB REFERENCE INPUT VREF Input Voltage Range 1.0 DC Leakage Current VREF Input Impedance CS = GND or Vcc VREF Input Current Vcc ±1 µA 5 GΩ 13 FSAMPLE = 12.5 kHz 40 2.5 CS = Vcc µA µA 3 µA 2.6 V REFERENCE OUTPUT Internal Reference Voltage Input Impedence 2.4 Internal Reference Off 2.5 1 GΩ Aperture Delay 30 ns Aperture Jitter 100 ps 100 dB DYNAMIC PERFORMANCE Channel to Channel Isolation VIN = 2.5Vp-p ; FIN = 50kHz CONVERSION RATE Conversion Time 12 Track/Hold Acquisition Time 3 DCLK cycles DCLK cycles Throughput Rate 125 KSPS SWITCH DRIVERS On-Resistance Y+ , X+ 4 15 Ω Y- , X- 4 15 Ω Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 3 www.anpec.com.tw APT7846 Electrical Characteristics (Cont.) PARAMETER CONDITIONS APT7846 MIN TYP MAX UNIT LOGIC INPUTS Input High Voltage , V I N H |I I N H | ≤ +5µA Input Low Voltage , V I N L |I I N L | ≤ +5µA 2.4 V 0.8 V Input Current , I I N ±1 µA Input Capacitance , C I N 10 pF LOGIC OUTPUTS Output High Voltage , V O H |I O H | ≤ -250µA Output Low Voltage , V O L |I O L | ≤ 250µA V Vcc 0.2 0.4 V PENIRQ output low voltage , V O L 0.2 V Floating-State Leakage Current ± 10 µA Floating-State Output Capacitance 10 pF Output Coding Straight ( Natural ) Binary ANALOG INPUT Input Voltage Ranges 0 DC Leakage Current Input Capacitance V R EF V ± 0.1 µA 30 pF POWER REQUIREMENTS Vcc Icc 2.7 3.6 V Digital I/Ps =0V or Vcc Normal Mode (Static) Vcc = 3.6V 650 µA Normal Mode (FSAMPLE = 12.5kSPS) Vcc = 3.6V 540 µA 3 µA 3.6 µW 6 V Shutdown Mode(Static) Showdown Vcc = 3.6V BATTERY MEASURE Input Voltage Range 0.5 Input impedance Sample Battery On 10 KΩ Sample Battery Off 1 GΩ Accuracy V R EF -2 2 % -40 85 °C TEMPERATURE RANGE Normal Operation Note : (1) LSB means least Significant Bit. With VREF equal to +2.5V , one LSB is 610µV Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 4 www.anpec.com.tw APT7846 conversion. This A/D converter may also be used to measure voltage presented on the IN Pin or to measure battery presented on the VBAT Pin. Chip Overview The APT7846 is a successive approximation analog-to-digital (A/D) converter based around a capacitive redistribution DAC. Figure 1 show basic operation of the APT7846. The APT7846 communicates via a 4-wire serial interface. The device requires an external reference voltage Vref. The value of the reference voltage directly sets the input range of the converter. Otherwise you can use internal reference Voltage to do conversion. Analog Input The analog input to the converter is provided via a four-channel multiplexer. Figure 2 shows a simplified diagram of the APT7846 with the difference input of the A/D converter , and the converters reference. Table I and Table II also show the relationship between the A2 , A1 , A0 , SER/,.4 and the configuration of the APT7846. See the section of single-ended reference mode and differential reference mode for more details. The APT7846 primary function is to control resistive touchscreens. When a touch is detected , pen interrupt pin will go low to wake up extenal microprocessor . The microprocessor writes register to initiate +2.7V to +5v 1uF to 10uF (Optional) APT7846 0.1uF DCLK 16 X+ CS 15 3 Y+ DIN 14 4 X- BUSY 13 5 Y- DOUT 12 6 GND PENIRQ 11 Battery Input 7 VBAT +Vcc 10 Auxiliary Input 8 IN VREF 9 To Touch Screen 1 +Vcc 2 0.1uF Connect to Microprossor 100k ohm (optional) FIGURE 1. Basic Operation of the APT7846 Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 5 www.anpec.com.tw APT7846 PENIRQ TEMP 1 +Vcc VREF TEMP 0 A2-A0 (Shown 001 B) SER/DFR (Shown HIGH) Ref ON/OFF X+ X- Y+ +IN Y- -IN 2.65V Reference VBAT 7.5K Ω +REF CONVERTER -REF 2.5K Ω Battery On IN GND FIGURE 2. Simplified Diagram of Analog Input A2 A1 A0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 VBAT AUXIN TEMP Y- X+ Y+ Y-POSITION +IN(TEMP 0) +IN XZ1Z2XYPOSITION POSITION POSITION DRIVERS DRIVERS OFF OFF Measure OFF +IN +IN Measure +IN Measure +IN Measure +IN +IN(TEMP 1) ON OFF OFF X-,ON Y+,ON X-,ON Y+,ON ON OFF OFF OFF OFF OFF TABLE I. Input Configuration , Single-Ended Reference Mode (SER/ ,.4 HIGH). A2 0 0 1 1 A1 0 1 0 0 A0 1 1 0 1 +REF -REF Y+ YY+ XY+ XX+ X- Y- X+ +IN +IN Y+ +IN +IN Y-POSITION X-POSITION Z1-POSITION Z2-POSITION DRIVERS ON Measure Y+,YMeasure Y+,XMeasure Y+,XMeasure X+,X- TABLE II. Input Configuration , Differential Reference Mode (SER/ ,.4 LOW). Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 6 www.anpec.com.tw APT7846 Single-Ended reference mode +Vcc Figure 3 shows the diagram of single-ended reference mode. This application shows the measurement of current Y poisition is made by connecting the X+ input to the A/D converter , turning on the Y+ and Y- drivers , and digitizing the voltage on X+. For this measurement , the resistance in the X+ lead does not affect the conversion. However , since the resistance between Y+ and Y- is fairly low , the on-resistance of the Y drivers does make a small difference. Under the situation outlined so far , it would not be possible to achieve a zero volt input or a full-scale input regardless of where the pointing device is on the touch screen because some voltage is lost across the internal switches. This situation can be remedied if use differential reference mode Y+ Y+ X+ -IN Y- Serial Interface Data is written to , and read from , the APT7846 via the serial port. The serial port has 4 pins - serial clock (DCLK) , chip select ( CS) , data in (DIN) and data out (DOUT). The DCLK acts on the rising edge. The CS acts as a reset for the serial port with +5 goes low initiating a conversion cycle. The cycle consists of 2 parts - a write followed by a read. Figure 5 shows the typical timing of the APT7846s serial interface. A total of 24 clock cycles will complete one conversion. Also shown in Figure 5 is the placement and order of the control bits within the control byte. Tables III and IV give detailed information about these bits. The first bit , the ′S′ bit , must always be HIGH and indicates the start of the control byte. The APT7846 will ignore inputs on the DIN pin until the start bit S detected. The next three bits (A2 - A0) select the active input channel or channels of the input multiplexer (see Tables I and II and Figure 2). The MODE bit determines the number of bits for each conversion , either 12 bits (LOW) or 8 bits (HIGH). The SER/,.4 bit controls the reference mode: either single-ended (HIGH) or differential (LOW). (The differential mode is also referred to as the ratiometric conversion mode.) The last two bits (PD1 - PD0) select the power- down mode as shown in Table V. If both inputs are HIGH , the device is always powered up. If both inputs are LOW , the device enters a power-down mode between conversions. +IN +REF Converter -IN -REF GND GND FIGURE 3. Single-Ended Reference Mode (SER/,.4High , A2=Low , A1=Low , A0=High) Differential reference mode As shown in Figure 4 , by setting the SER/,.4 bit LOW , the +REF and -REF inputs are connected directly to Y+ and Y-. This makes the analog-to-digital conversion ratiometric. The result of the conversiong is always a percentage of the external resistance , reardless of how it changes in relation to the on-resistance of the internal switches. Note that there is an important consideration regarding power dissipation when using the ratiometric mode of operation , the external device should powered throughout the acquisition and conversion periods. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 GND Figure 4. Differential Reference Mode (SER/,.4 LOW , A2=Low , A1=Low , A0=High) VREF Y Switch ON -REF YY Switch ON Y+ Y- +REF Converter +Vcc X+ +IN 7 www.anpec.com.tw APT7846 CS 1 DCLK 8 1 8 1 8 tACQ S DIN A2 A1 A0 MODE SER/ DFR 2, 2, (START) ldle Acquire Conversion ldle BUSY 11 10 9 DOUT 8 7 6 5 4 (MSB) 3 2 1 0 (LSB) FIGURE 5. Conversion Timing , 24-Clocks per Conversion , 8-bit Bus Interface. No DCLK Delay Required with Dedicated Serial Port. Bit 7 (MSB) Bit 6 Bit 5 Bit 4 S A2 A1 A0 Bit 3 Bit 2 MODE SER/DFR Bit 1 Bit 0 (LSB) PD1 PD0 TABLE III. Order of the Control Bits in the Control Byte. BIT 7 6-4 3 2 1-0 NAME DESCRIPTION S Start Bit. Control byte starts with first HIGH bit on DIN. A new control byte can start every 15th clock cycle in 12-bit conversion mode or every 11th clock cycle in 8-bit conversion mode. A2-A0 Channel Select Bits. Along with the SER/DFR bit, these bits control the setting of the multiplexer input, switches, and reference inputs, as detailed in Tables I and II. MODE 12-Bit/8-Bit Conversion Select Bit. This bit controls the number of bits for the following conversion: 12bits(LOW) or 8-bits(HIGH). SER/DFR Single-Ended/Differential Reference Select Bit. Along with bits A2-A0, this bit controls the setting of the multiplexer input, switches, and reference inputs, as detailed in Tables I and II. PD1-PD0 Power-Down Mode Select Bits. See Table V for details. PD1 PD0 0 0 PENIRQ DESCRIPTION Enabled Power-down between conversions. When each conversion is finished, the converter enters a low power mode. 0 1 Enabled Reference is OFF. 1 0 Enabled Reference is ON 1 No power-down between conversions, Disabled device is always powered. 1 TABLE V. Power-Down Selection. TABLE IV. Descriptions of the Control Bits within the Control Byte. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 8 www.anpec.com.tw APT7846 Current will be represented by kT/q ∗ ln (N) , where N is the current ratio = 82 , k = Boltzmanns constant (1.38054 ∗ 10e23 electrons volts/degrees Kelvin) , q = the electron charge (1.602189 ∗ 10e19 C) , and T = the temperature in degrees Kelvin. The resultant equation for solving for °K is : TEMPERATURE MEASUREMENT The temperature measurement technique used in the APT7846 relies on the characteristics of a semiconductor junction operation at a fixed current level. The forward bipolar transistor voltage (VBE ) has a well defined characteristic versus temperature. If you got 25°C value of the VBE voltage then measured ambient temperature to monitor the voltage variance. There are two mode to measure temperature. The Temp 0 requires calibration at a known temperature , but only requires a single reading to predict the ambient temperature. The PENIRQ bipolar transistor is used during this measurement , the A/D with an address of A2=0 , A1=0 and A0=0 (see Table I and Figure 6). This voltage is typically 600mV at +25°C , with a 20µA current through it. The TC of temperature Temp 0 is very consistent at 2.1 mV/°C. Catch the bipolar transistor voltage on room temperature , in memory , for calibration purposes by the user. The Temp 1 requires two steps to measure temperature. First step read Temp 0 voltage. Second step read address of A2=1 , A1=1 , and A0=1 , with an 82 times large current. The voltage difference between the Temp 0 and Temp 1 conversion using 82 times the bias. °K = q ∗ ∆V / ( k ∗ In ( N ) ) ∆V = V( Ι82 ) V ( Ι1 ) ( mV ) ∴ °K = 2.30 ∆V ( °K / mV ) °C = 2.30 ∆V ( mV ) 273 °K where , BATTERY MEASUREMENT An added feature of the APT7846 is the ability to monitor the battery voltage , as shown in Figure7. The battery voltage can vary from 0.5V to 6V , while maintaining the voltage to the APT7846 at 2.7V , 3.3V , etc. The input voltage (VBAT ) is divided down by 4 so that a 6.0V battery voltage is represented as 1.5V to the ADC. This simplifies the multiplexer and control logic. In order to minimize the power consumption , the divider is only ON during the samling of DIN to A2=0 , A1=1 , and A0=0. Tables I and II show the relationship between the control bits and configuration of the APT7846. Battery 0.5V to 6.0V MUX (1) DC/DC Converter Vcc A/D Converter VBAT 0.125V to 1.5V 7.5kΩ 2.5kΩ FIGURE 6. Functional Block Diagram of Temperature Measurement Mode..1/URE Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 FIGURE 7. Battery Measurement Functional Block Diagram. 9 www.anpec.com.tw APT7846 Calculating Touch Resistance There are total of four measurements possible : MEASURE DRIVE PIN MEASURED RESULT X-position X+,X- Y+ A Y-position Y+,Y- X+ B Z1-position Y+,X- X+ C Z2-position Y+,X- Y- D FIGURE 8 is Pressure measurement diagram. where the result is a number from 0 to 4096. From simple network theory , RTHOUCH can be represented in many ways , 2 are given below : A RTHOUGH = RX * or RTHOUGH = 4096 RX A * C D * ( 4096 X+ C -1 ) where RX = X plate resistance * ( 4096 - C ) - RY + RY * Y+ B where RY = Y plate resistance 4096 Measure X -Position Touch X-Position X- Y- Measure Z 1-Position X+ Y+ Touch Z1-Position X+ Y+ X- Y- Touch Z2-Position X- Y- Measure Z 2-Position FIGURE 8 is Pressure measurement diagram. Internal Reference The APT7846 has an internal 2.5V voltage reference that can be turned ON and OFF with the power-down address PD1=1(see table V). Typically , the internal reference voltage is only used in the single-ended mode for battery monitoring , temperature measurement , and for utilizing the auxiliary input. Optimal Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 touch-screen performance is achieved when utilizing the differential mode. The internal reference voltage of the APT7846 must be commanded to be off to maintain compatibility with the APT7843. Therefore , after power-up , a write of PD1=0 is required to insure the reference is off. 10 www.anpec.com.tw APT7846 this method could be used with field programmable gate arrays (FPGAs) or application specific integrated circuits (ASICs). (Note that this effectively increases the maximum conversion rate of the converter). +Vcc 100kΩ Y+ PENORQ AC Timing Figure 12 and Table VI provide detailed timing of the APT7846. X+ SYMBOL Y- Y+,Y- Driver ON DESCRIPTION MIN TYP MAX UNIT tACQ Acquisition Time 1.5 µs tDS DIN Valid Prior to DCLK Rising 100 ns 10 tDH DIN Hold After DCLK HIGH tDO DCLK Falling to DOUT Vaild 200 ns ns tDV CS Falling to DOUT Enabled 200 ns 200 ns tTR CS Rising to DOUT Disabled tCSS CS Falling to DCLK Rising 100 ns tCSH CS Rising to DCLK lgnored 0 ns tCH DCLK HIGH 200 ns PENIRQ Output tCL DCLK LOW 200 The pen interrupt output function is detailed in Figure 9. By connecting a pull-up resistor to VCC (typically 100kΩ) , the PENIRQ output is HIGH. While in the power-down mode , with PD0 = PD1 = 0 , the Y driver is ON and connected to GND and the PENIRQ. output is connected to the X+ input. When the panel is touched , the X+ input is pulled to ground through the touch screen and PENIRQ output goes LOW due to the current path through the panel to GND , initiating an interrupt to the processor. During the measurement cycles for X- and Y-Position , the PENIRQ output diode will be internally connected to GND and the X+ input disconnected from the PENIRQ diode to eliminate any leakage current from the pull-up resistor to flow through the touch screen , thus causing no errors. tBD DCLK Falling to BUSY Rising 200 ns tBDV CS Falling to BUSY Enabled 200 ns tBTR CS Rising to BUSY Disable 200 ns FIGURE 9. PERIRQ Functional Block Diagram ns TABLE VI. Timing Specifications (+Vcc=+2.7V and Above , TA=-40°C to +85°C , CLOAD=50pF). 16-Clocks or 15-Clocks per Conversion The APT7846 will alow a conversion every 16 clock cycles , as shown in Figure 10. This figure shows possible serial communication occurring with other serial peripherals between each byte transfer between the processor and the converter. Figure 11 provides the fastest way to clock the APT7846. This method will not work with the serial interface of most microcontrollers and digital signal processors as they are generally not capable of providing 15 clock cycles per serial transfer. However , Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 11 www.anpec.com.tw APT7846 CS DCLK 1 8 1 8 S DIN 1 8 1 S CONTROL BITS CONTROL BITS BUSY 11 10 9 8 7 6 5 DOUT 11 10 9 4 3 2 1 0 FIGURE 10. Conversion Timing , 16-Clocks per Conversion , 8-bit Bus Interface. No DCLK Delay Required with Dedicated Serial Port. CS DCLK 1 DIN S 15 1 ) S 2, 2, ) ) MODE SGL/ DIF 15 1 ) 2, 2, ) ) MODE SGL/ DIF S ) ) ) BUSY DOUT 11 10 9 8 7 6 5 4 3 2 1 0 11 10 9 8 7 6 5 4 3 2 FIGURE 11. Maximum Conversion Rate , 15-Clocks per Conversion. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 12 www.anpec.com.tw APT7846 CS tCSS tCL tCH tBD tBD tBD tCSH DCLK tDS tDH DIN BUSY DOUT 2, tBDV tBTR tTR tDV 11 10 FIGURE 12. Detailed Timing Diagram. Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 13 www.anpec.com.tw APT7846 Packaging Information SSOP D N H GAUGE PLANE E 1 2 3 A Millimeters 1 A1 B e L Variations- D Inches Variations- D Dim Min. Max. Variations Min. Max. Dim Min. Max. Variations Min. Max. A 1.350 1.75 SSOP-16 4.75 5.05 A 0.053 0.069 0.187 0.199 A1 0.10 0.25 A1 0.004 0.010 B 0.20 0.30 B 0.008 0.012 D See variations D See variations E 3.75 E 0.147 e 4.05 0.625 TYP. e 0.160 0.025 TYP. H 5.75 6.25 H 0.226 0.246 L 0.4 1.27 L 0.016 0.050 See variations N See variations N φ1 0° 8° Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 φ1 14 SSOP-16 0° 8° www.anpec.com.tw APT7846 Packaging Information TSSOP e N 2x E/2 E1 1 2 3 E 0.25 A2 A A1 b A A1 A2 b D e E E1 L φ1 φ2 φ3 Min. GAUGE PLANE e/2 D Dim ( 2) Millimeters Max. 1.2 0.00 0.15 0.80 1.05 0.19 0.30 5.1 (N=16PIN) 4.9 (N=16PIN) 6.6 (N=20PIN) 6.4 (N=20PIN) 7.9 (N=24PIN) 7.7 (N=24PIN) 9.8 (N=28PIN) 9.6 (N=28PIN) 0.65 BSC 6.40 BSC 4.30 4.50 0.45 0.75 0° 8° 12° REF 12° REF Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 15 L 1 ( 3) Min. Inches Max. 0.047 0.000 0.006 0.031 0.041 0.007 0.011 0.201 (N=16PIN) 0.193 (N=16PIN) 0.260 (N=20PIN) 0.252 (N=20PIN) 0.311 (N=24PIN) 0.303 (N=24PIN) 0.386 (N=28PIN) 0.378 (N=28PIN) 0.026 BSC 0.252 BSC 0.169 0.177 0.018 0.030 0° 8° 12° REF 12° REF www.anpec.com.tw