Genesys Logic, Inc. GL817E USB 2.0 MS/ MS PRO/ SD/ MMC Controller Datasheet Revision 1.38 Apr. 19, 2006 GL817E USB2.0 MS/MS PRO/SD/MMC Controller Copyright: Copyright © 2006 Genesys Logic Incorporated. All rights reserved. No part of the materials may be reproduced in any form or by any means without prior written consent of Genesys Logic Inc.. Disclaimer: ALL MATERIALS ARE PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NO LICENSE OR RIGHT IS GRANTED UNDER ANY PATENT OR TRADEMARK OF GENESYS LOGIC INC.. GENESYS LOGIC HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS IN REGARD TO MATERIALS, INCLUDING ALL WARRANTIES, IMPLIED OR EXPRESS, OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF INTELLECTUAL PROPERTY. IN NO EVENT SHALL GENESYS LOGIC BE LIABLE FOR ANY DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES RESULTING FROM LOSS OF INFORMATION OR PROFITS. PLEASE BE ADVISED THAT THE MATERIALS MAY CONTAIN ERRORS OR OMMISIONS. GENESYS LOGIC MAY MAKE CHANGES TO THE MATERIALS OR TO THE PRODUCTS DESCRIBED THEREIN AT ANY TIME WITHOUT NOTICE. Trademarks: is a registered trademark of Genesys Logic, Inc. All trademarks are the properties of their respective owners. Office: Genesys Logic, Inc. 12F, No. 205, Sec. 3, Beishin Rd., Shindian City, Taipei, Taiwan Tel: (886-2) 8913-1888 Fax: (886-2) 6629-6168 http://www.genesyslogic.com ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 2 GL817E USB2.0 MS/MS PRO/SD/MMC Controller Revision History Revision Date Description 1.00 09/25/2003 First formal release. 1.10 01/19/2004 1. Added LQFP-48 pin diagram, list and description. 2. Removed LQFP-64 pin diagram, list and description. 3. Added Chapter 8 Ordering Information. 1.11 04/14/2004 Updated package dimension. 1.20 04/21/2004 Removed NAND Flash interface 1.30 07/02/2004 1.31 01/18/2005 1.32 01/21/2005 1. Added media memory card type in Chapter 1 And 2 2. Updated Table 6.1 - Absolute Maximum Ratings value 3. Updated Table 6.2 - DC Characteristics value 4. Added Chapter 6.3.5 Reset Timing 5. Updated IC Marking in package dimension diagram 1. Added USB2.0 certified Test ID in Chapter 2 Features 2. Changed Table 6.1 - Absolute Maximum Ratings 3. Added Table 6.2 - Operating Conditions Added Chapter 6.4.6 93C46 Timing 1.33 02/01/2005 Changed power pin description in Table 3.2 1.34 03/06/2005 Changed pin# 13,14 pin description 1.35 04/06/2005 Update Datasheet to meet GL817E-09 with different pin out 1.36 06/21/2005 Add pin#11 pin description Modify pin#24 description to Power LED 1.38 04/19/2006 Add Reset timing chart ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 3 GL817E USB2.0 MS/MS PRO/SD/MMC Controller TABLE OF CONTENTS CHAPTER 1 GENERAL DESCRIPTION................................................. 6 CHAPTER 2 FEATURES ........................................................................... 7 CHAPTER 3 PIN ASSIGNMENT .............................................................. 8 3.1 PINOUTS .................................................................................................. 8 3.2 PIN LIST .................................................................................................. 9 3.3 PIN DESCRIPTIONS .................................................................................. 9 CHAPTER 4 BLOCK DIAGRAM............................................................ 12 CHAPTER 5 FUNCTION DESCRIPTION ............................................. 13 5.1 UTM ..................................................................................................... 13 5.2 SIE ........................................................................................................ 13 5.3 EP0 FIFO ............................................................................................. 13 5.4 BULK FIFO ........................................................................................... 13 5.4.1 TXFIFO ........................................................................................ 13 5.4.2 RXFIFO ........................................................................................ 13 5.5 MHE (MEDIA INTERFACE) ................................................................... 13 5.6 USB REGISTERS / FIFO CONTROL ....................................................... 13 CHAPTER 6 ELECTRICAL CHARACTERISTICS.............................. 14 6.1 ABSOLUTE MAXIMUM RATINGS ............................................................ 14 6.2 OPERATING CONDITIONS ...................................................................... 14 6.3 DC CHARACTERISTICS.......................................................................... 14 6.4 AC CHARACTERISTICS.......................................................................... 15 6.4.1 UTMI Transceiver........................................................................ 15 6.4.2 Secure Digital / MultiMediaCard ................................................ 15 6.4. 3 Memory Stick .............................................................................. 15 6.4. 4 Memory Stick Pro ....................................................................... 15 6.4.5 Reset Timing ................................................................................. 16 6.4.6 93C46 Timing ............................................................................... 16 CHAPTER 7 PACKAGE DIMENSION...................................................... 18 CHAPTER 8 ORDERING INFORMATION........................................... 19 ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 4 GL817E USB2.0 MS/MS PRO/SD/MMC Controller LIST OF FIGURES FIGURE 3.1 - 48 PIN LQFP PINOUT DIAGRAM .................................................................8 FIGURE 4.1 - BLOCK DIAGRAM ......................................................................................12 FIGURE 6.2 - TIMING DIAGRAM OF SD / MMC INTERFACE ...........................................15 FIGURE 6.3 - TIMING DIAGRAM OF MEMORYSTICK ......................................................15 FIGURE 6.4 - TIMING DIAGRAM OF MEMORYSTICK PRO ...............................................15 FIGURE 6.5 - TIMING DIAGRAM OF RESET WIDTH .........................................................16 FIGURE 6.6 - TIMING DIAGRAM OF 93C46 .....................................................................17 FIGURE 7.1 - GL817E 48 PIN LQFP PACKAGE ..............................................................18 LIST OF TABLES TABLE 3.1 - 48 PIN LIST ...................................................................................................9 TABLE 3.2 - 48 PIN DESCRIPTIONS ...................................................................................9 TABLE 6.1 - ABSOLUTE MAXIMUM RATINGS .................................................................14 TABLE 6.2 - OPERATING CONDITIONS ............................................................................14 TABLE 6.3 - DC CHARACTERISTICS ...............................................................................14 TABLE 8.1 - ORDERING INFORMATION...........................................................................19 ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 5 GL817E USB2.0 MS/MS PRO/SD/MMC Controller CHAPTER 1 GENERAL DESCRIPTION The GL817E is a highly compatible, best performance USB 2.0 Flash Card Reader Controller. It supports TM TM USB 2.0 high-speed transmission to Secure Digital (SD), Mini SDTM, MultiMediaCard (MMC), RS TM TM TM MultiMediaCard (RS MMC), Memory Stick (MS), Memory Stick Duo (MS Duo), High Speed TM Memory StickTM (HS MS), Memory Stick Pro (MS Pro), Memory Stick ProTM Duo (MS Pro Duo) Memory Stick ROM interface on one chip. The GL817E integrates Genesys Logic own design USB 2.0 high-speed UTMI (USB 2.0 Transceiver Macrocell Interface) transceiver, the Serial Interface Engine (SIE), and compatible 8-bit micro-controller. By complies with Universal Serial Bus specification rev. 2.0 and USB Storage Class specification ver.1.0, the GL817E can be supported by Windows XP/ 2000/ Me default driver. Also it is supported in Windows 98/ 98SE, Mac, and Linux operating system. For the power consumption consideration, the GL817E complies with USB power specification for bus-powered devices. The GL817E is available in 48-pin LQFP (Internal Mask ROM code), and it is the best cost / performance solution for your USB 2.0 high-speed Flash Card Reader application. ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 6 GL817E USB2.0 MS/MS PRO/SD/MMC Controller CHAPTER 2 • • • • • • • • • • FEATURES TM Supports USB 2.0 to Memory Stick (MS) and Memory Stick PRO TM and MultiMediaCard (MMC) interface on one chip. TM (MS PRO), Secure Digital TM (SD) Supports all combinations of MS/ MS PRO/ SD/ MMC application design. Complies with 480Mbps Universal Serial Bus specification rev. 2.0.vc Complies with USB Storage Class specification rev. 1.0. (Bulk only protocol). USB 2.0 certified (Test ID=40390390) Operating System supported: Windows XP/ 2000/ Me/ 98/ 98SE, Mac OS 9.x/ X, Linux. Supports customized storage device icon under Windows 98/ 98SE/ 2000 (SP2, SP3 and SP4) by Genesys Logic own driver. Integrated USB 2.0 Transceiver Macrocell Interface (UTMI) transceiver and Serial Interface Engine (SIE). Integrated MCU compatible 8-bit micro-controller. Hardware ECC generation and verification. l Memory StickTM (MS) / Memory Stick DuoTM (MS Duo) / High Speed Memory StickTM (HS MS) / TM Memory Stick Pro (MS Pro) / Memory Stick ProTM Duo (MS Pro Duo) Memory Stick ROM interface - Complies with Memory Stick Standard Memory Stick PRO Format Specifications ver 1.00-01 - Complies with Memory Stick Format Specifications ver 1.40-00 - Hardware support 4-bit HS Memory Stick PRO interface - Supports INS signal - Supports automatic CRC16 generation and verification - Supports different clock rate up to 40 MHz l Secure DigitalTM , Mini SDTM and MultiMediaCardTM - Complies with Secure DigitalTM / MultiMediaCardTM interface specification - Supports both SD / MMC mode access CLK/CMD/DAT0/DAT1/DAT2/DAT3 - Command transmit and response receive can be enabled separately - Automatic CRC7 generation for command and CRC7 verification for response on CMD - Support automatic CRC16 generation and verification on DAT3-0 • • • • • • • - In addition to full packet transaction, optional single byte / bit operation on both CMD and DAT line / lines - Data processing in block or byte Supports different clock rate from 375 KHz to 24 MHz High efficient hardware engine - Automatic data read / write with card by hardware engine. - Easier firmware development. - Media interface signals output low automatically when suspend. - Supports automatic CRC16 generation and verification. Supports firmware correct page ECC error capability. Supports automatic page copy (source page read + destination page write). Complies with USB power specification for bus-powered devices. Supports Suspend and Wake-up Resume. 3.3 Volt operation. Available in 48-pin LQFP package. ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 7 GL817E USB2.0 MS/MS PRO/SD/MMC Controller CHAPTER 3 PIN ASSIGNMENT MS_D1 DGND2 MS_D0 MS_D2 DVDD2 MS_D3 EXTRSTZ 93C46_DI 93C46_DO SD_D0 GPIO2 SD_D1 36 35 34 33 32 31 30 29 28 27 26 25 3.1 Pinouts MS_INS 37 24 MVMCSZ MS_BS 38 23 SD_WPZ SDPCTL/GPIO9 39 22 SD_CDZ MSPCTL/GPIO10 40 21 DGND1 SD_CLK 41 20 DVCC1 SD_CMD 42 19 MS_CLK SD_D3 43 18 GPIO3 SD_D2 44 17 UDVSS1 DVCC3 45 16 UDVCC1 DGND3 46 15 UGND2 93C46_SK 47 14 XO 93C46_CS 48 13 XI GL817E 1 2 3 4 5 6 7 8 9 10 11 12 DGND0 UDVCC1/NC UDGND0 RPU/NC AVDD1 VPF/NC VPH VMF/NC VMH AGND1 RREF AVDD2 LQFP - 48 Figure 3.1 - 48 Pin LQFP Pinout Diagram ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 8 GL817E USB2.0 MS/MS PRO/SD/MMC Controller 3.2 Pin List Table 3.1 - 48 Pin List Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type 1 DGND0 P 13 XI I 25 SD_D1 B/SO 37 MS_INS B/I 2 UDVCC1/ NC P 14 XO O 26 GPIO2 B/O 38 MS_BS O 3 UDGND0 P 15 UGND2 P 27 SD_D0 B/SO 39 A 16 UDVCC1 P 28 93C46_DO P 17 UDVSS1 P 29 93C46_DI 5 RPU/ NC AVDD1 6 VPF/ NC A 18 GPIO3 7 VPH A 19 MS_CLK O 31 MS_D3 8 VMF/ NC A 20 DVCC1 P 32 DVDD2 9 VMH A 21 DGND1 P 10 AGND1 P 22 SD_CDZ 11 RREF A 12 AVDD2 P 4 B/O 30 EXTRSTZ SDPCTL/ GPIO9 MSPCTL/ B/I 40 GPIO10 B/O 41 SD_CLK I 42 SD_CMD B/O B/O O B/SO B/SO 43 SD_D3 B 44 SD_D2 B 33 MS_D2 B/SO 45 DVCC3 P B/I 34 MS_D0 B/SO 46 DGND3 P 23 SD_WPZ B/I 35 DGND2 24 NVMCSZ O 36 MS_D1 P 47 93C46_SK B/O B/SO 48 93C46_CS B/O P 3.3 Pin Descriptions Table 3.2 - 48 Pin Descriptions Pin Name DGND0~3 Pin# Type 1,21,35,46 P Description Digital GND #0~3 GL817E-07: UDVCC1 2 P UTMI Digital VDD #1. GL817E-08/GL817E-09: NC: No connection. UDVCC1 16 P UTMI Digital VDD #1 UGND0 3 P UTMI GND #0 GL817E-07: RPU/ 4 A NC USB resistor pulls up when GL817E-07 mounted. GL817E-08 ~ High: NC: No connection. AVDD1 VPF 5,12 P 6 A Analog VDD #1 GL817E-07: FS D+ ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 9 GL817E USB2.0 MS/MS PRO/SD/MMC Controller GL817E-08/GL817E-09: NC: No connection. VPH 7 A HS D+ GL817E-07: VMF 8 FS DA GL817E-08/GL817E-09: NC: No connection. VMH 9 A HS D- AGND1 10 P Analog GND #1 RREF 11 A XI 13 I XO 14 O Reference resistor 12MHz Crystal This pin can be connected to one terminal of the crystal or can be connected to an external 12MHz clock when a crystal is not used. 12MHz Crystal This is the other terminal of the crystal, or left open when an external clock source is used to drive XTAL/CLK. It may not be used to drive any external circuitry other than the crystal circuit. UGND2 15 P UDVSS1 17 GPIO2~3,9,10 26,18,39,40 UTMI GND P UTMI Digital GND B/O GPIO2~3,9,10 (odpu) MS_CLK 19 O DVCC1,3 20,45 SD_CDZ 22 SD_WPZ 23 NVMCSZ 24 SD_D0~3 27,25,44,43 P B/I (pu) B/I (pu) O (pu) B/SO (pu) 93C46_DO 28 B/I 93C46 Data out 93C46_DI 29 B/O 93C46 Data in EXTRSTZ 30 I (pu) External reset MS_D0~3 34,36,33,31 B/SO (pu) P Memory Stick SCLK Digital VDD #1,3 SD CD# SD Write Protect Detect Power LED SD DAT0~3 Internal pull-up : 65K ohm (+/- 50% ) MS DAT3~0 DVDD2 32 Digital VDD #2 MS_INS 37 MS_BS 38 B/I (pu) O SD_PCTL 39 B/O SD power control MS_PCTL 40 B/O MS power control Memory Stick INS Memory Stick BS ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 10 GL817E USB2.0 MS/MS PRO/SD/MMC Controller SD_CLK 41 O SD/MMC CLK SD_CMD 42 B/SO (pu) SD/MMC CMD 93C46_SK 47 B/O 93C46 Clock 93C46_CS 48 B/O 93C46 CS Notation: Type O I B B/I B/O P A SO pu pd odpu Output Input Bi-directional Bi-directional, default input Bi-directional, default output Power / Ground Analog Automatic output low when suspend Internal pull up Internal pull down Open drain with internal pull up ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 11 GL817E USB2.0 MS/MS PRO/SD/MMC Controller CHAPTER 4 BLOCK DIAGRAM TXFIFO DATA A UTM DATA B SIE RXFIFO DATA A EP0FIFO RXFIFO TXFIFO DATA B MHE USB Register + FIFO Control SD/ MMC MS/ MS PRO SRAM MCU ROM Figure 4.1 - Block Diagram ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 12 GL817E USB2.0 MS/MS PRO/SD/MMC Controller CHAPTER 5 FUNCTION DESCRIPTION 5.1 UTM The USB 2.0 Transceiver Macrocell, it’s the analog circuitry that handles the low level USB protocol and signaling, and shifts the clock domain of the data from the USB 2.0 rate to one that is compatible with the general logic. 5.2 SIE The Serial Interface Engine, which contains the USB PID and address recognition logic, and other sequencing and state machine logic to handle USB packets and transactions. 5.3 EP0 FIFO Endpoint 0 FIFO: The Control FIFO. It is composed of TX0FIFO and RX0FIFO, with 64-byte FIFO each, and it is used for endpoint 0 data transfer. 5.4 Bulk FIFO It is composed of TXFIFO and RXFIFO for data transmission and receiving respectively, also with different modes support: 5.4.1 TXFIFO - - To ensure the continuous data transmission, TXFIFO includes 512 bytes DATA-A FIFO, 512 bytes DATA-B FIFO, and two 16 bytes corresponding redundant areas. All can be directly accessed by MCU. Normally SIE popes data, SME pushes data for DATA A/B FIFOs, and redundant area is pushed by SME and popped by MCU. Supports MCU single byte access for SmartMedia ECC error correction. Supports transmit mode SIE won’t transmit data filled in TXFIFO before MCU complete the data integrity checking. 5.4.2 RXFIFO - To ensure the continuous data transmission, RXFIFO includes 512 bytes DATA-A FIFO, 512 bytes DATA-B FIFO, and 16 bytes single redundant area. All can be directly accessed by MCU. Normally SME popes data, SIE pushes data for DATA A/B FIFOs, and redundant area is pushed by MCU and popped by SME. 5.5 MHE (Media Interface) - SD/MMC Engine. MS/MS PRO Engine. 5.6 USB Registers / FIFO Control It is a register space to store status information and to control the functions of GL817E by MCU. ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 13 GL817E USB2.0 MS/MS PRO/SD/MMC Controller CHAPTER 6 ELECTRICAL CHARACTERISTICS 6.1 Absolute Maximum Ratings Table 6.1 - Absolute Maximum Ratings Parameter Value Storage Temperature -65°C to +150 °C Ambient Temperature -40°C to +80 °C Supply Voltage to Ground Potential -0.5V to +4.0V DC Input Voltage to Any Pin -0.5V to +5.8V 6.2 Operating Conditions Table 6.2 - Operating Conditions Parameter Value Ta (Ambient Temperature Under Bias) 0°C to 70°C Supply Voltage +3.0V to +3.6V Ground Voltage 0V FOSC (Oscillator or Crystal Frequency) 12 MHz ± 0.25% 6.3 DC Characteristics Table 6.3 - DC Characteristics Symbol Parameter Condition Min. Typ. Max. Unit VCC Supply Voltage 3.0 3.3 3.6 V VIH Input High Voltage 2.6 - 5 V VIL Input Low Voltage 0.0 - 0.7 V -10 - 10 µA 0 < VIN < VCC II Input Leakage current VOH Output High Voltage 3.0 - - V VOL Output Low Voltage - - 0.2 V IOH Output Current High - 8.3 - mA IOL Output Current Low - 7.8 - mA CIN Input Pin Capacitance - - 2.0 pF ISUSP Suspend current - - 280 µA ICC Supply current - - 85 mA 1.5K external pull-up included Connect to USB with MCU operating ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 14 GL817E USB2.0 MS/MS PRO/SD/MMC Controller 6.4 AC Characteristics 6.4.1 UTMI Transceiver The GL817E is fully compatible with Universal Serial Bus specification rev. 2.0 and USB 2.0 Transceiver Macercell Interface (UTMI) specification rev. 1.01. Please refer to the specifications for more information. 6.4.2 Secure Digital / MultiMediaCard CMD CLK DAT dddxdxdxdddddddddddddddddxdddd rfrfrfrfrfrfrfrfrfrfrfrfrfrfrf dddddddddddddxdddddddddddxdddd Figure 6.2 - Timing Diagram of SD / MMC Interface Parameter Fck Description CLK frequency Mode Typ Unit 0 1 2 3 375K 6M 15M 24M Hz Remark 6.4. 3 Memory Stick llrhhhhhhhhhhhhhhhfllllllllll lllrfrfrfrfrfrfrfrfrfrfrfrfrf ddddxdddddddddddddddxdddddddd BS SCLK SDIO Figure 6.3 - Timing Diagram of MemoryStick Parameter Fck Description SCLK frequency Mode Typ 0 1.5M 1 6M 2 15M 3 24M Unit Remark Hz 6.4. 4 Memory Stick Pro llrhhhhhhhhhhhhhhhfllllllllll lllrfrfrfrfrfrfrfrfrfrfrfrfrf dddxdxdxdxdxdxdxdxdxdxdxdxdxd BS SCLK DATA Figure 6.4 - Timing Diagram of MemoryStick Pro Parameter Fck Description SCLK frequency ©2000-2006 Genesys Logic Inc. - All rights reserved. Mode Typ 0 30M 1 40M Unit Remark Hz Page 15 GL817E USB2.0 MS/MS PRO/SD/MMC Controller 6.4.5 Reset Timing Trst Extrstz Figure 6.5 - Timing Diagram of Reset width Figure 6.6- Timing Diagram of Power Good to USB command receive ready Parameter Description Trst Chip reset sense timing width T1 External reset valid from power up to high T2 Reset Deassertion to respond USB command ready Min Typ Max Unit 2 - - us 1.03 - - ms 72 - - ms 6.4.6 93C46 Timing Tcss CS SK DI DO READ DO Tcsh Tcs \\;\\@’\\\\\\\\\\\\\\\\\;\@;\\@’ llrhhhhhhhhhhhhhhhhhhhhhhhhflllr Tskh Tskl \\\\\\;\\\\@;\\\\@’\\\\\\\\\\\\\ llllllahhhhhblllllahhhhhflllllll Tdis Tdih \\\;z@;z@’\\\\\\\\\\\\\\\\\\\\\\ dddxdddddxdddddxdddddxdddddddddd Tpd0 Tpd1 \\\\\\;@’\\\\\\\\\;@’\\\\\\\\\\\ hhhhhhhhflllllllllllrhhhhhh^zzzz Tdf Tsv \\;\\@’\\\\\\\\\\\\\\\\\\\\;@’\\ STATUS VALID zzzzzznddddddddddddddddddddddozz PROGRAM ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 16 GL817E USB2.0 MS/MS PRO/SD/MMC Controller Figure 6.6 - Timing Diagram of 93C46 Parameter Description Min Typ Max Tskh SK High Time 250 - - Tskl SK Low Time 250 - - Tcs Minimum CS Low Time 250 - - Tcss CS Setup Time 50 - - Tdis DI Setup Time 100 - - Tcsh CS Hold Time 0 - - Tdih DI Hold Time 100 - - Tpd1 Output Delay to “1” - - 250 Tpd0 Output Delay to “0” - - 250 Tsv CS to Status Valid - - 250 Tdf CS to DO in High Impedance - - 100 ©2000-2006 Genesys Logic Inc. - All rights reserved. Unit ns Page 17 GL817E USB2.0 MS/MS PRO/SD/MMC Controller CHAPTER 7 PACKAGE DIMENSION D D1 A D2 A2 25 36 37 Green Package GL817E AAAAAAAGAA YWWXXXXXXXX Date Code B Code No. Lot Code 48 13 12 4X 1 e 0-1 4X b aaa C A B D bbb H A B D C ccc C R1 R2 H GAGE PLANE 0.25mm S L 0-3 NOTES : 1. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 mm PER SIDE. D1 AND E1 ARE MAXIMUM PLASTIC BODY SIZE DIMENSIONS INCLUDING MOLD MISMATCH. 2. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED THE MAXIMUM b DIMENSION BY MORE THAN 0.08mm. DAMBAR CAN NOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSION AND AN ADJACENT LEAD IS 0.07mm. c ddd M C A B s D s 0- 0-2 L1 E2 E E1 24 Internal No. A A1 0.05 S D SEATING PLANE CONTROL DIMENSIONS ARE IN MILLIMETERS. MILLIMETER INCH SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. A 1.60 0.063 A1 0.05 0.15 0.002 0.006 1.35 A2 1.40 1.45 0.053 0.055 0.057 D 9.00 BASIC 0.354 BASIC E 9.00 BASIC 0.354 BASIC D1 7.00 BASIC 0.276 BASIC E1 7.00 BASIC 0.276 BASIC D2 5.50 BASIC 0.217 BASIC E2 5.50 BASIC 0.217 BASIC R1 0.08 0.003 R2 0.08 0.20 0.003 0.008 00° 3.5° 7° 0° 3.5° 7° 0- 1 0° 0° 0- 2 11° 12° 13° 11° 12° 13° 0- 3 11° 12° 13° 11° 12° 13° c 0.09 0.20 0.004 0.008 L 0.45 0.60 0.75 0.018 0.024 0.030 L1 1.00 REF 0.039 REF S 0.20 0.008 b 0.17 0.20 0.27 0.007 0.008 0.011 e 0.50 BASIC 0.020 BASIC TOLERANCES OF FORM AND POSITION aaa 0.20 0.008 bbb 0.20 0.008 ccc 0.08 0.003 ddd 0.08 0.003 Figure 7.1 - GL817E 48 Pin LQFP Package ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 18 GL817E USB2.0 MS/MS PRO/SD/MMC Controller CHAPTER 8 ORDERING INFORMATION Table 8.1 - Ordering Information Part Number Package GL817E 48-pin LQFP ©2000-2006 Genesys Logic Inc. - All rights reserved. Status Page 19