8031AH/8051AH 8032AH/8052AH MCSÉ 51 NMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS Automotive Y High Performance HMOS Process Y Bit-Addressable RAM Y Internal Timers/Event Counters Y Y 2-Level Interrupt Priority Structure Programmable Full Duplex Serial Channel 32 I/O Lines (Four 8-Bit Ports) Y Y 111 Instructions (64 Single-Cycle) 64K Program Memory Space Y 64K Data Memory Space Y Security Feature Protects EPROM Parts Against Software Piracy Y Available in PLCC and DIP Packages Y Boolean Processor Y The MCSÉ 51 microcontroller products are optimized for control applications. Byte-processing and numerical operations on small data structures are facilitated by a variety of fast addressing modes for accessing the internal RAM. The instruction set provides a convenient menu of 8-bit arithmetic instructions, including multiply and divide instructions. Extensive on-chip support is provided for one-bit variables as a separate data type, allowing direct bit manipulation and testing in control and logic systems that require Boolean processing. Device 8052AH 8051AH 8032AH 8031AH Internal Memory Program Data 8K x 8 ROM 4K x 8 ROM none none 256 x 8 RAM 128 x 8 RAM 256 x 8 RAM 128 x 8 RAM Timers/ Event Counters Interrupts 3 x 16-Bit 2 x 16-Bit 3 x 16-Bit 2 x 16-Bit 6 5 6 5 NOTICE: This datasheet contains information on products in full production. Specifications within this datasheet are subject to change without notice. Verify with your local Intel sales office that you have the latest datasheet before finalizing a design. *Other brands and names are the property of their respective owners. Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel retains the right to make changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata. COPYRIGHT © INTEL CORPORATION, 1995 February 1995 Order Number: 270499-006 AUTOMOTIVE MICROCONTROLLER MCSÉ 51 PRODUCT OPTIONS Intel’s extended and automotive temperature range products are designed to meet the needs of those applications whose operating requirements exceed commercial standards. With the commercial standard temperature range, operational characteristics are guaranteed over the temperature range of 0§ C to a 70§ C ambient. With the extended temperature range option, operational characteristics are guaranteed over the temperature range of b 40§ C to a 85§ C ambient. For the automotive temperature range option, operational characteristics are guaranteed over the temperature range of b 40§ C to a 110§ C ambient. The automotive, extended, and commercial temperature versions of the MCS 51 microcontroller product families are available with or without burn-in options. 270499 – 1 *Example: P, 80A51AH indicates an automotive temperature range version of the 8051AH in a PDIP package with 4 Kbyte ROM program memory. Figure 1. MCSÉ 51 Microcontroller Product Family Nomenclature Table 1. Temperature Options Temperature Designation Operating Temperature § C Ambient Burn-In Option Extended T L b 40 to a 85 b 40 to a 85 Standard Extended Automotive A b 40 to a 110 Standard Temperature Classification 2 AUTOMOTIVE MICROCONTROLLER MCSÉ 51 270499 – 2 *Resident in 8052/8032 only. Figure 2. MCSÉ 51 Microcontroller Block Diagram PIN DESCRIPTIONS VCC Supply voltage. VSS Circuit ground. Port 0 Port 0 pins that have 1s written to them float, and in that state can be used as high-impedance inputs. Port 0 is also the multiplexed low-order address and data bus during accesses to external Program and Data Memory. In this application it uses strong internal pullups when emitting 1s and can source and sink 8 LS TTL inputs. Port 0 also outputs the code bytes during program verification of the ROM. External pullups are required. Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink 8 LS TTL inputs. 3 AUTOMOTIVE MICROCONTROLLER MCSÉ 51 Diagrams are for pin reference only. Package sizes are not to scale. 270499 – 3 *EPROM only Pin (DIP) Figure 3. MCSÉ 51 Microcontroller Connections Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source 4 LS TTL inputs. Port 1 pins that have 1s written to them are pulled high by the internal pullups, and in that state can be used as inputs. As inputs, Port 1 pins that are externally pulled low will source current (IIL on the datasheet) because of the internal pullups. Port 1 also receives the low-order address bytes during program verification of the ROM. In the 8032AH and 8052AH, Port 1 pins P1.0 and P1.1 also serve the T2 and T2EX functions, respectively. Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source 4 LS TTL inputs. Port 2 pins that have 1s written to them are pulled high by the internal pullups, and in that state can be used as inputs. As inputs, Port 2 pins that are externally pulled low will source current (IIL on the datasheet) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external Program Memory and during accesses to external Data Memory that use 16-bit addresses (MOVX @ DPTR). In this application it 4 uses strong internal pullups when emitting 1s. During accesses to external Data Memory that use 8-bit addresses (MOVX @ Ri), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits during program verification of the ROM. Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source 4 LS TTL inputs. Port 3 pins that have 1s written to them are pulled high by the internal pullups, and in that state can be used as inputs. As inputs, Port 3 pins that are externally pulled low will source current (IIL on the datasheet) because of the pullups. Port 3 also serves the functions of various special features of the MCS 51 microcontroller family, as listed below: Port Pin P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 Alternative Function RXD (serial input port) TXD (serial output port) INT0 (external interrupt 0) INT1 (external interrupt 1) T0 (Timer 0 external input) T1 (Timer 1 external input) WR (external data memory write strobe) RD (external data memory read strobe) AUTOMOTIVE MICROCONTROLLER MCSÉ 51 RESET XTAL1 Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. Input to the inverting oscillator amplifier. ALE/PROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. In normal operation ALE is emitted at a constant rate of (/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. PSEN Program Store Enable is the read strobe to external Program Memory. When the device is executing code from external Program Memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external Data Memory. XTAL2 Output from the inverting oscillator amplifier. OSCILLATOR CHARACTERISTICS XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 4. Either a quartz crystal or ceramic resonator may be used. More detailed information concerning the use of the on-chip oscillator is available in Application Note AP-155, ‘‘Oscillators for Microcontrollers.’’ To drive the device from an external clock source, XTAL1 should be grounded, while XTAL2 is driven, as shown in Figure 5. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum high and low times specified on the datasheet must be observed. EA/VPP External Access enable EA must be strapped to VSS in order to enable any MCS 51 microcontroller device to fetch code from external Program memory locations 0 to 0FFFH (0 to 1FFFH, in the 8032AH and 8052AH). 270499 – 6 Figure 5. External Drive Configuration 270499 – 5 C1, C2 e 30 pF g 10 pF for Crystals For Ceramic Resonators, contact resonator manufacturer. Figure 4. Oscillator Connections 5 AUTOMOTIVE MICROCONTROLLER MCSÉ 51 ABSOLUTE MAXIMUM RATINGS* Ambient Temperature Under Bias ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ b 40§ C to a 110§ C Storage Temperature ÀÀÀÀÀÀÀÀÀÀ b 65§ C to a 150§ C Voltage on EA/VPP Pin to VSS ÀÀÀ b 0.5V to a 21.5V Voltage on Any Other Pin to VSS ÀÀÀÀ b 0.5V to a 7V NOTICE: This is a production data sheet. The specifications are subject to change without notice. *WARNING: Stressing the device beyond the ‘‘Absolute Maximum Ratings’’ may cause permanent damage. These are stress ratings only. Operation beyond the ‘‘Operating Conditions’’ is not recommended and extended exposure beyond the ‘‘Operating Conditions’’ may affect device reliability. Power DissipationÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ1.5W Based on package heat transfer limitations not device power consumption. Maximum Case Temperature Under Bias ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ a 125§ C Typical Thermal Resistance Junction to Ambient (iJA) iJA 75§ C/W Package Plastic DIP DC CHARACTERISTICS Symbol TA e b 40§ C to a 110§ C; VCC e 5V g 10%; VSS e 0V Parameter Min Max Units b 0.5 0.7 V Test Conditions Input High Voltage (Except XTAL2, RST) 2.1 VCC a 0.5 V Input High Voltage to XTAL2, RST 2.6 VCC a 0.5 V XTAL1 e VSS Output Low Voltage (Ports 1, 2, 3)* 0.45 V IOL e 1.6 mA Output Low Voltage (Port 0, ALE, PSEN)* 0.45 V IOL e 3.2 mA VIL Input Low Voltage VIH VIH1 VOL VOL1 VOH Output High Voltage (Ports 1, 2, 3, ALE, PSEN) 2.4 V IOH e b 80 mA VOH1 Output High Voltage (Port 0 in External Bus Mode) 2.4 V IOH e b 400 mA IIL Logical 0 Input Current (Ports 1, 2, 3, RST) 8032AH, 8052AH All Others b 800 b 500 mA mA VIN e 0.45V VIN e 0.45V IIL2 Logical 0 Input Current (XTAL2) b 4.0 mA VIN e 0.45V ILI Input Leakage Current (Port 0) g 10 mA 0.45 s VIN s VCC IIH1 Input Current to RST to Activate Reset 500 mA VIN k (VCC b 1.5V) ICC Power Supply Current: 8031/8051 8031AH/8051AH 8032AH/8052AH 175 135 175 mA mA mA All Outputs Disconnected; Pin Capacitance 10 pF Test freq e 1 MHz CIO *NOTE: Capacitive loading on Ports 0 and 2 may cause noise pulses to be superimposed on the VOLs of ALE and Ports 1 and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1-to-0 transitions during bus operations. In the worst cases (capacitive loading l 100 pF), the noise pulse on the ALE line may exceed 0.8V. In such cases it may be desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. 6 AUTOMOTIVE MICROCONTROLLER MCSÉ 51 AC CHARACTERISTICS Symbol TA e b 40§ C to a 110§ C; VCC e 5V g 10%; VSS e 0V; Load Capacitance for Port 0, ALE, and PSEN e 100 pF; Load Capacitance for All Other Outputs e 80 pF Parameter 12 MHz Oscillator Min 1/TCLCL Oscillator Frequency TLHLL ALE Pulse Width Max Variable Oscillator Min Max 3.5 12.0 2TCLCL b 40 ns ns TAVLL Address Valid to ALE Low 43 TLLAX Address Hold after ALE Low 48 TCLCL b 35 ALE Low to Valid Instr In TLLPL ALE Low to PSEN Low MHz 127 TCLCL b 40 TLLIV Units 233 ns 4TCLCL b 100 58 TCLCL b 25 215 3TCLCL b 35 ns ns TPLPH PSEN Pulse Width TPLIV PSEN Low to Valid Instr In TPXIX Input Instr Hold after PSEN TPXIZ Input Instr Float after PSEN TPXAV PSEN to Address Valid TAVIV Address to Valid Instr In 302 5TCLCL b 115 ns TPLAZ PSEN Low to Address Float 20 20 ns TRLRH RD Pulse Width 400 6TCLCL b 100 ns TWLWH WR Pulse Width 400 6TCLCL b 100 ns TRLDV RD Low to Valid Data In TRHDX Data Hold after RD High TRHDZ Data Float after RD High 97 2TCLCL b 70 ns TLLDV ALE Low to Valid Data In 517 8TCLCL b 150 ns TAVDV Address to Valid Data In 9TCLCL b 165 ns TLLWL ALE Low to RD or WR Low 200 3TCLCL a 50 ns TAVWL Address to RD or WR Low 203 4TCLCL b 130 ns TQVWX Data Valid to WR Transition 23 TCLCL b 60 ns TQVWH Data Valid to WR High 433 7TCLCL b 150 ns TWHQX Data Hold after WR High 33 TCLCL b 50 ns TRLAZ RD Low to Address Float TWHLH RD or WR High to ALE High 125 0 0 63 75 TCLCL b 20 252 5TCLCL b 165 585 3TCLCL b 50 20 123 TCLCL b 40 ns ns 0 300 ns ns TCLCL b 8 0 43 ns 3TCLCL b 125 ns ns 20 ns TCLCL a 40 ns 7 AUTOMOTIVE MICROCONTROLLER MCSÉ 51 EXTERNAL PROGRAM MEMORY READ CYCLE 270499 – 7 EXTERNAL DATA MEMORY READ CYCLE 270499 – 8 8 AUTOMOTIVE MICROCONTROLLER MCSÉ 51 EXTERNAL DATA MEMORY WRITE CYCLE 270499 – 9 SERIAL PORT TIMINGÐSHIFT REGISTER MODE Test Conditions: TA e b 40§ C to a 110§ C; VCC e 5V g 10%; VSS e 0V; Load Capacitance e 80 pF Symbol Parameter 12 MHz Oscillator Min Max Variable Oscillator Min Units Max TXLXL Serial Port Clock Cycle Time 1.0 12TCLCL ms TQVXH Output Data Setup to Clock Rising Edge 700 10TCLCL b 133 ns TXHQX Output Data Hold after Clock Rising Edge 50 2TCLCL b 117 ns TXHDX Input Data Hold after Clock Rising Edge 0 0 ns TXHDV Clock Rising Edge to Input Data Valid 700 10TCLCL b 133 ns 9 AUTOMOTIVE MICROCONTROLLER MCSÉ 51 SHIFT REGISTER TIMING WAVEFORMS 270499 – 10 EXTERNAL CLOCK DRIVE Symbol Parameter Min Max Units 1/TCLCL Oscillator Frequency 3.5 12 MHz TCHCX High Time 20 TCLCX Low Time 20 TCLCH Rise Time 20 ns TCHCL Fall Time 20 ns ns ns EXTERNAL CLOCK DRIVE WAVEFORMS 270499 – 11 AC TESTING INPUT, OUTPUT WAVEFORMS 270499 – 12 AC Testing: Inputs are driven at 2.4V for a Logic ‘‘1’’ and 0.45V for a Logic ‘‘0’’. Timing measurements are made at 2.0V for a Logic ‘‘1’’ and 0.8V for a Logic ‘‘0’’. 10 AUTOMOTIVE MICROCONTROLLER MCSÉ 51 DATASHEET REVISION HISTORY The following are key differences between this datasheet and the -005 version: 1. The ‘‘preliminary’’ status was dropped and replaced with production status (no label). 2. Trademarks were updated. The following are key differences between the -005 and the -004 version of the datasheet: 1. Preliminary notice was placed on the title page. 2. Figure 2. MCS 51 Block Diagram was modified to include the note found at the bottom of the figure. 3. RST pin in Figure 3 was changed to RESET. 4. RST pin description was changed to RESET pin description. 5. Power dissipation note added below Power dissipation listing in Absolute Maximum Ratings. 6. VIH and VIH1 were changed by 0.1V to reflect test conditions. 7. TPLPH was corrected to show test program timing. The following are key differences between the -004 datasheet and the -003 version of the datasheet: 1. The title was changed to 8031AH/8051AH, 8032AH/8052AH MCS 51 NMOS Single-Chip 8-Bit Microcontrollers. 2. ‘‘NC’’ pin labels changed to ‘‘Reserved’’ in Figure 3. 3. Capacitor value for ceramic resonators deleted in Figure 4. The following are key differences between the -001 and the -002 version of the datasheet: 1. The title was changed to 8031/8051, 8031AH/8051AH, 8032AH/8052AH, 8751H MCS 51 NMOS SingleChip 8-Bit Microcontrollers. 2. Removed 8751H-8 from the datasheet. 3. Removed reference to LCC package version. 4. Removed burn-in options from Table 1. 5. Added pin count to Figure 1. 6. Test conditions for IIL1 and IIH specifications added to the DC Characteristics. 7. Datasheet revision history added. 11