DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT μ PC844GR-9LG, μ PC4744GR-9LG SINGLE POWER SUPPLY, HIGH SPEED, WIDE BAND, QUAD OPERATIONAL AMPLIFIERS <R> DESCRIPTION The μ PC844GR-9LG, μ PC4744GR-9LG are a high speed version of the operational amplifier μ PC451GR-9LG, μ PC324GR-9LG for general single power supply use with high speed pulse response and high stabilization. A high speed PNP transistor is used in the circuit which improves the characteristics such as a slew rate, gain-bandwidth product, stabilization of the withstand load capacitance, with no crossover distortion compared to μ PC451GR-9LG, μ PC324GR-9LG. Therefore, μ PC844GR-9LG, μ PC4744GR-9LG can be used in a wide range of application circuits for single power supply AC amplifier, active filters, line driver and an amplifier for light receiving element etc. The μ PC844GR-9LG which expands temperature type is suited for wide operating ambient temperature use, and μ PC4744GR-9LG is used for general purposes. μ PC842GR-9LG, μ PC4742GR-9LG which are dual types with the same circuit configuration are also available as series of operational amplifiers. <R> FEATURES • Slew Rate (AV = +1) 7 V/μs (TYP.) (V+ = +5 V, V− = GND) • Stability to capacitive loads (load capacity, 1000 pF) • Internal frequency compensation • Gain Band Width Product 3.5 MHz (TYP.) • Output short-circuit protection • Input Offset Voltage ±2 mV (TYP.) • A pin connection (pin compatible) of a standard quad operational • Input Offset Current ±6 nA (TYP.) amplifier. • Wide operating ambient temperature range μ PC844GR-9LG: TA = −40 to +125°C, μ PC4744GR-9LG: TA = −40 to +85°C • Small Package (The mounting area is reduced to half compared to the conventional 14-pin plastic SOP (1.27 mm pitch)) <R> ORDERING INFORMATION Part Number Selected Grade μ PC844GR-9LG-E1-A Note μ PC844GR-9LG-E2-A Note Standard Package 14-pin plastic TSSOP (5.72 mm(225)) Package Type • 16 mm wide embossed taping • Pin 1 on draw-out side Standard 14-pin plastic TSSOP (5.72 mm(225)) • 16 mm wide embossed taping • Pin 1 at take-up side μ PC4744GR-9LG-E1-A Note Standard 14-pin plastic TSSOP(5.72 mm(225)) • 16 mm wide embossed taping • Pin 1 on draw-out side μ PC4744GR-9LG-E2-A Note Standard 14-pin plastic TSSOP(5.72 mm(225)) • 16 mm wide embossed taping • Pin 1 at take-up side Note Pb-free (This product does not contain Pb in the external electrode and other parts.) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G17928EJ4V0DS00 (4th edition) Date Published December 2007 NS Printed in Japan 2006, 2007 The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. μ PC844GR-9LG, μ PC4744GR-9LG EQUIVALENT CIRCUIT (1/4 Circuit) <R> PIN CONFIGURATION (Marking side) V+ Q7 Q2 II Q8 Q9 Q10 Q11 1 II1 2 IN1 + IN2 5 II2 6 OUT2 7 Q12 Q18 Q3 Q1 OUT1 V Q19 Q4 OUT IN Q14 Q5 Q6 Q13 Q20 Q15 Q16 14 OUT4 13 II4 3 12 IN4 4 11 V− 10 IN3 9 II3 8 OUT3 1 −+ −+ 2 4 +− +− 3 Q17 V− <R> ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Parameter + Voltage between V and V Symbol − Note1 Differential Input Voltage Input Voltage Total Power Dissipation V −V μ PC844GR-9LG − μ PC4744GR-9LG V ±36 V Note4 Output Short Circuit Duration Note5 − − − + V − 0.3 to V + 36 VI Note3 Unit −0.3 to +36 VID Note2 Output applied Voltage + V VO V − 0.3 to V + 0.3 V PT 550 mW tS Indefinite s Operating Ambient Temperature TA −40 to +125 −40 to +85 °C Storage Temperature Tstg −55 to +150 −55 to +125 °C Note1. Note that reverse connections of the power supply may damage ICs. + 2. The input voltage is allowed to input without damage or destruction independent of the magnitude of V . Either input signal is not allowed to go negative by more than 0.3 V. In addition, the input voltage that operates normally as an operational amplifier is within the Common Mode Input Voltage range of an electrical characteristic. 3. A range where input voltage can be applied to an output pin externally with no deterioration or damage to the feature (characteristic). The input voltage can be applied regardless of the electric supply voltage. This specification which includes the transition state such as electric power ON/OFF must be kept. 4. This is the value of when the glass epoxy substrate (size: 100 mm x 100 mm, thickness: 1 mm, 15% of the substrate area where only one side is copper foiled is filling wired) is mounted. Note that restrictions will be made to the following conditions for each product, and the derating ratio depending on the operating ambient temperature. μ PC844GR-9LG: Derate at −7.0 mW/°C when TA > 71°C. (Junction − ambient thermal resistance Rth(J-A) = 144°C/W) μ PC4744GR-9LG: Derate at −7.0 mW/°C when TA > 46°C. (Junction − ambient thermal resistance Rth(J-A) = 144°C/W) 5. Pay careful attention to the total power dissipation not to exceed the absolute maximum ratings, Note 4. 2 Data Sheet G17928EJ4V0DS μ PC844GR-9LG, μ PC4744GR-9LG RECOMMENDED OPERATING CONDITIONS Parameter Symbol V Power Supply Voltage (Split) − ± V Output Current IO TYP. MAX. Unit ±16 V +32 V ±10 mA ±1.5 + Power Supply Voltage (V = GND) Capacitive Load (AV = +1) MIN. +3 +5 to +30 1000 CL Note pF Note This is the value during a feedback resistance (Rf) = 0 Ω. <R> ELECTRICAL CHARACTERISTICS TA = 25°C, V± = ±15 V Parameter Symbol Conditions MIN. TYP. MAX. Unit Input Offset Voltage VIO ±2 ±6 mV Input Offset Current IIO ±6 ±75 nA 130 500 nA 11 mA Input Bias Current Note1 IB Large Signal Voltage Gain Circuit Current Note2 AV RL ≥ 2 kΩ, VO = ±10 V ICC IO = 0 A 25000 300000 7.5 Common Mode Rejection Ratio CMR 70 86 dB Supply Voltage Rejection Ratio SVR 70 93 dB Output Voltage Swing VOm1 VOm2 RL = 10 kΩ ±13.7 RL ≥ 2 kΩ +14 V −14.3 ±13.5 V − 1.8 V Common Mode lnput Voltage Range VICM Slew Late SR AV = +1 (rise) 8.5 V/μs Gain Band Width Product GBW f = 100 kHz 3.5 MHz f = 20 Hz to 20 kHz 120 dB Channel Separation V V + − TA = 25°C, V+ = +5 V, V− = GND Parameter Symbol Conditions MIN. TYP. MAX. Unit Input Offset Voltage VIO ±2 ±5 mV Input Offset Current IIO ±6 ±75 nA IB 150 500 nA 9 mA Input Bias Current Note1 Large Signal Voltage Gain Circuit Current Note2 AV RL ≥ 2 kΩ ICC IO = 0 A 25000 300000 6 Common Mode Rejection Ratio CMR 70 80 dB Supply Voltage Rejection Ratio SVR 70 95 dB Output Voltage Swing VOm RL ≥ 2 kΩ (Connect to GND) 3.7 4 0 0 V + V − 1.8 0 V Common Mode lnput Voltage Range VICM Output Source Current IO SOURCE VIN (+) = +1 V, VIN (−) = 0 V 10 30 mA Output Sink Current IO SINK VIN (+) = 0 V, VIN (−) = +1 V 10 30 mA Slew Late SR AV = +1 (rise) 7 V/μs Notes1. The input bias current flows in the direction where the IC flows out because the first stage is configured with a PNP transistor. 2. This is a current that flows in the internal circuit. This current will flow irrespective of the channel used. Data Sheet G17928EJ4V0DS 3 μ PC844GR-9LG, μ PC4744GR-9LG <R> TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C, TYP.) (Reference value) ICC vs. V+ PT vs. TA 16 With 100 mm x 100 mm, thickness 1 mm glass epoxy substrate (refer to "ABSOLUTE MAXIMUM RATINGS Note 4" ) 800 600 μP μP C8 C4 44 74 400 GR 4G -9 R- LG 9L G 200 V+ 12 8 125°C 4 20 40 60 80 100 120 140 0 TA - Operating Ambient Temperature - °C 10 20 30 40 V+ - Power Supply Voltage - V (V− = GND) VIO vs. V+ VIO vs. TA 2 4 3 VIO - Input Offset Voltage - mV VIO - Input Offset Voltage - mV 25°C 0 0 1 0 -1 2 1 0 -1 -2 V± = ±15 V each 5 samples date -3 -2 -4 0 10 20 + 30 40 -50 − 0 50 100 150 V - Power Supply Voltage - V (V = GND) TA - Operating Ambient Temperature - °C VICM vs. V+ IB vs. V+ 200 40 IB - Input Bias Current - nA VICM - Common Mode Input Voltage Range - V TA = −40°C − + 1V 0 4 IO = 0 A A ICC ICC - Supply Current - mA PT - Total Power Dissipation - mW 1000 30 VICM + 20 10 VICM − 150 100 50 VIN = V+/2 0 0 0 10 + 20 30 40 − V - Power Supply Voltage - V (V = GND) Data Sheet G17928EJ4V0DS 0 10 + 20 30 40 − V - Power Supply Voltage - V (V = GND) μ PC844GR-9LG, μ PC4744GR-9LG IB vs. TA VO vs. f 30 V± = ±15 V RL = 2 kΩ VO - Output Voltage Signal - Vp-p IB - Input Bias Current - nA 200 150 100 50 V± = ±15 V 20 10 0 0 -50 0 50 100 1 150 10 100 1k 10 k f - Frequency - Hz TA - Operating Ambient Temperature - °C AV, φ vs. f AV - Voltage Gain - dB, φ - Phase Margin - deg. 120 V± = ±2.5 V ±15 V φ 100 AV ±15 V 80 ±2.5 V 60 40 20 0 0.1 1 10 100 1k 10 k 100 k 1M 10 M f - Frequency - Hz SR - TA 15 RL = 2 kΩ V+ = +5 V V− = GND 3 2 1 0 3 2 1 Fall 12 SR - Slew Rate - V/μs VIN - Input Voltage - V VO - Output Voltage - V PULSE RESPONSE 9 Rise 6 V± = ±15 V RL = 2 kΩ 3 0 0 0 1 2 3 -50 t - time - μs 0 50 100 150 TA - Operating Ambient Temperature - °C Data Sheet G17928EJ4V0DS 5 μ PC844GR-9LG, μ PC4744GR-9LG VO vs. IO SINK ΔVO vs. IO SOURCE 10 5 V+ /2 + V+ V = +15 V ΔVO - Output Voltage to V+ - V VO - Output Voltage - V V+ IO SINK − + VO TA = −40°C 1 25°C 125°C 0.1 0.01 0.1 1 10 100 IO SINK - Output Sink Current - mA 6 4 V+ /2 V+ = +15 V ΔVO + − IO SOURCE 3 2 TA = −40°C 25°C 1 125°C 0 0.01 0.1 1 10 IO SOURCE - Output Source Current - mA Data Sheet G17928EJ4V0DS 100 μ PC844GR-9LG, μ PC4744GR-9LG <R> PRECAUTIONS FOR USE O The process of unused circuits If there is an unused circuit, the following connection is recommended. Process example of unused circuits V+ V+ R − + R V− To potentials within the range of common-mode input voltage (VICM) V− Remark A midpoint potential of V+ and V− is applied to this example. O Ratings of input/output pin voltage When the voltage of input/output pin exceeds the absolute maximum rating, it may cause degradation of characteristics or damages, by a conduction of a parasitic diode within an IC. In addition, when the input pin may be lower than V−, or the output pin may exceed the power supply voltage, it is recommended to make a clump circuit by a diode whose forward voltage is low (e.g.: Schottky diode) for protection. O Range of common-mode input voltage When the supply voltage does not meet the condition of electrical characteristics, the range of common-mode input voltage is as follows. VICM (TYP.): V− to V+ − 1.8 (V) (TA = 25°C) During designing, temperature characteristics for use with allowance. O The maximum output voltage The range of the TYP. value of the maximum output voltage when the supply voltage does not meet the condition of electrical characteristics is as follows: VOm+ (TYP.): V+ − 1 (V) (TA = 25°C), VOm− (TYP.): V− + 0.7 (V) (TA = 25°C) During designing, consider variations in characteristics and temperature characteristics for use with allowance. In addition, also note that the output voltage range (VOm+ − VOm−) becomes narrow when an output current increases. O Operation of output This IC will not operate an output current sinking when the output voltage is V− + 0.7 V and below. In this situation, an output voltage and its level approach to the V− side can be improved by connecting the load resistance to an output pin / V− intermediate by sinking current at the load resistance side. (The effect will differ depending on the flow of current in the load resistance.) O Handling of ICs When stress is added to ICs due to warpage or bending of a board, the characteristic fluctuates due to piezoelectric effect. Therefore, pay attention to warpage or bending of a board. Data Sheet G17928EJ4V0DS 7 μ PC844GR-9LG, μ PC4744GR-9LG PACKAGE DRAWINGS (Unit: mm) 14-PIN PLASTIC TSSOP (5.72mm (225)) D D1 detail of lead end A3 8 14 c θ L Lp 1 7 (UNIT:mm) ZD b x M e ITEM D DIMENSIONS 5.15±0.15 S D1 5.00±0.10 E 4.40±0.10 HE 6.40±0.20 A 1.20 MAX. A1 0.10±0.05 A2 1.00±0.05 A3 0.25 HE A E A2 S y S A1 NOTE Each lead centerline is located within 0.10mm of its true position at maximum material condition. L1 b +0.06 0.24 −0.05 c 0.145±0.055 L 0.50 Lp 0.60±0.15 L1 θ 1.00±0.20 3° +5° −3° e 0.65 x 0.10 y 0.10 ZD 8 Data Sheet G17928EJ4V0DS 0.625 P14GR-65-9LG μ PC844GR-9LG, μ PC4744GR-9LG <R> RECOMMENDED SOLDERING CONDITIONS The μ PC844GR-9LG, μ PC4744GR-9LG should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales representative. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Type of Surface Mount Device μ PC844GR-9LG-A Note , μ PC4744GR-9LG-A Note : 14-pin plastic TSSOP (5.72 mm (225)) Process Infrared ray reflow Conditions Symbol Peak temperature: 260°C, Reflow time: 60 seconds or less (at 220°C or higher), IR60-00-3 Maximum number of reflow processes: 3 times. Wave soldering Solder temperature: 260°C or below, Flow time: 10 seconds or less, Maximum WS60-00-1 number of flow processes: 1 time, Pre-heating temperature: 120°C or below (Package surface temperature). Partial heating method Pin temperature: 350°C or below, P350 Heat time: 3 seconds or less (Per each side of the device). Note Pb-free (This product does not contain Pb in external electrode and other parts.) Caution Apply only one kind of soldering condition to a device, except for “partial heating method”, or the device will be damaged by heat stress. Remark Flux: Rosin flux with low chlorine (0.2 Wt% or below) recommended. <R> REFERENCE DOCUMENTS Document Name Document No. QUALITY GRADES ON NEC SEMICONDUCTOR DEVICES C11531E SEMICONDUCTOR DEVICE MOUNT MANUAL http://www.necel.com/pkg/en/mount/index.html NEC SEMICONDUCTOR DEVICE RELIABILITY/QUALITY CONTROL IEI-1212 SYSTEM-STANDARD LINEAR IC REVIEW OF QUALITY AND RELIABILITY HANDBOOK C12769E NEC SEMICONDUCTOR DEVICE RELIBIALITY/QUALITY CONTROL C10983E SYSTEM Data Sheet G17928EJ4V0DS 9 μ PC844GR-9LG, μ PC4744GR-9LG • The information in this document is current as of December, 2007. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. 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(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). M8E 02. 11-1