NJRC NJG1130KA1

NJG1130KA1
GPS LOW NOISE AMPLIFIER GaAs MMIC
! GENERAL DESCRIPTION
NJG1130KA1 is a low noise amplifier GaAs MMIC designed
for GPS application at the 1.575GHz. The LNA offers excellent
low noise figure, high linearity and low current consumption.
Two stage amplifier and ESD protection circuit are integrated
in the IC to achieve very high gain and high ESD tolerance.
An ultra-small and ultra-thin package of FLP6-A1 is adopted.
! FEATURES
" Low voltage operation
" Low current consumption
" High gain
" Low noise figure
" 1dB gain compression output power
" High output IP3
" Ultra-small & ultra-thin package
! PACKAGE OUTLINE
NJG1130KA1
+2.85V typ.
5.0mA typ.
29.0dB typ. @ f=1.575GHz
0.65dB typ. @ f=1.575GHz
+11.0dBm typ. @ f=1.575GHz
+14dBm typ. @ f=1.575+1.5751GHz, Pin=-35dBm
FLP6-A1 (Package size: 1.6x1.6x0.6mm)
! PIN CONFIGURATION
(Top View)
Pin Connection
4
3
AMP
5
6
2
AMP
1.
2.
3.
4.
5.
6.
RF OUT
GND
VDD
RF IN
GND
GND
1
Package Orientation Mark
Note: Specifications and description listed in this datasheet are subject to change without notice.
Ver.2007-06-13
-1-
NJG1130KA1
! ABSOLUTE MAXIMUM RATINGS
Ta=+25°C, Zs=Zl=50ohm
PARAMETERS
SYMBOL
CONDITIONS
RATINGS
UNITS
5.0
V
Drain Voltage
VDD
Input power
Pin
VDD=2.85V
+15
dBm
Power dissipation
PD
on PCB board, at Tjmax=150°C
170
mW
Operating temperature
Topr
-40~+85
°C
Storage temperature
Tstg
-55~+150
°C
! ELECTRICAL CHARACTERISTICS
GENERAL CONDITIONS: VDD=2.85V, freq=1.575GHz, Ta=+25°C, Zs=Zl=50ohm, with application circuit
PARAMETERS
SYMBOL
Operating voltage
VDD
Operating current
IDD
Small signal gain
Gain
Noise figure
1dB gain compression
output power
3rd order output
intercept point
NF
CONDITIONS
RF OFF
Exclude PCB & connector
losses (0.10dB)
P-1dB(out)
OIP3
f=1.575+1.5751GHz,
Pin=-35dBm
MIN
TYP
MAX
UNITS
2.5
2.85
3.3
V
-
5.0
8.5
mA
26.0
29.0
31.5
dB
-
0.65
0.95
dB
+5.0
+11.0
-
dBm
+7.0
+14.0
-
dBm
RF IN VSWR
VSWRi
-
2.4
2.8
RF OUT VSWR
VSWRo
-
1.6
2.0
-2-
NJG1130KA1
! ELECTRICAL CHARACTERISTICS
(Condition :Ta=+25℃,VDD=2.85V,Zs=Zl=50ohm with application circuit)
Gain, IDD vs. Pin
Pout vs. Pin
(f=1575MHz)
(f=1575MHz)
25
30
20
Gain (dB)
15
10
5
25
30
20
20
IDD (mA)
Gain
P-1dBout=+12.0dBm
Pout (dBm)
40
0
Pout
15
-5
10
IDD
Gain 1dB Compression Line
P-1dBin=-16.0dBm
P-1dBin=-16.0dBm
-15
-40
-30
-20
-10
10
-40
0
0
-30
0
OIP3, IIP3 vs. frequency
Pout, IM3 vs. Pin
(f1=1550~1600MHz, f2=f1+100kHz, Pin=-35dBm)
(f1=1575MHz, f2=f1+100kHz)
-8
17
OIP3=+15.4dBm
-9
16
20
OIP3
0
OIP3 (dBm)
Pout, IM3 (dBm)
-10
Pin (dBm)
Pin (dBm)
40
-20
Pout
-20
-40
15
-10
14
-11
13
-12
-13
12
IIP3 (dBm)
-10
IIP3
IM3
-60
11
-14
10
-15
IIP3=-13.4dBm
-80
-40
-30
-20
-10
9
1550
0
1560
1570
1580
1590
-16
1600
frequency (MHz)
Pin (dBm)
NF, Gain vs. frequency
(f=1550~1600MHz)
4.0
31
30
NF (dB)
3.0
Gain
29
2.5
28
2.0
27
1.5
26
1.0
Gain (dB)
3.5
25
NF
24
0.5
(NF: Exclude PCB & Connector Losses)
0.0
1550
1560
1570
1580
1590
23
1600
frequency (MHz)
-3-
NJG1130KA1
! ELECTRICAL CHARACTERISTICS
(Condition :Ta=+25℃,Zs=Zl=50ohm with application circuit)
Gain, NF vs. VDD
15.0
31
3.5
14.0
30
3.0
29
2.5
28
Gain
2.0
1.5
27
26
NF
1.0
P-1dB(OUT) (dBm)
4.0
NF (dB)
Gain (dB)
P-1dB(OUT) vs. VDD
(f=1575MHz)
32
P-1dB(OUT)
13.0
12.0
11.0
10.0
9.0
0.5
25
24
2.4
2.6
2.8
3.0
8.0
2.4
0.0
3.4
3.2
(f=1575MHz)
2.6
2.8
VDD (V)
OIP3, IIP3 vs. VDD
20
3.0
3.2
3.4
VDD (V)
VSWRi, VSWRo vs. VDD
(f1=1575MHz, f2=f1+100kHz, Pin=-35dBm)
18
16
(f=1575MHz)
-2
4.0
-4
3.5
3.5
-6
3.0
3.0
4.0
12
-10
10
-12
2.5
2.0
1.5
IIP3
2.0
1.5
VSWRi
-14
1.0
1.0
6
-16
0.5
0.5
2.6
2.8
3.0
3.2
-18
3.4
3.2
3.4
VDD (V)
IDD vs. VDD
(RF OFF)
10
9
8
IDD (mA)
2.5
8
4
2.4
7
6
IDD
5
4
3
2.4
2.6
2.8
3.0
VDD (V)
-4-
VSWRo
0.0
2.4
2.6
2.8
3.0
VDD (V)
3.2
0.0
3.4
VSWRo
-8
VSWRi
14
IIP3 (dBm)
OIP3 (dBm)
OIP3
NJG1130KA1
! ELECTRICAL CHARACTERISTICS
(Condition :VDD=2.85V,Zs=Zl=50ohm with application circuit)
P-1dB(OUT) vs. Temperature
Gain, NF vs. Temperature
Gain (dB)
31
Gain
4.0
3.5
18
30
3.0
29
2.5
28
2.0
27
1.5
26
1.0
P-1dB(OUT) (dBm)
32
20
NF (dB)
(f=1575MHz)
NF
25
24
-40
(f=1575MHz)
16
14
12
P-1dB(OUT)
10
8
0.5
-20
0
20
40
60
6
-40
0.0
100
80
-20
0
Temperature ( C)
19
40
60
80
100
VSWRi, VSWRo vs. Temperature
OIP3, IIP3 vs. Temperature
(f1=1575MHz, f2=f1+100kHz, Pin=-35dBm)
20
Temperature ( oC)
o
(f=1575MHz)
4.0
-12
3.5
18
-13
17
-14
16
-15
OIP3
15
-16
VSWRi, VSWRo
3.0
IIP3 (dBm)
OIP3 (dBm)
IIP3
VSWRi
2.5
2.0
1.5
VSWRo
1.0
-17
14
13
-40
-20
0
20
40
60
80
Temperature ( oC)
0.5
0.0
-40
-18
100
0
20
40
60
Temperature (oC)
80
100
k-factor vs. Temperature
IDD vs. Temperature
(RF OFF)
10
-20
(f=100MHz~20GHz)
20
8
15
k-factor
IDD (mA)
IDD
6
4
10
-40oC
-20oC
0oC
+25oC
+50oC
+85oC
5
2
0
-40
-20
0
20
40
60
o
Temperature ( C)
80
100
0
0
5
10
15
20
frequency (GHz)
-5-
NJG1130KA1
! ELECTRICAL CHARACTERISTICS
(Condition :Ta=+25℃,VDD=2.85V,Zs=Zl=50ohm with application circuit)
S11, S22
Zin, Zout
VSWR
S21, S12
S11, S22 (~20GHz)
-6-
S21, S12 (~20GHz)
NJG1130KA1
! APPLICATION CIRCUIT
(Top View)
L3
6.8nH
L1
8.2nH
4
RFIN
AMP
VDD
3
L2
18nH
C2
1000pF
5
2
C3
1000pF
6
AMP
L4
33nH
1
R1
10ohm
C1
100pF
RFOUT
NOTES:
・ L1 and L2 form the input matching circuit. The LNA has integrated coupling and DC-blocking capacitor at
the input.
・ L3 is a matching inductor of the integrated 1st amplifier and 2nd amplifier. It should be connected to the
terminal3 as close as possible.
・ L4 is an output matching inductor.
・ C1 is a coupling and DC-blocking capacitor at the output.
・ C2 and C3 are bypass capacitors. They should be connected between L3 and L4. C2 should be placed to
the side of L3, and C3 should be placed to the side of L4, and should not be directly connected L3 and L4.
・ R1 is a stability resistor at high frequency, and it should be connected to the terminal1.
・ Ground terminal (No.2, 5, 6) should be connected to the ground plane as close as possible for good RF
performance.
・ For good performance, the terminal1,3 and 4 should not be coupled though floating-capacitance which
exists between RF transmission lines.
-7-
NJG1130KA1
■ TEST PCB LAYOUT
■Parts List
(Top View)
Parts ID
VDD
L1～L4
TAIYO-YUDEN
HK1005 Series
C1～C3
MURATA
GRM15 Series
C2
L2
RF IN
L1
L3
C3
RF OUT
L4
R1 C1
Commment
R1
1005 Size
PCB (FR-4)：
t=0.2mm
MICROSTRIP LINE WIDTH
=0.4mm (Z0=50Ω)
PCB SIZE
=17.0mm×17.0mm
C1
Terminal3
L2
L3
L1
Terminal4
R1
Terminal1
Ground plane
PRECAUTION:
[1] For good performance, the terminal1, 3 and 4 should not be coupled though floating-capacitance which
exists between RF transmission lines.
[2] In order not to couple with terminal 1, 3 and 4, please layout ground pattern under the IC.
[3] C2 should be placed to the side of L3, and C3 should be placed the side of L4. They should be connect
between L3 and L4, should not be directly connected L3 and L4.
-8-
NJG1130KA1
! TEST CIRCUITS
Test Circuits 1 to 3 define the test conditions used in the product electrical characteristics table.
VDD=2.85V
RF Input
RF Output
DUT
Port1
Port2
Network
Analyzer
Test Circuit 1. S-Parameter
VDD=2.85V
RF Input
RF Output
DUT
Output
Input
Noise Source
NF
Analyzer
Test Circuit 2. NF
VDD=2.85V
Signal
Generator
Isolator
RF Input
ATT: 6dB
Signal
Generator
DUT
RF Output
ATT: 20dB
Spectrum
Analyzer
Power
Comb.
Isolator
Test Circuit 3. Third order output intercept point
-9-
NJG1130KA1
! PACKAGE OUTLINE ( FLP6-A1 )
0.6max.
5
4
(0 . 2 )
1.2±0.05
6
1.6±0.05
0.1 3±0.05
1.6 ±0.1
2
(0.50)
3
(0.50 )
(0 . 3 )
0.22±0.05
リ ー ド メ ッ キ 厚 分 (0 . 0 1 )
(0 . 3 )
( 0 .2 )
1
Cautions on using this product
This product contains Gallium-Arsenide (GaAs) which is a harmful material.
• Do NOT eat or put into mouth.
• Do NOT dispose in fire or break up this product.
• Do NOT chemically make gas or powder with this product.
• To waste this product, please obey the relating law of your country.
This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle
with care to avoid these damages.
- 10 -
UNIT: mm
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.