LM3464/LM3464A LED Driver with Dynamic Headroom Control and Thermal Control Interfaces General Description Features The LM3464/64A is a 4-channel high voltage current regulator that provides a simple solution for LED lighting applications. The LM3464/64A provides four individual current regulator channels and works in conjunction with external Nchannel MOSFETs and sense resistors to give accurate driving current for every LED string. Additionally, the Dynamic Headroom Control (DHC) output can be interfaced to the external power supply to adjust the LED supply voltage to the lowest level that is adequate to maintain all the string currents in regulation, yielding the optimal overall efficiency. Digital PWM or analog voltage signals can be used to control the duty cycle of the all the channels. When analog control is used, the dimming frequency can be programmed via an external capacitor. A minimum duty cycle control is provided in the conditions that the analog dimming is configured as thermal feedback. Protection features include VIN under-voltage lock-out, LED open/short circuit and over-temperature fault signaling to the system controller. ■ Wide input voltage range ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 12V-80V (LM3464) 12V–95V (LM3464A) Dynamic Headroom Control ensures maximum efficiency 4 output channels with individual current regulation High channel to channel accuracy Digital PWM/Analog dimming control interface Resistor programmable dimming frequency & minimum duty cycle (analog dimming mode) Direct interface to thermal sensor Fault detection Over temperature protection Thermal shutdown Under voltage lockout Thermal enhanced eTSSOP-28 package Applications ■ Streetlights ■ Solid State Lighting Solutions Typical Application 30115001 © 2010 National Semiconductor Corporation 301150 www.national.com LM3464/LM3464A LED Driver with Dynamic Headroom Control and Thermal Control Interfaces November 18, 2010 LM3464/64A Connection Diagram 30115002 Ordering Information Order Number Package Type NSC Package Drawing LM3464MH Exposed Pad TSSOP-28 MXA28A LM3464MHX LM3464AMH 73 Units per Anti-Static Tube 2500 Units on Tape and Reel Exposed Pad TSSOP-28 MXA28A LM3464AMHX www.national.com Supplied As 73 Units per Anti-Static Tube 2500 Units on Tape and Reel 2 Pin Name Description Application Information 1 SYNC Synchronization signal output for cascade operation (Master-Slave configuration) Connect this pin to the DIM pin of other LM3464/64A to enable cascade operation (multiple device). This pin should leave open for single device operation. 2 DIM PWM dimming control Apply logic level PWM signal to this pin controls the average brightness of the LED string. (<1.25V disable output). 3 Thermal Thermal sensor input Connect thermal sensor to this pin with bias accordingly to facilitate thermal foldback and control the brightness of the LED array. 4 Thermal_Cap Thermal dimming ramp capacitor Connect a capacitor across this pin and GND to define the thermal dimming frequency. 5 VDHC Head room control Apply external voltage across this pin and ground to define the minimum drain voltage. This pin is internal biased at 0.9V. 6 DMIN Minimum thermal dimming duty control The voltage across this pin and GND defines the minimum thermal dimming duty cycle. 7 Faultb Fault signal output Open Drain output, pull-down when FAULT condition occurred. 8 AGND Signal ground Analog ground connection for internal circuitry. Must be connected to PGND external to the package. 9 FAULT_CAP Fault delay capacitor Connect to an external capacitor to program the fault response time. 10 CDHC DHC time constant capacitor An external capacitor to ground programs the Dynamic Headroom Control loop response time 11 OutP DHC Output Connect this pin to the voltage feedback input of primary power supply to facilitate dynamic headroom control. 12 VLedFB Output voltage sense input This pin senses the output voltage of the primary power supply. 13 VCC Internal regulator output This pin is the output terminal of the internal voltage regulator and should be bypassed by a high quality 1uF ceramic capacitor. 14 EN Enable input This pin serves as device enable input when logic level signal is applied. (Active high with internal pull-up) 15 VIN Supply voltage The input voltage should be in the range of 12V to 80V for LM3464, 12–95V for LM3464A 16 DR4 Channel 4 drain sense input This pin senses the drain voltage of the external MOSFET of channel 4 to facilitate DHC operation and fault detection. 17 DR3 Channel 3 drain sense input This pin senses the drain voltage of the external MOSFET of channel 3 to facilitate DHC operation and fault detection. 18 DR2 Channel 2 drain sense input This pin senses the drain voltage of the external MOSFET of channel 2 to facilitate DHC operation and fault detection. 19 DR1 Channel 1 drain sense input This pin senses the drain voltage of the external MOSFET of channel 1 to facilitate DHC operation and fault detection. 3 www.national.com LM3464/64A Pin Descriptions LM3464/64A Pin Name Description Application Information 20 SE4 Channel 4 sense input Connect to an external sense resistor to define the Channel 4 LED current. 21 GD4 Channel 4 gate driver output Connect to the gate of external NMOS to control the channel 4 LED current. 22 PGND Power Ground Ground for power circuitry. Reference point for all stated voltages. Must be externally connected to EP and AGND 23 GD3 Channel 3 gate driver output Connect to the gate of external NMOS to control the channel 3 LED current. 24 SE3 Channel 3 sense input Connect to an external sense resistor to define the Channel 3 LED current. 25 GD2 Channel 2 gate driver output Connect to the gate of external NMOS to control the channel 2 LED current. 26 SE2 Channel 2 sense input Connect to an external sense resistor to define the Channel 2 LED current. 27 GD1 Channel 1 gate driver output Connect to the gate of external NMOS to control the channel 1 LED current. 28 SE1 Channel 1 sense input Connect to an external sense resistor to define the Channel 1 LED current. EP EP Thermal Pad (Power Ground) Used to dissipate heat from the package during operation. Must be electrically connected to PGND external to the package. www.national.com 4 Storage Temperature Range Junction Temperature (TJ) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Operating Ratings (LM3464) (LM3464/LM3464A) VIN to GND DR1, DR2, DR3, DR4 to GND EN to GND All other inputs to GND ESD Rating (Note 2) Human Body Model -0.3V to 100V -0.3V to 100V -0.3V to 5.5V -0.3V to 7V −65°C to + 150°C + 150°C Supply Voltage Range (VIN) Junction Temperature Range (TJ) 12V to 80V −40°C to + 125°C Thermal Resistance (θJA) (Note 3) 33.5°C/W Thermal Resistance (θJC) (Note 3) 6°C/W Operating Ratings (LM3464A) ±2 kV Supply Voltage Range (VIN) Junction Temperature Range (TJ) 12V to 95V −40°C to + 125°C Thermal Resistance (θJA) (Note 3) 33.5°C/W Thermal Resistance (θJC) (Note 3) 6°C/W Electrical Characteristics (LM3464/LM3464A) Specification with standard type are for TA = TJ = +25°C only; limits in boldface type apply over the full Operating Junction Temperature (TJ) range. Minimum and Maximum are guaranteed through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = +25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 48V. Symbol Parameter Conditions Min Typ Max Units VIN-UVLO Vin under voltage lockout VIN increasing VIN-UVLO-HYS Vin UVLO hysteresis VIN decreasing VCC VCC output voltage CVCC = 0.68 µF No load 6.15 VCC-UVLO VCC under-voltage lockout threshold (UVLO) VCC increasing 4.98 VCC-UVLO-HYS VCC UVLO hysteresis VCC decreasing IIN Quiescent Current from VIN CVCC = 0.68 µF No load IVCC VCC Current limit VCC = 0V 18 VEN-DISABLE Device disable voltage threshold VEN Decreasing 2.1 2.55 3 V IEN-MAX EN pin internal pull current VEN = 0V 7.2 11 14.7 uA Vcc Regulator 8.5 V 95 6.3 mV 6.51 V 5.28 V 250 1.65 2.3 mV 3 mA mA Device Enable Analog Dimming Control Interface VCTHM-MAX Sawtooth max. voltage threshold at Thermal_Cap pin 100% output duty cycle 2.95 3.25 3.3 V VCTHM-MIN Sawtooth min. voltage threshold at Thermal_Cap pin 0% output duty cycle 0.325 0.4 0.493 V ICTHM Thermal_Cap pin output current 38.9 50 61 uA PWM Dimming Control Interface VDIM-LED-ON DIM pin voltage threshold at LED ON VDMIN = 0V VTHERMAL = VCC VDIM-LED-OFF DIM pin voltage threshold at LED OFF VDMIN = 0V VTHERMAL = VCC V 1.19 1.3 V Dynamic Headroom Control Output VOutP-MAX OutP pin max. output voltage VOutP-MIN OutP pin min. output voltage VLEDFB-LED-ON VLedFB pin voltage threshold at LED ON VLEDFB-SYS-RST System restart VLedFB pin voltage threshold for system restart VCC-0.5 IoutP = 1 mA current sink 0.3 2.4 Measure at VLedFB pin 5 V 2.5 1.2 V 2.58 V V www.national.com LM3464/64A Absolute Maximum Ratings (LM3464/LM3464A) (Note 1) LM3464/64A Symbol Parameter Conditions Min Typ 4.73 VCC–1 Max Units LED Current Regulator VGDx-MAX GDx gate driver max. output voltage VGDx-MIN GDx gate driver min. output voltage IGDx-MAX GDx gate driver short circuit current GDx short to GND IDRx DRx pin input current VDRx = 10V VDRx = 100V 0.115 V 0.127 V 8 mA 25 29 μA 55 70 μA Fault Detection and Handling VOVP-TH DRx Pin over-voltage protection threshold Measure at DRx pin VSHORTFAULT DRx short fault threshold Any VDRx < 2.5V 18 19 21 V 8.35 8.4 9.75 V VOPENFAULT SEx open fault threshold Measure at SEx pin IFAULT-CAP FAULT_CAP pin output current All VDRx < VOVP-TH 25 uA IFAULT-CAP-OVP FAULT_CAP pin output current at DRx over-voltage Any VDRx ≥ VOVP-TH 105 uA VFAULT-CAP FAULT-CAP pin voltage threshold at fault timer expire VFAULT-CAP rising 3.6 V RFaultb Faultb pin to GND resistance LED fault = TRUE 110 Ω 125 °C 30 mV Thermal Protection TOTM-TH Over Temperature Monitor Threshold TOTM-HYS Over Temperature Monitor Hysteresis 20 °C TSD Thermal shutdown temperature TJ rising 165 °C TSD-HYS Thermal shutdown temperature hysteresis TJ falling 20 °C 33.5 °C/W 6 °C/W Thermal Resistance θJA Junction to Ambient (Note 3) θJC Junction to Case (Note 3) eTSSOP-28 Package Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Note 3: Measurements are performed on a 4 layer JEDEC board with 10 vias provided under the exposed pad. See JESD51–1 to JESD51–11. The value of θJA is specifically dependent on the PCB trace area, trace material and the number of layers and thermal vias. Note 4: VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading. www.national.com 6 All curves taken at VIN = 48V with configuration in typical application for driving twelve power LEDs with four output channels active and output current per channel = 350 mA. TA = 25°C, unless otherwise specified. Channel 1 Current Sense Voltage (VSE1) Effifciency (%) 30115016 30115015 Thermal_Cap Pin Output Current VCC Variation (%) 30115017 30115018 Shutdown Current (EN pin = 0V) Operating Current (EN pin floating) 30115019 30115020 7 www.national.com LM3464/64A Typical Performance Characteristics LM3464/64A Startup Waveforms PWM Dimming (DIM pin) 30115023 30115024 PWM Dimming Delay Time (VDIM) rising) PWM Dimming Delay Time (VDIM) falling) 30115025 30115044 Thermal Foldback Dimming (VTHERMAL) rising) Thermal Foldback Dimming (VTHERMAL) falling) 30115027 www.national.com 30115028 8 LM3464/64A Block Diagram 30115021 9 www.national.com LM3464/64A 30115003 FIGURE 1. Typical Application Circuit with Fly-Back AC/DC Converter Overview The LM3464/64A is a four channel linear current regulator designed for LED lighting systems with wide input voltage range, high speed PWM and thermal foldback dimming control interface. The LM3464/64A incorporates a Dynamic Headroom Control (DHC) technology which maximizes overall efficiency of the lighting system by adjusting the output voltage of the primary power source dynamically. Linear current regulation secures high accuracy output current, LED and system reliability. High speed PWM dimming provides the flexibility of brightness control while maintaining constant color temperature of the light. The thermal foldback feature enables the LM3464/64A to manage the temperature of the LED heat sink or system chassis with a simple NTC/PTC temperature sensor. The thermal foldback input can also be used as an analog dimming control input to adapt to other sensors easily, such as ambient light sensor. Dynamic Headroom Control (DHC) Operation Principles of DHC Dynamic Headroom Control is a technology that aims at maximizing the overall system efficiency by altering the supply voltage to the LED(s) dynamically in respect to the characteristics of the LED(s). In the LM3464/64A, DHC is facilitated by connecting a resistor in between the OutP pin of the LM3464/64A and the voltage feedback node of the primary power supply (AC/DC) as shown in Figure 2. 30115004 FIGURE 2. Circuitry of the DHC Mechanism For example, in steady state, when all the output channels are in regulation and the forward voltage of any LED string decreases due to temperature raise, the drain voltage of the corresponding channel (DRx) increases to exceed the default 0.9V typical headroom voltage in order to maintain constant output current. As the drain voltage increases, the voltage of CDHC increases and the current sink into the OutP pin decreases. This will finally result in decrease of rail voltage (VRAIL) until the corresponding DRx voltage returns to minimum level. www.national.com 10 In order to provide failure protection to the LEDs, the rail voltage is pulled up by the LM3464/64A from a relatively low voltage level at system startup until the rail voltage reaches certain preset level. Figure 3 shows the change of the rail voltage of the LM3464/64A LED lighting system upon the primary power source is powered. The Lm3464/64A can be interfaced to an off-the-shelf converter to form a LED lighting system with simple connections. Figure 1 shows the typical application circuit of a lighting system using the LM3464/64A with a fly-back AC/DC converter. In this application, the output voltage of the AC/DC converter is mainly governed by a voltage reference IC, LM431 and a voltage divider consists of R1 and R2. The LM3464/64A influences the output voltage of the AC/DC converter by sinking current from the junction of the voltage divider (R1 and R2) to realize dynamic headroom control. The operation of the LM3464/64A upon startup can be divided into several phases according to the changes of the rail voltage as shown in Figure 3. When the AC/DC converter is powered, the rail voltage increases and stays steady when its native nominal output voltage, VRAIL(nom) is reached. This voltage is defined by the output voltage feedback resistor divider of the AC/DC converter. At this voltage level, the LM3464/64A is powered already. After certain delay defined by CDHC, the LM3464/64A starts to push the rail voltage up by sinking current into the OutP pin from the voltage feedback node of the AC/DC converter until the rail voltage reaches VDHC_READY. VDHC_READY is the highest rail voltage in normal operation and should be enough to turn on all the LED strings with current regulation (defined by RSNSx). As VRAIL reaches VDHC_READY, the LM3464/64A turns on all the output channels. This discharges the output capacitor of the primary power supply and causes the rail voltage to decrease to certain level that system efficiency is maximized (VLED). SETTING (VRAIL(nom)) The nominal rail voltage VRAIL(nom) is the nominal output voltage of the primary power supply (AC/DC) prior to DHC begins. The selection of VRAIL(nom) is primarily depend on the forward voltages of the LED arrays and should follow the equation shows below: VRAIL(nom) ≤ Vf(all_temp) + VVDHC In the equation, Vf(all_temp) is the lowest forward voltage among all the LED strings under all possible temperature. And VVDHC is the voltage headroom which equals to the voltage at the VDHC pin. Normally, the forward voltage of an LED drops as the ambient temperature increases. This could create large variation of total forward voltage of a LED sting under different temperature. In order to ensure proper system startup, the variation of LED forward voltage against temperature must be considered in calculations. SETTING VDHC_READY AND VRAIL(peak) DHC begins when the voltage at VLedFB pin reaches 2.5V, which is defined by the values of RFB1 and RFB2: Where VDHC_READY < VRAIL(peak) At this stage, the current of the LED strings are regulated and the rail voltage decreases in order to maintain minimum voltage drop and power dissipation on the MOSFETs. In case the OutP pin is accidentally shorten to ground, the rail voltage will increase and end up exceeds VDHC_READY. To avoid damaging the AC/DC converter, the possible peak output voltage, VRAIL(peak) can be roughly defined by the forward voltage of the LED strings and must set below the rated voltage of the components at the output of the AC/DC converter. In order to limit the power dissipation on the external MOSFETs, VRAIL(peak) is set to to no more than 10VDC higher than the forward voltage of the LED string. The following equations define the maximum output voltage of the AC/DC converter that can be pushed up by the LM3464/64A: VRAIL(peak) = VR1 + VREF(AC/DC) = (R1 x IR1) + VREF(AC/DC) for VREF(AC/DC) = 2.5V also since 30115039 FIGURE 3. Changes of Rail Voltage Upon Power Up 11 www.national.com LM3464/64A Application Information System Operation LM3464/64A ply output may cause visible flicker due to insufficient voltage headroom. Thus the voltage headroom follows this equation: As the system enters steady state, the rail voltage VRAIL decreases and finally settles to an optimal level that maintains the maximum power efficiency of the system. The voltage level of VRAIL under steady state can be calculated following this equation: where 0.8V < VVDHC < 2V SETTING LED CURRENT The LED current regulating mechanism of the LM3464/64A driver stage contains four individual LED current regulators. Every LED current regulator is composed of an external MOSFET (Q1-Q4), a current sensing resistor (RISNS1-RISNS4) and an amplifier inside the LM3464/64A that monitors the feedback voltage from the current sensing resistor. The integrated amplifier compares the voltage across current sensing resistors (RISNS1-RISNS4) to a 200mV typical reference voltage and controls the gate voltage of the MOSFETs (Q1-Q4) to realize linear current regulations. Figure 5 shows the simplified circuit of the linear LED current regulators. VRAIL = Vf(highest) + VVDHC In the equation, VRAIL is the rail voltage in steady state and Vf(highest) is the total forward voltage of the LED string which carry the highest forward voltage among the LED stings. VVDHC is the voltage at the VDHC pin. This voltage decides the headroom voltage for the LM3464/64A driver stage and equals to the minimum VDRx among the drain voltages of the MOSFETs under steady state. The VDHC pin is internally biased to 0.9V which also set the default voltage headroom to 0.9V. In applications that the output of the AC/DC converter contains more than 0.9V peak-to-peak ripple voltage, the voltage headroom can be increased by applying external bias to the VDHC pin. DEFINING VOLTAGE HEADROOM The voltage headroom is the rail voltage margin that reserve for precision linear current regulation under steady state. Under steady state, the voltage headroom is always minimized by the LM3464/64A to reduce power losses on the MOSFETs till one of the drain voltage (VDRx) of the MOSFETs equals the voltage on VDHC pin (0.9V typical). With external bias, the voltage of the VDHC pin can be adjusted up or down to adapt to different types of primary power supply. Figure 4 shows a simple resistor based biasing circuit that derives biasing voltage from the output of the internal voltage regulator, the VCC pin. 30115029 FIGURE 5. Linear LED Current Regulator The driving currents of the LED strings are defined by the values of RISNS1 to RISNS4 individually. The LED current and the value of RISNSx are related by the following equation: Since the accuracy of the LED currents are dependent on the tolerance of RISNSx, the RISNSx to recommended to be thick carbon file resistors with no more than 1% tolerance and adequate rated power to the desired LED current. 30115013 FIGURE 4. Adjusting Voltage Headroom with Resistors With the additional resistors, the VDHC pin voltage is adjustable in between 0.8V and 2V. The values of RA and RB should be at least 10 times lower than the typical values of the internal resistor divider of the VDHC pin (see Figure 4). However, it is recommended not to set the voltage headroom too low because the ripple voltage of the primary power sup- www.national.com 12 30115011 THERMAL FOLDBACK INTERFACE The thermal foldback function of the LM3464/64A helps in reducing the average LED currents and prolonging the LED lifetime under high temperature. The Thermal pin of the LM3464/64A is an analog input for thermal foldback control that accepts DC voltage from 0V to VCC. The thermal foldback control circuitry reduces the average LED currents by means of PWM dimming as shown in Figure 8: FIGURE 6. LED Current vs RISNSx RESPONSE OF THE LM3464/64A DRIVER STAGE In order to ensure good operation stability of the entire system, the response of the LM3464/64A circuitry must be set slower than the primary power supply. The response of the LM3464/64A is decided by the value of the capacitor, CDHC. In general, a higher capacitance CDHC will result in slower response of the LM3464/64A driver stage. Generally, a first order integrator that consists of CDHC and a transconductance amplifier with gm = 76umho and +/– 15uA current limit as shown in Figure 7 defines the frequency response of the LM3464/64A driver stage. 30115030 FIGURE 7. Simplified Circuit of the Frequency Response Setting Mechanism 30115040 The transconductance amplifier serves as a voltage to current converter that charges CDHC with a current proportional to the difference in voltage between the DRx and VDHC pins. As the voltage of the OutP pin is equal to VCC – VCDHC, the capacitance of CDHCdecide the rate of change of the OutP pin voltage and eventually limits the frequency response of the whole system . The higher capacitance the CDHC has, the longer time the OutP pins takes for certain voltage change. Thus the value of CDHC decides the response of the LM3464/64A driver stage. If the response of the LM3464/64A driver stage is set faster than that of the primary power supply, the entire system will suffer from unstable operation. However, setting the response of the LM3464/64A driver stage unnecessarily slow will worsen transient performance of the system and false trigger the fault detection mechanism of the LM3464/64A. Practically, the minimum value of the CDHC can be found out by means of ‘try and error’. In most cases, a 1uF 16V ceramic FIGURE 8. Average LED Current Reduces According to VThermal The dimming frequency is defined by a sawtooth waveform that generated by charging and discharging the capacitor CTHM which connects across the Thermal_Cap pin and GND. The LM3464/64A charges the CTHM up to 3.25V with 50uA constant current and discharge the CTHM by pulling the Thermal_Cap pin to ground until the pin voltage equals 0.4V. By comparing the voltage at the Thermal pin to the sawtooth voltage being generated at the Thermal_Cap pin of the LM3464/64A, a PWM dimming signal for thermal foldback is generated as shown in Figure 9: 13 www.national.com LM3464/64A capacitor is a good starting point that sets the response of the LM3464/64A driver stage slow enough for initial trial. The value of the CDHC capacitor can be reduced to speed up the response of the LM3464/64A driver stage. Otherwise, in case the system is unstable with 1uF CDHC, the capacitance of the CDHC capacitor should be increased until the entire system get into stable operation. This approach is effectively setting the cut-off frequency of the LM3464/64A driver stage lower than that of the primary power supply. Usually, setting the cut-off frequencies of the two stages apart can help avoiding unstable operation. The cutoff frequency of the LM3464/64A driver stage is governed by the follow equation: LM3464/64A 30115041 FIGURE 9. Signals Facilitating Thermal Foldback Control 30115042 FIGURE 10. Thermal Foldback Control with Minimum Dimming Duty Cycle Limit If the voltage at the Thermal pin is driven to exceed 3.25V, all output channels will be enabled with 100% thermal dimming duty cycle. If the Thermal pin voltage is set below 0.4V, all output channels will be disabled with 0% thermal dimming duty cycle. The dimming frequency and duty cycle with thermal foldback control are governed by the following equations: To define the minimum thermal dimming duty cycle, VDMIN should be set in between 0.4V to 3.25V. The minimum duty cycle is governed by the following equation: DMINIMUM = [(VDMIN - 0.4) X 35]% for 0.4 ≤ VDMIN ≤ 3.25V When VDMIN is below 0.4V (e.g. connect to GND), the minimum thermal dimming duty cycle limit is disabled. In applications that thermal foldback control is not required, the DMIN pin can be tied to GND to reduce power consumption. DThermal-foldback = (TLED_ON x fThermal-foldback) x 100% = [(VTHERMAL - 0.4) X 35]% PWM DIMMING The LM3464/64A provides a DIM pin that accepts TTL logic level signal for PWM dimming. When the DIM pin is pulled low, all LED current regulators will turn off while maintaining VCC regulator and part of the internal circuitries operating. External pull up resistor is required if the DIM pin is driven by an open collector / drain driver. PWM dimming guarantees uniform color temperature of the light throughout the entire dimming range. The average current of every output channel is decided by the dimming duty cycle and follows the equation below: for 0.4 ≤ VTHERMAL ≤ 3.25V SETTING MINIMUM THERMAL DIMMING DUTY CYCLE In applications that need to guarantee minimum illumines under high temperature environments, the minimum dimming duty cycle for thermal foldback may need to be limited. Such limit is defined by the voltage at the DMIN pin. When the Thermal pin voltage falls below the voltage at the DMIN pin, the thermal foldback dimming duty cycle will maintain at the level which set by the voltage of the DMIN pin (VDMIN), as shown in Figure 10. ILED(AVG) = DPWM x ILED PWM DIMMING CONTROL WITH THERMAL FOLDBACK The PWM dimming control can coexist with thermal foldback by applying PWM dimming control signal and thermal control signal to the DIM and Thermal pins concurrently. Normally, the dimming frequency for thermal foldback control should be much higher than the frequency of the PWM dimming control signal. Figure 11 presents the relationship among VThermal, VThermal_Cap, VDIM and ILED. As shown in the Figure, when thermal foldback is functioning, the average output current can be further decreased linearly according to the duty cycle of the PWM dimming signal being applied to the DIM pin. In order to synchronize the dimming signals, the CTHM is discharged on every rising edge of the PWM dimming signal on DIM pin, notice as t1, t2 and t3 in Figure 11. www.national.com 14 LM3464/64A 30115035 FIGURE 11. Thermal Foldback + PWM Dimming Control current regulation. Thus, the requirement for LED open circuit is VSEx below 30mV and internal gate voltage reaches its maximum (at VGDx about 5V). When the requirement of LED open fault is fulfilled, the LM3464/64A begins to charge up the CFLT. When the voltage of the FAULT_CAP reaches 3V, and the condition of open fault retains, an open fault is confirmed. After an open fault is confirmed, the failed channel(s) will be disabled and excluded from DHC loop. To reactivate the disabled channel(s), the EN pin can be pulled to GND for a soft reset or re-power the primary power supply for a system reset. Either reset methods results in a system restart with startup sequence shows in Figure 3. LOW POWER STANDBY The LM3464/64A will enter low power standby mode when the EN pin is pulled to GND. The EN pin is internally biased thus no external pull-up resistor or bias is required. Under standby mode, all the output channels are cut-off and part of the internal circuitries are disabled to maintain low power consumption. Upon the EN pin is pulled low, the OutP pin stopa sinking current from the feedback node of the primary power stage. This causes the rail voltage fall back to VRAIL (nom) slowly as the output capacitors of the primary power supply are being discharged by the LEDs. Pulling the EN pin low will not disable the VCC regulator. When the EN pin is released (floating), the LM3464/64A exits low power standby mode and the startup sequence begins as described in Figure 3. SHORT CIRCUIT OF LED STRINGS If any LED string experiences partially short circuit after normal system startup, the drain voltage (DRx) of the corresponding channel(s) will increase so as to maintain correct current regulation. When drain voltage increases up to 8.4V higher than the drain voltages of any other channels, the shortened channel will be latched off and excluded from the DHC loop to avoid further damages. Once a short fault is confirmed, the Faultb pin will be pulled low no matter it is due to failure of the power source or shortening of LED strings. When a short circuit of LED sting is confirmed, the failed channel(s) will be disabled and excluded from DHC loop. The disabled channels can be reactivated by either pulling the EN pin to GND or system re-powering. FAULT HANDLING and INDICATION The LM3464/64A features a complete mechanism for fault handling and indication. The LM3464/64A detects LED failures and raises fault indication signal at the Faultb pin upon open or short circuits of LED strings, insufficient supply voltage and so on. In order to avoid false triggering the fault detection circuitry, the LM3464/64A features a timer for fault recognition. When a fault condition arises and sustains longer than the time constant preset by the capacitor , CFLT, a fault is confirmed. The Faultb pin is then pulled low as an indication. The time constant for fault detection is defined by the value of the capacitor connects across the FAULT_CAP pin and GND, CFLT. Normally, a 2.2 nF CFLT that set a 264 us delay time is suitable for most application. For those applications with slow response primary power supply, the value of CFLT may need to increase accordingly. The time delay for fault detection is governed by the following equation: DRx PIN OVER-VOLTAGE PROTECTION The LM3464/64A features a over-voltage protection function that prevents damaging of the external MOSFETs due to short circuit of LED string(s). When the voltage of any DRx pin reaches 19V typical, the fault detection timer is triggered with the output current of the FAULT_CAP pin increases by 4 times (IFAULT-CAP-OVP) and results in fault detection time 4 times shorter. If a over-voltage of any DRx pin is confirmed, the particular channel will be latched off and excluded from DHC loop until the EN pin is pulled low (soft reset) or system re-powering is undertaken. OPEN CIRCUIT OF LED STRINGS Detection of LED open circuit is achieved by detecting the voltages of the SEx pin and the internal gate control signal being fed to the internal MOSFET gate driver. When a LED string is open circuit, the VSEx pin is pulled down to below 30mV by the current sensing resistor. As VSEx falls below its regulated level, the LM3464/64A increases the gate voltage of the corresponding MOSFET (VGDx) in order to maintain DRIVING LESS THAN FOUR LED STRINGS The LM3464/64A allows users to disable the unused output channels. Any output channel without a LED string connected or with DRx and SEx pins floating will be disabled at system startup. A disabled channel will be excluded from the DHC loop and will not contribute headroom control signal to the 15 www.national.com LM3464/64A LM3464/64A. This function is applicable to both single LM3464/64A and cascade operation modes. harness and external MOSFETs may resonant and eventually lead to unstable system operation. In applications that the cables between the LM3464/64A driver circuit and LED light engine are longer than 1 meter, a 4.7kΩ resistor should be added across the GDx pins to GND as shown in Figure 12. EXPANDING NUMBER OF OUTPUT CHANNEL The LM3464/64A can be cascaded to expand the number of output channel. Bases on the master-slave architecture, one of the LM3464/64A in the system must be set to master mode and the rest must be set to slave mode. Figure 15 shows an example application circuit that provides eight output channels. To enable cascade operation, the SYNC pin of the master LM3464/64A should connect to the DIM pin of the first slave device and similarly the SYNC pin of such slave device should connect to its down stream slave device for startup synchronization. In addition, the OutP pins of all the LM3464/64A have to tie up though a diode and resistor RDHC to the voltage feedback node of the primary power supply to accomplish dynamic headroom control, as shown in Figure 15. The slave devices can only be commanded by the master LM3464/64A. With the master and slave devices linked up, the information of startup synchronization, thermal foldback and PWM dimming controls are gathered by the master device and distribute stage by stage through the SYNC pin. To set a LM3464/64A in master mode, the voltage of the VLedFB pin must be set below 3.25V. When the VLedFB pin is connected to VCC, the device is in slave mode. In slave mode, local thermal foldback and PWM controls are overridden by the packaged synchronization signal delivered from the master. 30115043 FIGURE 12. Additional Resistor Across GDx and SEx for Cable Harness Over 1m Long CONNECTION TO LED ARRAYS When LEDs are connected to the LM3464/64A driver stage through long cables, the parasitic components of the cable www.national.com 16 LM3464/64A 30115061 FIGURE 13. Additional Voltage Clamping Circuits for VRAIL(peak) > 80V/95V (LM3464/64A) pin voltages are not violated. For instant, the DRx pins are required to clamp at 75V and a 500mW/75V zener diode CMHZ5267B from Central Semiconductor is used. The reverse current of the CMHZ5267B is specified 1.7mA at 75V zener voltage. The maximum allowable reverse current is 6.67mA as the power rating of the CMHZ5276B is 500mW. Given that the input current of the DRx pins of the LM3464/64A at 100V is 63uA maximum, if the DRx pin voltage is below 100V the current flows into the DRx pin (IDRx) is below 63uA. In order to reserve operation margin for component variations, IDRx is assumed equal to 63uA in the following calculations. Because VRAIL(peak) is the possible highest voltage at the DRx pins, the maximum resistance of RDRx can be obtained following this equation: APPLICATIONS WITH HIGH RAIL VOLTAGE The normal operation voltage of the LM3464 and LM3464A are rated to 80V and 95V respectively, applying voltage over the operation voltage limit to the LM3464/64A can damage the device permanently. In applications that the rail voltage is higher than the operation voltage limited of the device (80V for LM3464, 95V for LM3464A), voltage clamping circuits must be added externally to ensure the voltage limits of all the pins of the LM3464/64A are not violated. Figure 13 shows a typical application circuit with 150V peak rail voltage. In figure 13, Z1, Z2, Z3, Z4 and ZIN are zener diodes for clamping the DRx pin voltage and input voltage (VIN pin) of the LM3464/64A. The reverse voltage of the zener diodes must be below 80V for LM3464 and 95V for LM3464A. The resistors RDR1, RDR2, RDR3, RDR4 and RIN are resistors for absorbing the voltage difference between the clamping voltage of the zener diodes and the rail voltage. Calculating the Values of Zx and RDRx: The resistance of the RDRx must be properly selected according to the reverse current of the zener diode and input current of the DRx pins of the LM3464/64A to secure the allowable Where VZ and IZ are the reverse voltage and current of the zener diode Zx respectively. 17 www.national.com LM3464/64A are 3mA and 700uA respectively, in order to ensure the voltage of the VIN pin is clamped close to 75V even when the LM3464/64A is disabled, a 1.5W/75V zener diode CMZ5946B from Central Semiconductor is used to ensure adequate conduction current for ZIN. The reverse current of the CMZ5946B is specified 5mA at 75V, so the allowable current flows through ZIN is in between 5mA to 20mA. The value of RIN is governed by the following equations: For VRAIL(peak) = 150V, the maximum value of RDRx is: And the minimum value of RDRx is: Maximum value of RIN: Thus, the value of RDRx must be selected in the range: Minimum value of RIN: To minimize power dissipation on the zener diodes, a standard 42.2kΩ resistor can be used for the RDRx. Because the resistors, RDRx are used to absorb the power being introduced by the voltage difference between VRAIL and VZx, the maximum power dissipation on every RDRx equals to: So the value of RIN must be in the range: To minimize power dissipations on both the ZIN and RIN, a standard 9.31kΩ resistor can be selected for the RIN. Then the maximum power dissipation on RIN is: Thus, a standard 42.2kΩ resistor with 0.25W power rating (1206 package) and 1% tolerance can be used. Calculating the Values of ZIN and RIN: Similar to the requirements of selecting the Zx and RDRx, the voltage at the VIN pin of the LM3464/64A is clamped to 75V by a voltage clamping circuit consists of ZIN and RIN. Because the maximum operating and shut-down current (VEN < 2.1V) www.national.com Thus, a standard 9.38kΩ resistor with 2512 package (1W) and 1% tolerance can be used. 18 19 FIGURE 14. Cascade Operation with Thermal Foldback Control 30115022 LM3464/64A Additional Application Circuit www.national.com LM3464/64A Physical Dimensions inches (millimeters) unless otherwise noted 28-Lead eTSSOP Package NS Package Number MXA28A www.national.com 20 LM3464/64A Notes 21 www.national.com LM3464/LM3464A LED Driver with Dynamic Headroom Control and Thermal Control Interfaces Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage References www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Applications & Markets www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise® Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagic™ www.national.com/solarmagic PLL/VCO www.national.com/wireless www.national.com/training PowerWise® Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright© 2010 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Technical Support Center Email: [email protected] Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Technical Support Center Email: [email protected] National Semiconductor Asia Pacific Technical Support Center Email: [email protected] National Semiconductor Japan Technical Support Center Email: [email protected]