54F/74F398 # 54F/74F399 Quad 2-Port Register General Description Features The ’F398 and ’F399 are the logical equivalents of a quad 2-input multiplexer feeding into four edge-triggered flipflops. A common Select input determines which of the two 4-bit words is accepted. The selected data enters the flipflops on the rising edge of the clock. The ’F399 is the 16-pin version of the ’F398, with only the Q outputs of the flip-flops available. Y Commercial Y Y Y Package Number Military Select inputs from two data sources Fully positive edge-triggered operation Both true and complement outputsÐ’F398 Guaranteed 4000V minimum ESD protectionÐ’F399 Package Description N20A 20-Lead (0.300× Wide) Molded Dual-In-Line 54F398DM (Note 2) J20A 20-Lead Ceramic Dual-In-Line M20B 20-Lead (0.300× Wide) Molded Small Outline, JEDEC 54F398FM (Note 2) W20A 20-Lead Cerpack 74F398PC 74F398SC (Note 1) 54F398LM (Note 2) 74F399PC 54F399DM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C N20A 20-Lead (0.300× Wide) Molded Dual-In-Line J20A 20-Lead Ceramic Dual-In-Line 74F399SC (Note 1) M20B 20-Lead (0.300× Wide) Molded Small Outline, JEDEC 74F399SJ (Note 1) M20D 20-Lead (0.300× Wide) Molded Small Outline, EIAJ 54F399FM (Note 2) W20A 20-Lead Cerpack 54F399LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C Note 1: Devices also available in 13× reel. Use suffix e SCX and SJX. Note 2: Military grade device with environmental and burn-in processing. Use suffix e DMQB, FMQB and LMQB. Connection Diagrams ’F398 Pin Assignment for LCC Pin Assignment for DIP, SOIC and Flatpak TL/F/9533 – 5 TL/F/9533 – 6 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/9533 RRD-B30M75/Printed in U. S. A. 54F/74F398 # 54F/74F399 Quad 2-Port Register May 1995 Connection Diagrams (Continued) ’F399 TL/F/9533 – 8 TL/F/9533–7 Logic Symbols ’F398 IEEE/IEC ’F398 TL/F/9533–2 ’F399 TL/F/9533 – 1 ’F399 TL/F/9533–4 TL/F/9533 – 3 Unit Loading/Fan Out 54F/74F Pin Names S CP I0a – I0d I1a – I1d Qa – Qd Qa – Qd Description U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL Common Select Input Clock Pulse Input (Active Rising Edge) Data Inputs from Source 0 Data Inputs from Source 1 Register True Outputs Register Complementary Outputs (’F398) 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 50/33.3 50/33.3 20 mA/b0.6 mA 20 mA/b0.6 mA 20 mA/b0.6 mA 20 mA/b0.6 mA b 1 mA/20 mA b 1 mA/20 mA 2 Function Table Functional Description The ’F398 and ’F399 are high-speed quad 2-port registers. They select four bits of data from either of two sources (Ports) under control of a common Select input (S). The selected data is transferred to a 4-bit output register synchronous with the LOW-to-HIGH transition of the Clock input (CP). The 4-bit D-type output register is fully edge-triggered. The Data inputs (I0x, I1x) and Select input (S) must be stable only a setup time prior to and hold time after the LOW-to-HIGH transition of the Clock input for predictable operation. The ’F398 has both Q and Q outputs. Inputs Outputs S I0 I1 Q Q* I I h h I h X X X X I h L H L H H L H L H e HIGH Voltage Level L e LOW Voltage Level h e HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock transition I e LOW Voltage Level one setup time prior to the LOW-to-HIGH clock transition X e Immaterial *’F398 only Logic Diagram TL/F/9533 – 9 *’F398 Only Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Storage Temperature b 65§ C to a 150§ C Ambient Temperature under Bias Junction Temperature under Bias Plastic b 55§ C to a 125§ C Free Air Ambient Temperature Military Commercial b 55§ C to a 125§ C 0§ C to a 70§ C Supply Voltage Military Commercial b 55§ C to a 175§ C b 55§ C to a 150§ C a 4.5V to a 5.5V a 4.5V to a 5.5V VCC Pin Potential to Ground Pin b 0.5V to a 7.0V b 0.5V to a 7.0V Input Voltage (Note 2) b 30 mA to a 5.0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0.5V to VCC Standard Output b 0.5V to a 5.5V TRI-STATEÉ Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) ESD Last Passing Voltage (Min)Ð’F399 4000V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol 54F/74F Parameter Min VIH Input HIGH Voltage VIL Input LOW Voltage VCD Input Clamp Diode Voltage VOH Output HIGH Voltage 54F 10% VCC 74F 10% VCC 74F 5% VCC VOL Output LOW Voltage 54F 10% VCC 74F 10% VCC IIH Input HIGH Current IBVI Typ Units VCC Conditions Max 2.0 V Recognized as a HIGH Signal 0.8 V b 1.2 V Min IIN e b18 mA V Min IOH e b1 mA IOH e b1 mA IOH e b1 mA 0.5 0.5 V Min IOL e 20 mA IOL e 20 mA 54F 74F 20.0 5.0 mA Max VIN e 2.7V Input HIGH Current Breakdown Test 54F 74F 100 7.0 mA Max VIN e 7.0V ICEX Output HIGH Leakage Current 54F 74F 250 50 mA Max VOUT e VCC VID Input Leakage Test 74F V 0.0 IID e 1.9 mA All Other Pins Grounded IOD Output Leakage Circuit Current 74F 3.75 mA 0.0 VIOD e 150 mV All Other Pins Grounded IIL Input LOW Current IOS Output Short-Circuit Current ICCH Power Supply Current (’F398) ICCL 2.5 2.5 2.7 4.75 Recognized as a LOW Signal b 0.6 mA Max VIN e 0.5V b 150 mA Max VOUT e 0V 25 38 mA Max VO e HIGH Power Supply Current (’F398) 25 38 mA Max VO e LOW ICCH Power Supply Current (’F399) 22 34 mA Max VO e HIGH ICCL Power Supply Current (’F399) 22 34 mA Max VO e LOW b 60 4 AC Electrical Characteristics Symbol Parameter 74F 54F 74F TA e a 25§ C VCC e a 5.0V CL e 50 pF TA, VCC e Mil CL e 50 pF TA, VCC e Com CL e 50 pF Min Min Min Typ fmax Input Clock Frequency 100 140 tPLH tPHL Propagation Delay CP to Q or Q 3.0* 3.0 5.7 6.8 Max Max 80 7.5 9.0 Max 100 3.0 3.0 9.5 11.5 Units MHz 3.0 3.0 8.5 10.0 ns *’F398 3.3 ns AC Operating Requirements Symbol Parameter 74F 54F 74F TA e a 25§ C VCC e a 5.0V TA, VCC e Mil TA, VCC e Com Min Min Min Max Max ts(H) ts(L) Setup Time, HIGH or LOW In to CP 3.0 3.0 4.5 4.5 3.0 3.0 th(H) th(L) Hold Time, HIGH or LOW In to CP 1.0 1.0 1.5 1.5 1.0 1.0 ts(H) ts(L) Setup Time, HIGH or LOW S to CP (’F398) 7.5 7.5 10.5 10.5 8.5 8.5 ts(H) ts(L) Setup Time, HIGH or LOW S to CP (’F399) 7.5 7.5 9.5 9.5 8.5 8.5 th(H) th(L) Hold Time, HIGH or LOW S to CP 0 0 0 0 0 0 tw(H) tw(L) CP Pulse Width HIGH or LOW 4.0 5.0 4.0 7.0 4.0 5.0 5 Units Max ns ns ns Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74F 398/399 Temperature Range Family 74F e Commercial 54F e Military S C X Special Variations QB e Military grade device with environmental and burn-in processing X e Devices shipped in 13× reel Device Type Package Code P e Plastic DIP D e Ceramic DIP F e Flatpak L e Leadless Chip Carrier (LCC) S e Small Outline SOIC JEDEC SJ e Small Outline SOIC EIAJ (74F399 only) Temperature Range C e Commercial (0§ C to a 70§ C) M e Military (b55§ C to a 125§ C) 6 Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L) NS Package Number E20A 20-Lead Ceramic Dual-In-Line Package (D) NS Package Number J20A 7 Physical Dimensions inches (millimeters) (Continued) 20-Lead (0.300× Wide) Molded Small Outline Package, JEDEC (S) NS Package Number M20B 20-Lead (0.300× Wide) Molded Small Outline Package, EIAJ (SJ) NS Package Number M20D 8 Physical Dimensions inches (millimeters) (Continued) 20-Lead (0.300× Wide) Molded Dual-In-Line Package (P) NS Package Number N20A 9 54F/74F398 # 54F/74F399 Quad 2-Port Register Physical Dimensions inches (millimeters) (Continued) 20-Lead Ceramic Flatpak (F) NS Package Number W20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 2900 Semiconductor Drive P.O. Box 58090 Santa Clara, CA 95052-8090 Tel: 1(800) 272-9959 TWX: (910) 339-9240 National Semiconductor GmbH Livry-Gargan-Str. 10 D-82256 F4urstenfeldbruck Germany Tel: (81-41) 35-0 Telex: 527649 Fax: (81-41) 35-1 National Semiconductor Japan Ltd. Sumitomo Chemical Engineering Center Bldg. 7F 1-7-1, Nakase, Mihama-Ku Chiba-City, Ciba Prefecture 261 Tel: (043) 299-2300 Fax: (043) 299-2500 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductores Do Brazil Ltda. Rue Deputado Lacorda Franco 120-3A Sao Paulo-SP Brazil 05418-000 Tel: (55-11) 212-5066 Telex: 391-1131931 NSBR BR Fax: (55-11) 212-1181 National Semiconductor (Australia) Pty, Ltd. Building 16 Business Park Drive Monash Business Park Nottinghill, Melbourne Victoria 3168 Australia Tel: (3) 558-9999 Fax: (3) 558-9998 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.