NSC LMP7702MMX

LMP7701/LMP7702/LMP7704
Precision, CMOS Input, RRIO, Wide Supply Range
Amplifiers
General Description
Features
The LMP7701/LMP7702/LMP7704 are single, dual, and
quad low offset voltage, rail-to-rail input and output precision
amplifiers each with CMOS input stage and wide supply
voltage range. The LMP7701/LMP7702/LMP7704 are part of
the LMP™ precision amplifier family and are ideal for sensor
interface and other instrumentation applications.
The guaranteed low offset voltage of less than ± 200 µV
along with the guaranteed low input bias current of less than
± 1 pA make the LMP7701 ideal for precision applications.
The LMP7701/LMP7702/LMP7704 are built utilizing VIP50
technology, which allows the combination of a CMOS input
stage and a 12V common mode and supply voltage range.
This makes the LMP7701/LMP7702/LMP7704 great choices
in many applications where conventional CMOS parts cannot operate under the desired voltage conditions.
The LMP7701/LMP7702/LMP7704 have a rail-to-rail input
stage that significantly reduces the CMRR glitch commonly
associated with rail-to-rail input amplifiers. This is achieved
by trimming both sides of the complimentary input stage,
thereby reducing the difference between the NMOS and
PMOS offsets. The output of the LMP7701/LMP7702/
LMP7704 swings within 40 mV of either rail to maximize the
signal dynamic range in applications requiring low supply
voltage.
The LMP7701 is offered in the space saving 5-Pin SOT23
package, the LMP7702 is offered in the 8-Pin MSOP, and the
quad LMP7704 is offered in the 14-Pin TSSOP package.
These small packages are ideal solutions for area constrained PC boards and portable electronics.
Unless otherwise noted, typical values at VS = 5V
± 200 µV (max)
n Input offset voltage (LMP7701)
n Input offset voltage (LMP7702/LMP7704) ± 220 µV (max)
± 200 fA
n Input bias current
n Input voltage noise
9 nV/
n CMRR
130 dB
n Open loop gain
130 dB
n Temperature range
−40˚C to 125˚C
n Unity gain bandwidth
2.5 MHz
n Supply current (LMP7701)
715 µA
n Supply current (LMP7702)
1.5 mA
n Supply current (LMP7704)
2.9 mA
n Supply voltage range
2.7V to 12V
n Rail-to-rail input and output
Applications
n
n
n
n
n
n
High impedance sensor interface
Battery powered instrumentation
High gain amplifiers
DAC buffer
Instrumentation amplifier
Active filters
Typical Application
20127305
Precision Current Source
LMP™ is a trademark of National Semiconductor Corporation.
© 2006 National Semiconductor Corporation
DS201273
www.national.com
LMP7701/LMP7702/LMP7704 Precision, CMOS Input, RRIO, Wide Supply Range Amplifiers
October 2006
LMP7701/LMP7702/LMP7704
Absolute Maximum Ratings (Note 1)
Soldering Information
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Infrared or Convection (20 sec)
235˚C
Wave Soldering Lead Temp. (10
sec)
260˚C
ESD Tolerance (Note 2)
Human Body Model
2000V
Machine Model
Operating Ratings (Note 1)
200V
Temperature Range (Note 3)
± 300 mV
VIN Differential
Supply Voltage (VS = V+ – V−)
Voltage at Input/Output Pins
+
Supply Voltage (VS = V – V )
13.2V
10 mA
Storage Temperature Range
−65˚C to +150˚C
Junction Temperature (Note 3)
3V Electrical Characteristics
2.7V to 12V
Package Thermal Resistance (θJA (Note 3))
V++ 0.3V, V− − 0.3V
Input Current
−40˚C to +125˚C
−
+150˚C
5-Pin SOT23
265˚C/W
8-Pin MSOP
235˚C/W
14-Pin TSSOP
122˚C/W
(Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25˚C, V+ = 3V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
VOS
Parameter
Input Offset Voltage
Conditions
Typ
(Note 5)
Max
(Note 6)
LMP7701
± 37
LMP7702/LMP7704
± 56
±1
± 0.2
± 200
± 500
± 220
± 520
±5
±1
± 50
±1
± 400
TCVOS
Input Offset Voltage Drift
(Note 7)
IB
Input Bias Current
(Notes 7, 8)
−40˚C ≤ TA ≤ 85˚C
Min
(Note 6)
± 0.2
(Notes 7, 8)
−40˚C ≤ TA ≤ 125˚C
IOS
Input Offset Current
CMRR
Common Mode Rejection Ratio
40
0V ≤ VCM ≤ 3V
LMP7701
86
80
130
0V ≤ VCM ≤ 3V
LMP7702/LMP7704
84
78
130
86
82
98
PSRR
Power Supply Rejection Ratio
2.7V ≤ V+ ≤ 12V, Vo = V+/2
CMVR
Input Common-Mode Voltage Range
CMRR ≥ 80 dB
CMRR ≥ 77 dB
–0.2
–0.2
AVOL
Large Signal Voltage Gain
RL = 2 kΩ (LMP7701)
VO = 0.3V to 2.7V
100
96
114
RL = 2 kΩ (LMP7702/LMP7704)
VO = 0.3V to 2.7V
100
94
114
RL = 10 kΩ
VO = 0.2V to 2.8V
100
96
124
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2
Units
µV
µV/˚C
pA
fA
dB
dB
3.2
3.2
V
dB
(Note 4)
(Continued)
Unless otherwise specified, all limits are guaranteed for TA = 25˚C, V+ = 3V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
VO
Parameter
Output Swing High
Output Swing Low
IO
Output Short Circuit Current
(Notes 3, 9)
Conditions
Typ
(Note 5)
Max
(Note 6)
RL = 2 kΩ to V+/2
LMP7701
40
80
120
RL = 2 kΩ to V+/2
LMP7702/LMP7704
40
80
150
RL = 10 kΩ to V+/2
LMP7701
30
40
60
RL = 10 kΩ to V+/2
LMP7702/LMP7704
35
50
100
RL = 2 kΩ to V+/2
LMP7701
40
60
80
RL = 2 kΩ to V+/2
LMP7702/LMP7704
45
100
170
RL = 10 kΩ to V+/2
LMP7701
20
40
50
RL = 10 kΩ to V+/2
LMP7702/LMP7704
20
50
90
Sourcing VO = V+/2
VIN = 100 mV
25
15
42
Sinking VO = V+/2
VIN = −100 mV (LMP7701)
25
20
42
25
15
42
+
Sinking VO = V /2
VIN = −100 mV
(LMP7702/LMP7704)
Supply Current
IS
SR
Slew Rate (Note 10)
Min
(Note 6)
Units
mV
from V+
mV
mA
LMP7701
0.670
1.0
1.2
LMP7702
1.4
1.8
2.1
LMP7704
2.9
3.5
4.5
AV = +1, VO = 2 VPP
10% to 90%
0.9
V/µs
2.5
MHz
f = 1 kHz, AV = 1, R.L = 10 kΩ
0.02
%
mA
GBW
Gain Bandwidth Product
THD+N
Total Harmonic Distortion + Noise
en
Input-Referred Voltage Noise
f = 1 kHz
9
nV/
in
Input-Referred Current Noise
f = 100 kHz
1
fA/
5V Electrical Characteristics
(Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25˚C, V+ = 5V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
VOS
TCVOS
Parameter
Input Offset Voltage
Input Offset Voltage Drift
Conditions
Typ
(Note 5)
Max
(Note 6)
LMP7701
± 37
LMP7702/LMP7704
± 32
(Note 7)
±1
± 200
± 500
± 220
± 520
±5
3
Min
(Note 6)
Units
µV
µV/˚C
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LMP7701/LMP7702/LMP7704
3V Electrical Characteristics
LMP7701/LMP7702/LMP7704
5V Electrical Characteristics
(Note 4)
(Continued)
Unless otherwise specified, all limits are guaranteed for TA = 25˚C, V+ = 5V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
IB
Parameter
Input Bias Current
IOS
Input Offset Current
CMRR
Common Mode Rejection Ratio
Conditions
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
(Notes 7, 8)
−40˚C ≤ TA ≤ 85˚C
± 0.2
(Notes 7, 8)
−40˚C ≤ TA ≤ 125˚C
± 0.2
±1
± 50
±1
± 400
40
0V ≤ VCM ≤ 5V
LMP7701
88
83
130
0V ≤ VCM ≤ 5V
LMP7702/LMP7704
86
81
130
86
82
100
PSRR
Power Supply Rejection Ratio
2.7V ≤ V+ ≤ 12V, VO = V+/2
CMVR
Input Common-Mode Voltage Range
CMRR ≥ 80 dB
CMRR ≥ 78 dB
–0.2
–0.2
AVOL
Large Signal Voltage Gain
RL = 2 kΩ (LMP7701)
VO = 0.3V to 4.7V
100
96
119
RL = 2 kΩ (LMP7702/LMP7704)
VO = 0.3V to 4.7V
100
94
119
RL = 10 kΩ
VO = 0.2V to 4.8V
100
96
130
VO
Output Swing High
Output Swing Low
IO
Output Short Circuit Current
(Notes 3, 9)
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dB
dB
60
110
130
RL = 2 kΩ to V+/2
LMP7702/LMP7704
60
120
200
RL = 10 kΩ to V+/2
LMP7701
40
50
70
RL = 10 kΩ to V+/2
LMP7702/LMP7704
40
60
120
RL = 2 kΩ to V+/2
LMP7701
50
80
90
RL = 2 kΩ to V+/2
LMP7702/LMP7704
50
120
190
RL = 10 kΩ to V+/2
LMP7701
30
40
50
RL = 10 kΩ to V+/2
LMP7702/LMP7704
30
50
100
66
Sourcing VO = V+/2
VIN = 100 mV
(LMP7702/LMP7704)
38
25
66
Sinking VO = V+/2
VIN = −100 mV (LMP7701)
40
28
76
Sinking VO = V+/2
VIN = −100 mV
(LMP7702/LMP7704)
40
23
76
4
V
dB
RL = 2 kΩ to V+/2
LMP7701
40
28
pA
fA
5.2
5.2
Sourcing VO = V+/2
VIN = 100 mV (LMP7701)
Units
mV
from V+
mV
mA
(Note 4)
(Continued)
Unless otherwise specified, all limits are guaranteed for TA = 25˚C, V+ = 5V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Supply Current
IS
SR
Slew Rate (Note 10)
Conditions
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
LMP7701
0.715
1.0
1.2
LMP7702
1.5
1.9
2.2
LMP7704
2.9
3.7
4.6
AV = +1, VO = 4 VPP
10% to 90%
1.0
2.5
MHz
f = 1 kHz, AV = 1, RL = 10 kΩ
0.02
%
mA
V/µs
GBW
Gain Bandwidth Product
THD+N
Total Harmonic Distortion + Noise
en
Input-Referred Voltage Noise
f = 1 kHz
9
nV/
in
Input-Referred Current Noise
f = 100 kHz
1
fA/
± 5V Electrical Characteristics (Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25˚C, V+ = 5V, V− = −5V, VCM = 0V, and RL > 10 kΩ to 0V.
Boldface limits apply at the temperature extremes.
Symbol
VOS
Parameter
Input Offset Voltage
Conditions
Typ
(Note 5)
Max
(Note 6)
LMP7701
± 37
LMP7702/LMP7704
± 37
±1
± 0.2
± 200
± 500
± 220
± 520
±5
TCVOS
Input Offset Voltage Drift
(Note 7)
IB
Input Bias Current
(Notes 7, 8)
−40˚C ≤ TA ≤ 85˚C
Min
(Note 6)
± 0.2
IOS
Input Offset Current
CMRR
Common Mode Rejection Ratio
1
± 400
40
−5V ≤ VCM ≤ 5V
LMP7701
92
88
138
−5V ≤ VCM ≤ 5V
LMP7702/LMP7704
90
86
138
86
82
98
PSRR
Power Supply Rejection Ratio
2.7V ≤ V+ ≤ 12V, VO = 0V
CMVR
Input Common-Mode Voltage
Range
CMRR ≥ 80 dB
CMRR ≥ 78 dB
−5.2
−5.2
AVOL
Large Signal Voltage Gain
RL = 2 kΩ (LMP7701)
VO = −4.7V to 4.7V
100
98
121
RL = 2 kΩ (LMP7702/LMP7704)
VO = −4.7V to 4.7V
100
94
121
RL = 10 kΩ (LMP7701)
VO = −4.8V to 4.8V
100
98
134
RL = 10 kΩ (LMP7702/LMP7704)
VO = −4.8V to 4.8V
100
97
134
5
µV
µV/˚C
1
± 50
(Notes 7, 8)
−40˚C ≤ TA ≤ 125˚C
Units
pA
fA
dB
dB
5.2
5.2
V
dB
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LMP7701/LMP7702/LMP7704
5V Electrical Characteristics
LMP7701/LMP7702/LMP7704
± 5V Electrical Characteristics (Note 4)
(Continued)
Unless otherwise specified, all limits are guaranteed for TA = 25˚C, V+ = 5V, V− = −5V, VCM = 0V, and RL > 10 kΩ to 0V.
Boldface limits apply at the temperature extremes.
Symbol
VO
Parameter
Output Swing High
Output Swing Low
IO
IS
Output Short Circuit Current
(Notes 3, 9)
Supply Current
Conditions
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
RL = 2 kΩ to 0V
LMP7701
90
150
170
RL = 2 kΩ to 0V
LMP7702/LMP7704
90
180
290
RL = 10 kΩ to 0V
LMP7701
40
80
100
RL = 10 kΩ to 0V
LMP7702/LMP7704
40
80
150
RL = 2 kΩ to 0V
LMP7701
90
130
150
RL = 2 kΩ to 0V
LMP7702/LMP7704
90
180
290
RL = 10 kΩ to 0V
LMP7701
40
50
60
RL = 10 kΩ to 0V
LMP7702/LMP7704
40
60
110
Sourcing VO = 0V
VIN = 100 mV (LMP7701)
50
35
86
Sourcing VO = 0V
VIN = 100 mV
(LMP7702/LMP7704)
48
33
86
Sinking VO = 0V
VIN = −100 mV
50
35
84
Units
mV
from V+
mV
from V–
mA
LMP7701
0.790
1.1
1.3
LMP7702
1.7
2.1
2.5
LMP7704
3.2
4.2
5.0
AV = +1, VO = 9 VPP
10% to 90%
1.1
V/µs
2.5
MHz
f = 1 kHz, AV = 1, RL = 10 kΩ
0.02
%
mA
SR
Slew Rate (Note 10)
GBW
Gain Bandwidth Product
THD+N
Total Harmonic Distortion + Noise
en
Input-Referred Voltage Noise
f = 1 kHz
9
nV/
in
Input-Referred Current Noise
f = 100 kHz
1
fA/
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables.
Note 2: Human Body Model is 1.5 kΩ in series with 100 pF. Machine Model is 0Ω in series with 200 pF.
Note 3: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.
Note 4: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
the device.
Note 5: Typical values represent the parametric norm at the time of characterization.
Note 6: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality
Control (SQC) method.
Note 7: Guaranteed by design.
Note 8: Positive current corresponds to current flowing into the device.
Note 9: The short circuit test is a momentary test.
Note 10: The number specified is the slower of positive and negative slew rates.
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6
LMP7701/LMP7702/LMP7704
Connection Diagrams
5-Pin SOT23
8-Pin MSOP
14-Pin TSSOP
20127303
20127302
Top View
Top View
20127304
Top View
Ordering Information
Package
5-Pin SOT23
8-Pin MSOP
14-Pin TSSOP
Part Number
LMP7701MF
LMP7701MFX
LMP7702MM
LMP7702MMX
LMP7704MT
LMP7704MTX
Package Marking
Transport Media
1k Units Tape and Reel
AC2A
3k Units Tape and Reel
1k Units Tape and Reel
AA3A
3.5k Units Tape and Reel
LMP7704MT
7
94 Units/Rail
2.5k Units Tape and Reel
NSC Drawing
MF05A
MUA08A
MTC14
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LMP7701/LMP7702/LMP7704
Typical Performance Characteristics
Unless otherwise noted: TA = 25˚C, VCM = VS/2, RL > 10 kΩ.
TCVOS Distribution
Offset Voltage Distribution
20127336
20127341
Offset Voltage Distribution
TCVOS Distribution
20127337
20127342
Offset Voltage Distribution
TCVOS Distribution
20127338
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20127343
8
(Continued)
Offset Voltage vs. Temperature
CMRR vs Frequency
20127306
20127350
Offset Voltage vs. Supply Voltage
Offset Voltage vs. VCM
20127307
20127310
Offset Voltage vs. VCM
Offset Voltage vs. VCM
20127308
20127309
9
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LMP7701/LMP7702/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VCM = VS/2, RL > 10 kΩ.
LMP7701/LMP7702/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VCM = VS/2, RL > 10 kΩ.
(Continued)
Input Bias Current vs. VCM
Input Bias Current vs. VCM
20127330
20127346
Input Bias Current vs. VCM
Input Bias Current vs. VCM
20127331
20127347
Input Bias Current vs. VCM
Input Bias Current vs. VCM
20127348
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20127349
10
(Continued)
PSRR vs. Frequency
Supply Current vs. Supply Voltage (Per Channel)
20127345
20127311
Sinking Current vs. Supply Voltage
Sourcing Current vs. Supply Voltage
20127313
20127312
Output Voltage vs. Output Current
Slew Rate vs. Supply Voltage
20127316
20127317
11
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LMP7701/LMP7702/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VCM = VS/2, RL > 10 kΩ.
LMP7701/LMP7702/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VCM = VS/2, RL > 10 kΩ.
(Continued)
Open Loop Frequency Response
Open Loop Frequency Response
20127315
20127314
Large Signal Step Response
Small Signal Step Response
20127318
20127320
Large Signal Step Response
Small Signal Step Response
20127326
20127319
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12
(Continued)
Input Voltage Noise vs. Frequency
Open Loop Gain vs. Output Voltage Swing
20127327
20127352
Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
20127333
20127335
Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
20127332
20127334
13
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LMP7701/LMP7702/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VCM = VS/2, RL > 10 kΩ.
LMP7701/LMP7702/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VCM = VS/2, RL > 10 kΩ.
(Continued)
THD+N vs. Frequency
THD+N vs. Output Voltage
20127328
20127329
Crosstalk Rejection Ratio vs. Frequency
(LMP7702/LMP7704)
20127353
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14
LMP7701/LMP7702/LMP7704
The LMP7701/LMP7702/LMP7704 are single, dual, and
quad low offset voltage, rail-to-rail input and output precision
amplifiers each with CMOS input stage and wide supply
voltage range of 2.7V to 12V. The LMP7701/LMP7702/
LMP7704 have a very low input bias current of only ± 200 fA
at room temperature.
The wide supply voltage range of 2.7V to 12V over the
extensive temperature range of −40˚C to 125˚C makes the
LMP7701/LMP7702/LMP7704 excellent choices for low voltage precision applications with extensive temperature requirements.
The LMP7701/LMP7702/LMP7704 have only ± 37 µV of typical input referred offset voltage and this offset is guaranteed
to be less than ± 500 µV for the single and ± 520 µV for the
dual and quad, over temperature. This minimal offset voltage
allows more accurate signal detection and amplification in
precision applications.
The low input bias current of only ± 200 fA along with the low
give the LMP7701/
input referred voltage noise of 9 nV/
LMP7702/LMP7704 superiority for use in sensor applications. Lower levels of noise introduced by the amplifier mean
better signal fidelity and a higher signal-to-noise ratio.
National Semiconductor is heavily committed to precision
amplifiers and the market segment they serve. Technical
support and extensive characterization data is available for
sensitive applications or applications with a constrained error
budget.
The LMP7701 is offered in the space saving 5-Pin SOT23
package, the LMP7702 comes in the 8-pin MSOP, and the
LMP7704 is offered in the 14-Pin TSSOP package. These
small packages are ideal solutions for area constrained PC
boards and portable electronics.
20127321
FIGURE 1. Isolating Capacitive Load
INPUT CAPACITANCE
CMOS input stages inherently have low input bias current
and higher input referred voltage noise. The LMP7701/
LMP7702/LMP7704 enhance this performance by having
the low input bias current of only ± 200 fA, as well as, a very
. In order to
low input referred voltage noise of 9 nV/
achieve this a larger input stage has been used. This larger
input stage increases the input capacitance of the LMP7701/
LMP7702/ LMP7704. The typical value of this input capacitance, CIN, for the LMP7701/LMP7702/LMP7704 is 25 pF.
The input capacitance will interact with other impedances
such as gain and feedback resistors, which are seen on the
inputs of the amplifier, to form a pole. This pole will have little
or no effect on the output of the amplifier at low frequencies
and DC conditions, but will play a bigger role as the frequency increases. At higher frequencies, the presence of
this pole will decrease phase margin and will also cause gain
peaking. In order to compensate for the input capacitance,
care must be taken in choosing the feedback resistors. In
addition to being selective in picking values for the feedback
resistor, a capacitor can be added to the feedback path to
increase stability.
The DC gain of the circuit shown in Figure 2 is simply
–R2/R1.
CAPACITIVE LOAD
The LMP7701/LMP7702/LMP7704 can each be connected
as a non-inverting unity gain follower. This configuration is
the most sensitive to capacitive loading.
The combination of a capacitive load placed on the output of
an amplifier along with the amplifier’s output impedance
creates a phase lag which in turn reduces the phase margin
of the amplifier. If the phase margin is significantly reduced,
the response will be either underdamped or it will oscillate.
In order to drive heavier capacitive loads, an isolation resistor, RISO, in Figure 1 should be used. By using this isolation
resistor, the capacitive load is isolated from the amplifier’s
output, and hence, the pole caused by CL is no longer in the
feedback loop. The larger the value of RISO, the more stable
the output voltage will be. If values of RISO are sufficiently
large, the feedback loop will be stable, independent of the
value of CL. However, larger values of RISO result in reduced
output swing and reduced output current drive.
20127344
FIGURE 2. Compensating for Input Capacitance
For the time being, ignore CF. The AC gain of the circuit in
Figure 2 can be calculated as follows:
15
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LMP7701/LMP7702/LMP7704
Application Information
LMP7701/LMP7702/LMP7704
Application Information
nates the gain peaking that can be caused by having a larger
feedback resistor. Figure 4 shows how CF reduces gain
peaking.
(Continued)
This equation is rearranged to find the location of the two
poles:
(1)
As shown in Equation (1), as values of R1 and R2 are
increased, the magnitude of the poles is reduced, which in
turn decreases the bandwidth of the amplifier. Whenever
possible, it is best to choose smaller feedback resistors.
Figure 3 shows the effect of feedback resistor on the
LMP7701/LMP7702/LMP7704 bandwidth.
20127355
FIGURE 4. Closed Loop Gain vs. Frequency with
Compensation
DIODES BETWEEN THE INPUTS
The LMP7701/LMP7702/LMP7704 have a set of anti-parallel
diodes between the input pins, as shown in Figure 5. These
diodes are present to protect the input stage of the amplifier.
At the same time, they limit the amount of differential input
voltage that is allowed on the input pins. A differential signal
larger than one diode voltage drop might damage the diodes. The differential signal between the inputs needs to be
limited to ± 300 mV or the input current needs to be limited to
± 10 mA.
20127354
FIGURE 3. Closed Loop Gain vs. Frequency
Equation (1) has two poles. In most cases, it is the presence
of pairs of poles that causes gain peaking. In order to eliminate this effect, the poles should be placed in Butterworth
position, since poles in Butterworth position do not cause
gain peaking. To achieve a Butterworth pair, the quantity
under the square root in Equation (1) should be set to equal
−1. Using this fact and the relation between R1 and R2, R2 =
−AV R1, the optimum value for R1 can be found. This is
shown in Equation (2). If R1 is chosen to be larger than this
optimum value, gain peaking will occur.
20127325
FIGURE 5. Input of LMP7701
(2)
In Figure 2, CF is added to compensate for input capacitance
and to increase stability. Additionally, CF reduces or elimi-
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16
circuit is divided by the square root of the number of amplifiers used in this parallel combination. This is because each
individual amplifier acts as an independent noise source,
and the average noise of independent sources is the quadrature sum of the independent sources divided by the number
of sources. For N identical amplifiers, this means:
(Continued)
PRECISION CURRENT SOURCE
The LMP7701/LMP7702/LMP7704 can each be used as a
precision current source in many different applications. Figure 6 shows a typical precision current source. This circuit
implements a precision voltage controlled current source.
Amplifier A1 is a differential amplifier that uses the voltage
drop across RS as the feedback signal. Amplifier A2 is a
buffer that eliminates the error current from the load side of
the RS resistor that would flow in the feedback resistor if it
were connected to the load side of the RS resistor. In general, the circuit is stable as long as the closed loop bandwidth of amplifier A2 is greater then the closed loop bandwidth of amplifier A1. Note that if A1 and A2 are the same
type of amplifiers, then the feedback around A1 will reduce
its bandwidth compared to A2.
Figure 7 shows a schematic of this input voltage noise
reduction circuit. Typical resistor values are:
RG = 10Ω, RF = 1 kΩ, and RO = 1 kΩ.
20127305
FIGURE 6. Precision Current Source
The equation for output current can be derived as follows:
Solving for the current I results in the following equation:
LOW INPUT VOLTAGE NOISE
The LMP7701/LMP7702/LMP7704 have very low input volt. This input voltage noise can be
age noise of 9 nV/
further reduced by placing N amplifiers in parallel as shown
in Figure 7. The total voltage noise on the output of this
20127356
FIGURE 7. Noise Reduction circuit
17
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LMP7701/LMP7702/LMP7704
Application Information
LMP7701/LMP7702/LMP7704
Application Information
HIGH IMPEDANCE SENSOR INTERFACE
Many sensors have high source impedances that may range
up to 10 MΩ. The output signal of sensors often needs to be
amplified or otherwise conditioned by means of an amplifier.
The input bias current of this amplifier can load the sensor’s
output and cause a voltage drop across the source resistance as shown in Figure 9, where VIN+ = VS – IBIAS*RS
(Continued)
TOTAL NOISE CONTRIBUTION
The LMP7701/LMP7702/LMP7704 have very low input bias
current, very low input current noise, and very low input
voltage noise. As a result, these amplifiers are ideal choices
for circuits with high impedance sensor applications.
Figure 8 shows the typical input noise of the LMP7701/
LMP7702/LMP7704 as a function of source resistance
where:
en denotes the input referred voltage noise
ei is the voltage drop across source resistance due to input
referred current noise or ei = RS * in
The last term, IBIAS*RS, shows the voltage drop across RS.
To prevent errors introduced to the system due to this voltage, an op amp with very low input bias current must be
used with high impedance sensors. This is to keep the error
contribution by IBIAS*RS less than the input voltage noise of
the amplifier, so that it will not become the dominant noise
factor.
et shows the thermal noise of the source resistance
eni shows the total noise on the input.
Where:
The input current noise of the LMP7701/LMP7702/LMP7704
is so low that it will not become the dominant factor in the
total noise unless source resistance exceeds 300 MΩ, which
is an unrealistically high value.
As is evident in Figure 8, at lower RS values, total noise is
dominated by the amplifier’s input voltage noise. Once RS is
larger than a few kilo-Ohms, then the dominant noise factor
becomes the thermal noise of RS. As mentioned before, the
current noise will not be the dominant noise factor for any
practical application.
20127359
FIGURE 9. Noise Due to IBIAS
pH electrodes are very high impedance sensors. As their
name indicates, they are used to measure the pH of a
solution. They usually do this by generating an output voltage which is proportional to the pH of the solution. pH
electrodes are calibrated so that they have zero output for a
neutral solution, pH = 7, and positive and negative voltages
for acidic or alkaline solutions. This means that the output of
a pH electrode is bipolar and has to be level shifted to be
used in a single supply system. The rate of change of this
voltage is usually shown in mV/pH and is different for different pH sensors. Temperature is also an important factor in a
pH electrode reading. The output voltage of the senor will
change with temperature.
Figure 10 shows a typical output voltage spectrum of a pH
electrode. Note that the exact values of output voltage will be
different for different sensors. In this example, the pH electrode has an output voltage of 59.15 mV/pH at 25˚C.
20127358
FIGURE 8. Total Input Noise
20127360
FIGURE 10. Output Voltage of a pH Electrode
The temperature dependence of a typical pH electrode is
shown in Figure 11. As is evident, the output voltage
changes with changes in temperature.
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18
is used to measure the temperature of the solution and feeds
this reading to the Analog to Digital Converter, ADC. This
information is used by the ADC to calculate the temperature
effects on the pH readings. The LM35 needs to have a
resistor, RT in Figure 12, to –V+ in order to be able to read
temperatures below 0˚C. RT is not needed if temperatures
are not expected to go below zero.
(Continued)
The output of pH electrodes are usually large enough that
they don’t require much amplification; however, due to the
very high impedance, the output of a pH electrode needs to
be buffered before it can go to an ADC. Since most ADCs are
operated on single supply, the output of the pH electrode
also needs to be level shifted. Amplifier A1 buffers the output
of the pH electrode with a moderate gain of +2, while A2
provides the level shifting. VOUT at the output of A2 is given
by: VOUT = −2VpH + 1.024V.
LM4140A is a precision, low noise, voltage reference used to
provide the level shift needed. The ADC used in this application is the ADC12032 which is a 12-bit, 2 channel converter with multiplexers on the inputs and a serial output. The
12-bit ADC enables users to measure pH with an accuracy of
0.003 of a pH unit. Adequate power supply bypassing and
grounding is extremely important for ADCs. Recommended
bypass capacitors are shown in Figure 12. It is common to
share power supplies between different components in a
circuit. To minimize the effects of power supply ripples
caused by other components, the op amps need to have
bypass capacitors on the supply pins. Using the same value
capacitors as those used with the ADC are ideal. The combination of these three values of capacitors ensures that AC
noise present on the power supply line is grounded and does
not interfere with the amplifiers’ signal.
20127361
FIGURE 11. Temperature Dependence of a pH
Electrode
The schematic shown in Figure 12 is a typical circuit which
can be used for pH measurement. The LM35 is a precision
integrated circuit temperature sensor. This sensor is differentiated from similar products because it has an output
voltage linearly proportional to Celcius measurement, without the need to convert the temperature to Kelvin. The LM35
20127362
FIGURE 12. pH Measurement Circuit
19
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LMP7701/LMP7702/LMP7704
Application Information
LMP7701/LMP7702/LMP7704
Physical Dimensions
inches (millimeters) unless otherwise noted
5-Pin SOT23
NS Package Number MF05A
8-Pin MSOP
NS Package Number MUA08A
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20
inches (millimeters) unless otherwise noted (Continued)
14-Pin TSSOP
NS Package Number MTC14
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LMP7701/LMP7702/LMP7704 Precision, CMOS Input, RRIO, Wide Supply Range Amplifiers
Physical Dimensions
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LMP7701/LMP7702/LMP7704 Precision, CMOS Input, RRIO, Wide Supply Range Amplifiers