LMV841 CMOS Input, RRIO, Wide Supply Range Operational Amplifier General Description Features The LMV841 is a low-voltage and low-power operational amplifier that operates from supply voltages from 2.7V to 12V and has rail-to-rail input and output capability. The LMV841 is a low offset voltage and low supply current amplifier with MOS inputs, characteristics that make the LMV841 ideal for sensor interface and battery powered applications. The LMV841 is offered in the space saving 5-Pin SC70 package. This small package is an ideal solution for area constrained PC boards and portable electronics. Unless otherwise noted, typical values at TA = 25°C, V+ = 5V ■ Space saving 5-Pin SC70 package ■ Supply voltage range 2.7V to 12V ■ Guaranteed at 3.3V, 5V and ±5V 1 mA ■ Low supply current 4.5 MHz ■ Unity gain bandwidth 100 dB ■ Open loop gain 500 μV max ■ Input offset voltage 0.3 pA ■ Input bias current 100 dB ■ CMRR 20 nV/ ■ Input voltage noise –40°C to 125°C ■ Temperature range ■ Rail-to-rail input ■ Rail-to-rail output Applications ■ ■ ■ ■ ■ ■ High impedance sensor interface Battery powered instrumentation High gain amplifiers DAC buffer Instrumentation amplifiers Active Filters Typical Application Active Band-pass Filter 20168372 © 2006 National Semiconductor Corporation 201683 www.national.com LMV841 CMOS Input, RRIO, Wide Supply Range Operational Amplifier December 2006 LMV841 Storage Temperature Range Junction Temperature (Note 3) Soldering Information Infrared or Convection (20 sec) Wave Soldering Lead Temp. (10 sec) Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model Machine Model VIN Differential Supply Voltage (V+ – V-) Voltage at Input/Output Pins Input Current 2 kV 200V ±300 mV 13.2V V++0.3V, V− −0.3V 10 mA 3.3V Electrical Characteristics Operating Ratings −65°C to +150°C +150°C 235°C 260°C (Note 1) Temperature Range (Note 3) Supply Voltage (V+ – V−) −40°C to +125°C 2.7V to 12V Package Thermal Resistance (θJA (Note 3)) 5-Pin SC70 334 °C/W (Note 4) Unless otherwise specified, all limits are guaranteed for at TA = 25°C, V+ = 3.3V, V− = 0V, VCM = V+/2, and RL > 10 MΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units 8 ±500 ±800 μV VOS Input Offset Voltage TCVOS Input Offset Voltage Drift (Note 7) 0.5 ±5 μV/°C IB Input Bias Current (Notes 7, 8) 0.3 10 300 pA IOS Input Offset Current CMRR Common Mode Rejection Ratio PSRR 40 0V ≤ VCM ≤ 3.3V 84 80 100 Power Supply Rejection Ratio 2.7V ≤ V+ ≤ 12V, VO = V+/2 86 82 100 CMVR Input Common-Mode Voltage Range CMRR ≥ 50 dB –0.1 AVOL Large Signal Voltage Gain RL = 2 kΩ VO = 0.3V to 3.0V 100 96 118 RL = 10 kΩ VO = 0.2V to 3.1V 100 96 129 VO Output Swing High, measured from V+ Output Swing Low, measured from V- IO Output Short Circuit Current (Notes 3, 9) dB dB dB RL = 2 kΩ to V+/2 50 80 120 RL = 10 kΩ to V+/2 25 40 60 RL = 2 kΩ to V+/2 50 70 90 RL = 10 kΩ to V+/2 23 45 55 Sourcing VO = V+/2 VIN = 100 mV 25 20 30 Sinking VO = V+/2 VIN = −100 mV 25 20 30 Supply Current 0.98 SR Slew Rate (Note 10) GBW Gain Bandwidth Product Φm Phase Margin en Input-Referred Voltage Noise f = 1 kHz 20 ROUT Open Loop Output Impedance f = 3 MHz 70 AV = +1, VO = 2.3 VPP 10% to 90% 2 V 3.4 IS www.national.com fA mV mV mA 1.2 2 mA 2.5 V/μs 4.5 MHz 67 Deg nV/ Ω (Note 4) Unless otherwise specified, all limits are guaranteed for at TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, and RL > 10 MΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units –5 ±500 ±800 μV VOS Input Offset Voltage TCVOS Input Offset Voltage Drift (Note 7) 0.35 ±5 μV/°C IB Input Bias Current (Notes 7, 8) 0.3 10 300 pA IOS Input Offset Current CMRR Common Mode Rejection Ratio PSRR 40 0V ≤ VCM ≤ 5V 86 80 100 Power Supply Rejection Ratio 2.7V ≤ V+ ≤ 12V, VO = V+/2 86 82 100 CMVR Input Common-Mode Voltage Range CMRR ≥ 50 dB –0.2 AVOL Large Signal Voltage Gain RL = 2 kΩ VO = 0.3V to 4.7V 100 96 118 RL = 10 kΩ VO = 0.2V to 4.8V 100 96 129 VO Output Swing High, measured from V+ Output Swing Low, measured from V- IO Output Short Circuit Current (Notes 3, 9) IS Supply Current SR Slew Rate (Note 10) GBW fA dB dB 5.2 dB RL = 2 kΩ to V+/2 60 100 120 RL = 10 kΩ to V+/2 30 50 70 RL = 2 kΩ to V+/2 60 90 100 RL = 10 kΩ to V+/2 27 40 50 Sourcing VO = V+/2 VIN = 100 mV 25 20 30 Sinking VO = V+/2 VIN = −100 mV 25 20 30 1.02 AV = +1, VO = 4 VPP 10% to 90% V mV mV mA 1.5 2 mA 2.5 V/μs Gain Bandwidth Product 4.5 MHz Φm Phase Margin 67 Deg en Input-Referred Voltage Noise f = 1 kHz 20 ROUT Open Loop Output Impedance f = 3 MHz 70 3 nV/ Ω www.national.com LMV841 5V Electrical Characteristics LMV841 ±5V Electrical Characteristics (Note 4) Unless otherwise specified, all limits are guaranteed for at TA = 25°C, V+ = 5V, V− = –5V, VCM = 0V, and RL > 10 MΩ to VCM. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units VOS Input Offset Voltage –17 ±500 ±800 μV TCVOS Input Offset Voltage Drift (Note 7) 0.25 ±5 μV/°C IB Input Bias Current (Notes 7, 8) 0.3 10 300 pA IOS Input Offset Current CMRR Common Mode Rejection Ratio PSRR 40 –5V ≤ VCM ≤ 5V 86 80 100 Power Supply Rejection Ratio 2.7V ≤ V+ ≤ 12V, VO = 0V 86 82 100 CMVR Input Common-Mode Voltage Range CMRR ≥ 50 dB –5.2 AVOL Large Signal Voltage Gain RL = 2 kΩ VO = –4.7V to 4.7V 100 96 118 RL = 10 kΩ VO = –4.8V to 4.8V 100 96 129 VO Output Swing High, measured from V+ Output Swing Low, measured from V- IO Output Short Circuit Current (Notes 3, 9) IS Supply Current SR Slew Rate (Note 10) GBW fA dB dB 5.2 dB RL = 2 kΩ to 0V 88 120 155 RL = 10 kΩ to 0V 40 75 95 RL = 2 kΩ to 0V 85 125 140 RL = 10 kΩ to 0V 36 50 70 Sourcing VO = 0V VIN = 100 mV 25 20 30 Sourcing VO = 0V VIN = −100 mV 25 20 30 1.11 AV = +1, VO = 9 VPP 10% to 90% V mV mV mA 1.7 2 mA 2.5 V/μs Gain Bandwidth Product 4.5 MHz Φm Phase Margin 67 Deg en Input-Referred Voltage Noise f = 1 kHz 20 ROUT Open Loop Output Impedance f = 3 MHz 70 nV/ Ω Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) FieldInduced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Note 4: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device. Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC) method. Note 7: This parameter is guaranteed by design and/or characterization and is not tested in production. Note 8: Positive current corresponds to current flowing into the device. www.national.com 4 LMV841 Note 9: Short circuit test is a momentary test. Note 10: Number specified is the slower of positive and negative slew rates. Connection Diagram 5-Pin SC70 20168302 Top View Ordering Information Package 5-Pin SC70 Part Number LMV841MG LMV841MGX Package Marking Transport Media 1k Units Tape and Reel A97 3k Units Tape and Reel 5 NSC Drawing MAA05A www.national.com LMV841 Typical Performance Characteristics At TA = 25°C, RL = 10 kΩ, VS = 5V. Unless otherwise specified. Offset Voltage Distribution Offset Voltage Distribution 20168367 20168366 Offset Voltage Distribution VOS vs. VCM Over Temperature @ 3.3V 20168368 20168310 VOS vs. VCM Over Temperature @ 5.0V VOS vs. VCM Over Temperature @ ±5.0V 20168311 www.national.com 20168312 6 LMV841 VOS vs. Supply Voltage VOS vs. Temperature 20168314 20168313 DC Gain vs. VOUT Input Bias Current vs. VCM 20168315 20168316 Input Bias Current vs. VCM Input Bias Current vs. VCM 20168317 20168318 7 www.national.com LMV841 Supply Current vs. Supply Voltage Sinking Current vs. Supply Voltage 20168319 20168320 Sourcing Current vs. Supply Voltage Output Swing High vs. Supply Voltage RL = 2k 20168321 20168322 Output Swing High vs. Supply Voltage RL = 10k Output Swing Low vs. Supply Voltage RL = 2k 20168323 www.national.com 20168324 8 LMV841 Output Swing Low vs. Supply Voltage RL = 10k Output Voltage Swing vs. Load Current 20168325 20168326 Open Loop Frequency Response Over Temperature Open Loop Frequency Response Over Load Conditions 20168327 20168328 PSRR vs. Frequency CMRR vs. Frequency 20168330 20168331 9 www.national.com LMV841 Large Signal Step Response @ GAIN = 10 Small Signal Step Response @ GAIN = 1 20168335 20168334 Small Signal Step Response @ GAIN = 10 Input Voltage Noise vs. Frequency 20168336 20168339 Closed Loop Output Impedance vs Frequency 20168343 www.national.com 10 INTRODUCTION The LMV841 is an operational amplifier with near-precision specifications: low noise, low temperature drift, low offset and rail-to-rail input and output. The low supply current, a temperature range of −40°C to 125° C, the 12V supply with CMOS input and the small SC70 package make this a unique op amp. Possible applications include instrumentation, medical, test equipment, audio and automotive applications. The small SC70 package and the low supply current, 1 mA, makes the LMV841 a perfect choice for portable electronics. INPUT PROTECTION The LMV841 has a set of anti-parallel diodes D1 and D2 between the input pins, as shown in Figure 1. These diodes are present to protect the input stage of the amplifier. At the same time, they limit the amount of differential input voltage that is allowed on the input pins. A differential signal larger than one diode voltage drop might damage the diodes. The differential signal between the inputs needs to be limited to ±300 mV or the input current needs to be limited to ±10 mA. Note that when the op amp is slewing, a differential input voltage exists that forward biases the protection diodes. This may result in current being drawn from the signal source. While this current is already limited by the internal resistors R1 and R2 (both 130Ω), a resistor of 1 kΩ can be placed in the feedback path, or a 500Ω resistor can be placed in series with the input signal. 20168350 FIGURE 2. Isolating Capacitive Load REDUCING OVERSHOOT When the output of the op amp is at its lower swing limit (i.e. saturated near V−), rapidly rising signals can cause some overshoot. This overshoot can be reduced by adding a resistor from the output to V+. Even in extreme situations at high temperatures, a 10k resistor is sufficient to reduce the overshoot to negligible levels. The resistor at the output will however reduce the maximum output swing, as would any resistive load at the output. DECOUPLING AND LAYOUT Care must be taken when creating the board layout for the op amp. For decoupling of the supply lines 10 nF capacitors are suggested to be placed as close as possible to the op amp. For single supply, place a capacitor between V+ and V−. For dual supplies, place one capacitor between V+ and the board ground, and the second capacitor between ground and V−. 20168351 FIGURE 1. Protection diodes between the input pins INPUT STAGE The input stage of this Amplifier exists of a PMOS and an NMOS input pair to achieve a more than rail-to-rail input range. For input voltages close to the negative rail, only the PMOS pair is active. Close to the positive rail, only the NMOS pair is active. For intermediate signals, the transition from PMOS pair to NMOS pair will result in a very small offset shift, which appears at approximately 1 volt from the positive rail. To reduce this small offset shift, the amplifier is trimmed during production, resulting in an input offset voltage of less then 1mV at room temperature over the total input range. NOISE DUE TO RESISTORS The LMV841 has good noise specifications, and will frequently be used in low noise applications. Therefore it is important to take in account the influence of the resistors to the total noise contribution. For applications with a voltage input configuration it is, in general, beneficial to keep the resistor values low. In these configurations high resistor values mean high noise levels. However, using low resistor values will increase the power consumption of the application. This is not always acceptable for portable applications. 11 www.national.com LMV841 CAPACITIVE LOAD The LMV841 can be connected as a non-inverting unity-gain amplifier. This configuration is the most sensitive to capacitive loading. The combination of a capacitive load placed on the output of an amplifier along with the amplifier’s output impedance creates a phase lag, which reduces the phase margin of the amplifier. If the phase margin is significantly reduced, the response will be underdamped which causes peaking in the transfer and when there is too much peaking the op amp might start oscillating. In order to drive heavier capacitive loads, an isolation resistor, RISO, should be used, as shown in Figure 2. By using this isolation resistor, the capacitive load is isolated from the amplifier’s output, and hence, the pole caused by CL is no longer in the feedback loop. The larger the value of RISO, the more stable the output voltage will be. If values of RISO are sufficiently large, the feedback loop will be stable, independent of the value of CL. However, larger values of RISO result in reduced output swing and reduced output current drive. Application Information LMV841 To determine if the noise is acceptable for the application, use the following formula for resistor noise : a centre frequency of approximately 10% from the frequency of the total filter: C = 33 nF R1 = 2 kΩ R2 = 6.2 kΩ R3 = 45 Ω This will give for Filter A where: eth = Thermal noise voltage (Vrms) k = Boltzmann constant (1.38 x 10–23 J/K) T = Absolute temperature (K) R = Resistance (Ω) B = Noise bandwidth (Hz), fmax - fmin And for filter B with C = 27 nF: Given in an example with a resistor of 1MOhm at 25°C (298 K) over a frequency range of 100 kHz: Bandwidth can be calculated by: To keep the noise of the application low it might be necessary to decrease the resistors to 100k, which will decrease the noise to –97.8 dBV (12.8 uV). The op amp's input-referred noise of 20 nV/ at 1 kHz is equivalent to the noise of a 24 kΩ resistor. For filter A this will give ACTIVE FILTER The rail-to-rail input and output of the LMV841, and its wide supply voltage range makes this amplifier ideal to use in numerous applications. One of the typical applications is an active filter as shown in Figure 3. This example is a band-pass filter, for which the pass band is widened. This is achieved by cascading two band-pass filters, with slightly different centre frequencies. and for filter B: The response of the two filters and the combined filter is shown in Figure 4. 20168358 FIGURE 3. Active Filter The centre frequency of the separate band-pass filters can be calculated by: 20168359 In this example a filter was designed with its pass band at 10 kHz. The two separate band-pass filters are designed to have www.national.com FIGURE 4. Active Filter Curve 12 LMV841 The filter responses of filter A and filter B are shown as the thin lines in Figure 4, the response of the combined filter is shown as the thick line. By shifting the centre frequencies of the separate filters further apart, the result will be a wider band, however positioning the centre frequencies too far apart will result in a less flat gain within the band. For wider bands more band-pass filters can be cascaded. Tip: use the WEBENCH internet tools at www.national.com for your filter application 20168352 HIGH IMPEDANCE SENSOR INTERFACE Many sensors have high source impedances that may range up to 10 MOhm. The output signal of sensors often needs to be amplified or otherwise conditioned by means of an amplifier. The input bias current of this amplifier can load the sensor’s output and cause a voltage drop across the source resistance as shown in Figure 5, where VIN+ = VS – IB * RS. The last term, IB * RS, is the voltage drop across RS. The LMV841 can be used to prevent errors introduced to the system due to this voltage drop. The very low input bias current of the LMV841 is a must for the use with high impedance sensors. This is to keep the error contribution by IB * RS negligibly small. FIGURE 5. High Impedance Sensor Interface THERMOCOUPLE AMPLIFIER The LMV841 is also a very good choice to be used in a thermocouple amplifier application as shown in the example below. The low source impedance of the thermocouple makes it possible to use a single differential amplifier. A differential amplifier is used to remove common-mode noise, picked up by the wires. 20168353 FIGURE 6. Thermocoupler Amplifier 13 www.national.com LMV841 Physical Dimensions inches (millimeters) unless otherwise noted 5-Pin SC70 NS Package Number MAA05A www.national.com 14 LMV841 Notes 15 www.national.com LMV841 CMOS Input, RRIO, Wide Supply Range Operational Amplifier Notes THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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