NSC LMP7712MM

LMP7711/LMP7712
Single and Dual Precision, 17 MHz, Low Noise, CMOS
Input Amplifiers
General Description
Features
The LMP7711/LMP7712 are single and dual low noise, low
offset, CMOS input, rail-to-rail output precision amplifiers
with a high gain bandwidth product and an enable pin. The
LMP7711/LMP7712 are part of the LMP™ precision amplifier
family and are ideal for a variety of instrumentation applications.
Unless otherwise noted, typical values at VS = 5V.
± 150 µV (max)
n Input offset voltage
n Input bias current
100 fA
n Input voltage noise
5.8 nV/
n Gain bandwidth product
17 MHz
n Supply current (LMP7711)
1.15 mA
n Supply current (LMP7712)
1.30 mA
n Supply voltage range
1.8V to 5.5V
n THD+N @ f = 1 kHz
0.001%
n Operating temperature range
−40oC to 125˚C
n Rail-to-rail output swing
n Space saving TSOT23 package (LMP7711)
n MSOP-10 package (LMP7712)
Utilizing a CMOS input stage, the LMP7711/LMP7712
achieve an input bias current of 100 fA, an input referred
, and an input offset voltage of
voltage noise of 5.8 nV/
less than ± 150 µV. These features make the LMP7711/
LMP7712 superior choices for precision applications.
Consuming only 1.15 mA of supply current, the LMP7711
offers a high gain bandwidth product of 17 MHz, enabling
accurate amplification at high closed loop gains.
The LMP7711/LMP7712 have a supply voltage range of
1.8V to 5.5V, which makes these ideal choices for portable
low power applications with low supply voltage requirements. In order to reduce the already low power consumption the LMP7711/LMP7712 have an enable function. Once
in shutdown, the LMP7711/LMP7712 draw only 140 nA of
supply current.
The LMP7711/LMP7712 are built with National’s advanced
VIP50 process technology. The LMP7711 is offered in a
6-pin TSOT23 package and the LMP7712 is offered in a
10-pin MSOP.
Applications
n Active filters and buffers
n Sensor interface applications
n Transimpedance amplifiers
Typical Performance
Offset Voltage Distribution
Input Referred Voltage Noise
20150322
20150339
LMP™ is a trademark of National Semiconductor Corporation.
© 2005 National Semiconductor Corporation
DS201503
www.national.com
LMP7711/LMP7712 Precision, 17 MHz, Low Noise, CMOS Input Amplifiers
November 2005
LMP7711/LMP7712
Absolute Maximum Ratings (Note 1)
Soldering Information
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Infrared or Convection (20 sec)
235˚C
Wave Soldering Lead Temp. (10
sec)
260˚C
ESD Tolerance (Note 2)
Human Body Model
2000V
Machine Model
Operating Ratings (Note 1)
200V
Temperature Range (Note 3)
± 0.3V
VIN Differential
Supply Voltage (VS = V+ – V−)
Voltage on Input/Output Pins
+
Supply Voltage (VS = V – V )
6.0V
V+ +0.3V, V− −0.3V
Storage Temperature Range
−65˚C to 150˚C
Junction Temperature (Note 3)
−40˚C to 125˚C
−
0˚C ≤ TA ≤ 125˚C
1.8V to 5.5V
−40˚C ≤ TA ≤ 125˚C
2.0V to 5.5V
Package Thermal Resistance (θJA(Note 3))
+150˚C
6-Pin TSOT23
170˚C/W
10-Pin MSOP
236˚C/W
2.5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25˚C, V+ = 2.5V, V− = 0V ,VO = VCM = V+/2, VEN = V+. Boldface
limits apply at the temperature extremes.
Symbol
Parameter
VOS
Input Offset Voltage
TC VOS
Input Offset Voltage Drift
(Note 6)
Conditions
Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
± 20
± 180
± 480
µV
±4
µV/˚C
LMP7711
–1
LMP7712
–1.75
Units
IB
Input Bias Current
VCM = 1V
(Notes 7, 8)
0.05
50
100
pA
IOS
Input Offset Current
VCM = 1V
(Note 8)
0.006
25
50
pA
CMRR
Common Mode Rejection Ratio
0V ≤ VCM ≤ 1.4V
83
80
100
PSRR
Power Supply Rejection Ratio
2.0V ≤ V+ ≤ 5.5V
V− = 0V, VCM = 0
85
80
100
1.8V ≤ V+ ≤ 5.5V
V− = 0V, VCM = 0
85
98
CMVR
Input Common-Mode Voltage
Range
CMRR ≥ 80 dB
CMRR ≥ 78 dB
AVOL
Large Signal Voltage Gain
LMP7711, VO = 0.15 to 2.2V
RL = 2 kΩ to V+/2
88
82
98
LMP7712, VO = 0.15 to 2.2V
RL = 2 kΩ to V+/2
84
80
92
LMP7711, VO = 0.15 to 2.2V
RL = 10 kΩ to V+/2
92
88
110
LMP7712, VO = 0.15 to 2.2V
RL = 10 kΩ to V+/2
90
86
95
RL = 2 kΩ to V+/2
70
77
25
RL = 10 kΩ to V+/2
60
66
20
VO
Output Swing High
Output Swing Low
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−0.3
–0.3
dB
dB
1.5
1.5
dB
mV
from V+
RL = 2 kΩ to V+/2
30
70
73
RL = 10 kΩ to V+/2
15
60
62
2
V
mV
(Continued)
Unless otherwise specified, all limits are guaranteed for TA = 25˚C, V+ = 2.5V, V− = 0V ,VO = VCM = V+/2, VEN = V+. Boldface
limits apply at the temperature extremes.
Symbol
IO
IS
SR
Parameter
Output Short Circuit Current
Supply Current
Slew Rate
GBW
Gain Bandwidth Product
en
Input-Referred Voltage Noise
Conditions
Min
(Note 5)
Typ
(Note 4)
Sourcing to V−
VIN = 200 mV (Note 9)
36
30
52
Sinking to V+
VIN = −200 mV (Note 9)
7.5
5.0
15
Max
(Note 5)
Units
mA
LMP7711
Enable Mode VEN ≥ 2.1
0.95
1.30
1.65
LMP7712 (per channel)
Enable Mode VEN ≥ 2.1
1.10
1.50
1.85
Shutdown Mode (per channel)
VEN ≤ 0.4
0.03
1
4
AV = +1, Rising (10% to 90%)
8.3
AV = +1, Falling (90% to 10%)
10.3
f = 400 Hz
6.8
f = 1 kHz
5.8
f = 1 kHz
0.01
mA
µA
V/µs
14
MHz
nV/
in
Input-Referred Current Noise
ton
Turn-on Time
140
ns
toff
Turn-off Time
1000
ns
VEN
Enable Pin Voltage Range
Enable Mode
2.1
Shutdown Mode
IEN
THD+N
Enable Pin Input Current
Total Harmonic Distortion +
Noise
pA/
2 - 2.5
0 - 0.5
VEN = 2.5V (Note 7)
0.4
1.5
3.0
VEN = 0V (Note 7)
0.003
0.1
f = 1 kHz, AV = 1, RL = 100 kΩ
VO = 0.9 VPP
0.003
f = 1 kHz, AV = 1, RL = 600Ω
VO = 0.9 VPP
0.004
V
µA
%
5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25˚C, V+ = 5V, V− = 0V, VCM = V+/2, VEN = V+. Boldface limits
apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
± 10
± 150
± 450
µV
±4
µV/˚C
VOS
Input Offset Voltage
TC VOS
Input Offset Average Drift
(Note 6)
LMP7711
–1
LMP7712
–1.75
IB
Input Bias Current
(Notes 7, 8)
0.1
50
100
pA
IOS
Input Offset Current
(Note 8)
0.01
25
50
pA
CMRR
Common Mode Rejection
Ratio
0V ≤ VCM ≤ 3.7V
85
82
100
PSRR
Power Supply Rejection Ratio
2.0V ≤ V+ ≤ 5.5V
V− = 0V, VCM = 0
85
80
100
1.8V ≤ V+ ≤ 5.5V
V− = 0V, VCM = 0
85
98
CMVR
Input Common-Mode Voltage
Range
CMRR ≥ 80 dB
CMRR ≥ 78 dB
−0.3
–0.3
3
dB
dB
4
4
V
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LMP7711/LMP7712
2.5V Electrical Characteristics
LMP7711/LMP7712
5V Electrical Characteristics
AVOL
VO
Large Signal Voltage Gain
Output Swing High
Output Swing Low
IO
IS
SR
Output Short Circuit Current
Supply Current
Slew Rate
GBW
Gain Bandwidth Product
en
Input-Referred Voltage Noise
in
Input-Referred Current Noise
ton
Turn-on Time
toff
Turn-off Time
VEN
Enable Pin Voltage Range
(Continued)
LMP7711, VO = 0.3 to 4.7V
RL = 2 kΩ to V+/2
88
82
107
LMP7712, VO = 0.3 to 4.7V
RL = 2 kΩ to V+/2
84
80
90
LMP7711, VO = 0.3 to 4.7V
RL = 10 kΩ to V+/2
92
88
110
LMP7712, VO = 0.3 to 4.7V
RL = 10 kΩ to V+/2
90
86
95
RL = 2 kΩ to V+/2
70
77
32
RL = 10 kΩ to V+/2
60
66
22
THD+N
Enable Pin Input Current
Total Harmonic Distortion +
Noise
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mV
from V+
RL = 2 kΩ to V+/2
(LMP7711)
42
70
73
RL = 2 kΩ to V+/2
(LMP7712)
50
75
78
RL = 10 kΩ to V+/2
20
60
62
Sourcing to V−
VIN = 200 mV (Note 9)
46
38
66
Sinking to V+
VIN = −200 mV (Note 9)
10.5
6.5
23
1.15
1.40
1.75
LMP7712 (per channel)
Enable Mode VEN ≥ 4.6
1.30
1.70
2.05
Shutdown Mode VEN ≤ 0.4
(per channel)
0.14
1
4
AV = +1, Rising (10% to 90%)
6.0
9.5
AV = +1, Falling (90% to 10%)
7.5
11.5
7.0
f = 1 kHz
5.8
f = 1 kHz
0.01
Enable Mode
4.6
µA
MHz
nV/
pA/
110
ns
800
ns
4.5 – 5
0 – 0.5
0.4
VEN = 5V (Note 7)
5.6
10
VEN = 0V (Note 7)
0.005
0.2
f = 1 kHz, AV = 1, RL = 100 kΩ
VO = 4 VPP
0.001
f = 1 kHz, AV = 1, RL = 600Ω
VO = 4 VPP
0.004
4
mA
V/µs
17
f = 400 Hz
mV
mA
LMP7711
Enable Mode VEN ≥ 4.6
Shutdown Mode
IEN
dB
V
µA
%
Note 2: Human Body Model is 1.5 kΩ in series with 100 pF. Machine Model is 0Ω in series with 200 pF.
Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board.
Note 4: Typical values represent the most likely parametric norm at the time of characterization.
Note 5: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality
Control (SQC) method.
Note 6: Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change.
Note 7: Positive current corresponds to current flowing into the device.
Note 8: Guaranteed by design.
Note 9: The short circuit test is a momentary open loop test.
Connection Diagrams
6-Pin TSOT23
10-Pin MSOP
20150301
Top View
20150302
Top View
Ordering Information
Package
6-Pin TSOT23
10-Pin MSOP
Part Number
LMP7711MK
LMP7711MKX
LMP7712MM
LMP7712MMX
Package Marking
Transport Media
1k Units Tape and Reel
AC3A
3k Units Tape and Reel
1k Units Tape and Reel
AD3A
3.5k Units Tape and Reel
5
NSC Drawing
MK06A
MUB10A
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LMP7711/LMP7712
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables.
LMP7711/LMP7712
Typical Performance Characteristics
Unless otherwise noted: TA = 25˚C, VS = 5V, VCM = VS/2, VEN
= V +.
TCVOS Distribution (LMP7711)
Offset Voltage Distribution
20150303
20150381
Offset Voltage Distribution
TCVOS Distribution (LMP7712)
20150322
20150380
Offset Voltage vs. VCM
Offset Voltage vs. VCM
20150310
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20150311
6
= V+. (Continued)
Offset Voltage vs. VCM
Offset Voltage vs. Supply Voltage
20150321
20150312
Offset Voltage vs. Temperature
CMRR vs. Frequency
20150356
20150309
Input Bias Current Over Temperature
Input Bias Current Over Temperature
20150323
20150324
7
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LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VS = 5V, VCM = VS/2, VEN
LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VS = 5V, VCM = VS/2, VEN
= V+. (Continued)
Supply Current vs. Supply Voltage (LMP7711)
Supply Current vs. Supply Voltage (LMP7712)
20150305
20150377
Supply Current vs. Supply Voltage (Shutdown)
Crosstalk Rejection Ratio (LMP7712)
20150376
20150306
Supply Current vs. Enable Pin Voltage (LMP7711)
Supply Current vs. Enable Pin Voltage (LMP7711)
20150308
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20150307
8
= V+. (Continued)
Supply Current vs. Enable Pin Voltage (LMP7712)
Supply Current vs. Enable Pin Voltage (LMP7712)
20150378
20150379
Sourcing Current vs. Supply Voltage
Sinking Current vs. Supply Voltage
20150320
20150319
Sourcing Current vs. Output Voltage
Sinking Current vs. Output Voltage
20150350
20150354
9
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LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VS = 5V, VCM = VS/2, VEN
LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VS = 5V, VCM = VS/2, VEN
= V+. (Continued)
Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
20150317
20150315
Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
20150316
20150314
Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
20150318
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20150313
10
= V+. (Continued)
Open Loop Frequency Response
Open Loop Frequency Response
20150373
20150341
Phase Margin vs. Capacitive Load
Phase Margin vs. Capacitive Load
20150345
20150346
Overshoot and Undershoot vs. Capacitive Load
Slew Rate vs. Supply Voltage
20150330
20150329
11
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LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VS = 5V, VCM = VS/2, VEN
LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VS = 5V, VCM = VS/2, VEN
= V+. (Continued)
Small Signal Step Response
Large Signal Step Response
20150338
20150337
Small Signal Step Response
Large Signal Step Response
20150334
20150333
THD+N vs. Output Voltage
THD+N vs. Output Voltage
20150326
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20150304
12
= V+. (Continued)
THD+N vs. Frequency
THD+N vs. Frequency
20150357
20150355
PSRR vs. Frequency
Input Referred Voltage Noise vs. Frequency
20150339
20150328
Closed Loop Frequency Response
Closed Loop Output Impedance vs. Frequency
20150332
20150336
13
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LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: TA = 25˚C, VS = 5V, VCM = VS/2, VEN
LMP7711/LMP7712
Application Notes
LMP7711/LMP7712
The LMP7711/LMP7712 are single and dual, low noise, low
offset, rail-to-rail output precision amplifiers with a wide gain
bandwidth product of 17 MHz and low supply current. The
wide bandwidth makes the LMP7711/LMP7712 ideal
choices for wide-band amplification in portable applications.
The low supply current along with the enable feature that is
built-in on the LMP7711/LMP7712 allows for even more
power efficient designs by turning the device off when not in
use.
20150361
FIGURE 1. Isolating Capacitive Load
The LMP7711/LMP7712 are superior for sensor applications. The very low input referred voltage noise of only 5.8
at 1 kHz and very low input referred current noise
nV/
mean more signal fidelity and higher
of only 10 fA/
signal-to-noise ratio.
INPUT CAPACITANCE
CMOS input stages inherently have low input bias current
and higher input referred voltage noise. The LMP7711/
LMP7712 enhance this performance by having the low input
bias current of only 50 fA, as well as, a very low input
referred voltage noise of 5.8 nV/
. In order to achieve
this a larger input stage has been used. This larger input
stage increases the input capacitance of the LMP7711/
LMP7712. Figure 2 shows typical input common mode input
capacitance of the LMP7711/LMP7712.
The LMP7711/LMP7712 have a supply voltage range of
1.8V to 5.5V over a wide temperature range of 0˚C to 125˚C.
This is optimal for low voltage commercial applications. For
applications where the ambient temperature might be less
than 0˚C, the LMP7711/LMP7712 are fully operational at
supply voltages of 2.0V to 5.5V over the temperature range
of −40˚C to 125˚C.
The outputs of the LMP7711/LMP7712 swing within 25 mV
of either rail providing maximum dynamic range in applications requiring low supply voltage. The input common mode
range of the LMP7711/LMP7712 extends to 300 mV below
ground. This feature enables users to utilize this device in
single supply applications.
The use of a very innovative feedback topology has enhanced the current drive capability of the LMP7711/
LMP7712, resulting in sourcing currents as much as 47 mA
with a supply voltage of only 1.8V.
The LMP7711 is offered in the space saving TSOT23 package and the LMP7712 is offered in a 10-pin MSOP. These
small packages are ideal solutions for applications requiring
minimum PC board footprint.
National Semiconductor is heavily committed to precision
amplifiers and the market segments they serves. Technical
support and extensive characterization data is available for
sensitive applications or applications with a constrained error
budget.
20150375
FIGURE 2. Input Common Mode Capacitance
CAPACITIVE LOAD
The unity gain follower is the most sensitive configuration to
capacitive loading. The combination of a capacitive load
placed directly on the output of an amplifier along with the
output impedance of the amplifier creates a phase lag which
in turn reduces the phase margin of the amplifier. If phase
margin is significantly reduced, the response will be either
underdamped or the amplifier will oscillate.
The LMP7711/LMP7712 can directly drive capacitive loads
of up to 120 pF without oscillating. To drive heavier capacitive loads, an isolation resistor, RISO in Figure 1, should be
used. This resistor and CL form a pole and hence delay the
phase lag or increase the phase margin of the overall system. The larger the value of RISO, the more stable the output
voltage will be. However, larger values of RISO result in
reduced output swing and reduced output current drive.
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This input capacitance will interact with other impedances
such as gain and feedback resistors, which are seen on the
inputs of the amplifier to form a pole. This pole will have little
or no effect on the output of the amplifier at low frequencies
and under DC conditions, but will play a bigger role as the
frequency increases. At higher frequencies, the presence of
this pole will decrease phase margin and also causes gain
peaking. In order to compensate for the input capacitance,
care must be taken in choosing feedback resistors. In addition to being selective in picking values for the feedback
resistor, a capacitor can be added to the feedback path to
increase stability.
The DC gain of the circuit shown in Figure 3 is simply
−R2/R1.
14
As mentioned before, adding a capacitor to the feedback
path will decrease the peaking. This is because CF will form
yet another pole in the system and will prevent pairs of poles,
or complex conjugates from forming. It is the presence of
pairs of poles that cause the peaking of gain. Figure 5 shows
the frequency response of the schematic presented in Figure
3 with different values of CF. As can be seen, using a small
value capacitor significantly reduces or eliminates the peaking.
(Continued)
20150364
FIGURE 3. Compensating for Input Capacitance
For the time being, ignore CF. The AC gain of the circuit in
Figure 3 can be calculated as follows:
20150360
FIGURE 5. Closed Loop Frequency Response
(1)
This equation is rearranged to find the location of the two
poles:
TRANSIMPEDANCE AMPLIFIER
In many applications, the signal of interest is a very small
amount of current that needs to be detected. Current that is
transmitted through a photodiode is a good example. Barcode scanners, light meters, fiber optic receivers, and industrial sensors are some typical applications utilizing photodiodes for current detection. This current needs to be
amplified before it can be further processed. This amplification is performed using a current-to-voltage converter configuration or transimpedance amplifier. The signal of interest
is fed to the inverting input of an op amp with a feedback
resistor in the current path. The voltage at the output of this
amplifier will be equal to the negative of the input current
times the value of the feedback resistor. Figure 6 shows a
transimpedance amplifier configuration. CD represents the
photodiode parasitic capacitance and CCM denotes the
common-mode capacitance of the amplifier. The presence of
all of these capacitances at higher frequencies might lead to
less stable topologies at higher frequencies. Care must be
taken when designing a transimpedance amplifier to prevent
the circuit from oscillating.
With a wide gain bandwidth product, low input bias current
and low input voltage and current noise, the LMP7711/
LMP7712 are ideal for wideband transimpedance applications.
(2)
As shown in Equation (2), as the values of R1 and R2 are
increased, the magnitude of the poles are reduced, which in
turn decreases the bandwidth of the amplifier. Figure 4
shows the frequency response with different value resistors
for R1 and R2. Whenever possible, it is best to chose smaller
feedback resistors.
20150359
FIGURE 4. Closed Loop Frequency Response
15
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LMP7711/LMP7712
Application Notes
LMP7711/LMP7712
Application Notes
Thermopiles generate voltage in response to receiving radiation. These voltages are often only a few microvolts. As a
result, the operational amplifier used for this application
needs to have low offset voltage, low input voltage noise,
and low input bias current. Figure 8 shows a thermopile
application where the sensor detects radiation from a distance and generates a voltage that is proportional to the
intensity of the radiation. The two resistors, RA and RB, are
selected to provide high gain to amplify this signal, while CF
removes the high frequency noise.
(Continued)
20150369
FIGURE 6. Transimpedance Amplifier
20150327
A feedback capacitance CF is usually added in parallel with
RF to maintain circuit stability and to control the frequency
response. To achieve a maximally flat, 2nd order response,
RF and CF should be chosen by using Equation (3)
FIGURE 8. Thermopile Sensor Interface
PRECISION RECTIFIER
Rectifiers are electrical circuits used for converting AC signals to DC signals. Figure 9 shows a full-wave precision
rectifier. Each operational amplifier used in this circuit has a
diode on its output. This means for the diodes to conduct, the
output of the amplifier needs to be positive with respect to
ground. If VIN is in its positive half cycle then only the output
of the bottom amplifier will be positive. As a result, the diode
on the output of the bottom amplifier will conduct and the
signal will show at the output of the circuit. If VIN is in its
negative half cycle then the output of the top amplifier will be
positive, resulting in the diode on the output of the top
amplifier conducting and, delivering the signal on the amplifier’s output to the circuits output.
For R2/ R1 ≥ 2, the resistor values can be found by using the
equation shown in Figure 9. If R2/ R1 = 1, then R3 should be
left open, no resistor needed, and R4 should simply be
shorted.
(3)
Calculating CF from Equation (3) can sometimes result in
capacitor values which are less than 2 pF. This is especially
the case for high speed applications. In these instances, its
often more practical to use the circuit shown in Figure 7 in
order to allow more sensible choices for CF. The new feedback capacitor, C'F, is (1+ RB/RA) CF. This relationship holds
as long as RA << RF.
20150331
FIGURE 7. Modified Transimpedance Amplifier
SENSOR INTERFACE
The LMP7711/LMP7712 have low input bias current and low
input referred noise, which make them ideal choices for
sensor interfaces such as thermopiles, Infra Red (IR) thermometry, thermocouple amplifiers, and pH electrode buffers.
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20150374
FIGURE 9. Precision Rectifier
16
LMP7711/LMP7712
Physical Dimensions
inches (millimeters) unless otherwise noted
6-Pin TSOT23
NS Package Number MK06A
10-Pin MSOP
NS Package Number MUB10A
17
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LMP7711/LMP7712 Precision, 17 MHz, Low Noise, CMOS Input Amplifiers
Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
BANNED SUBSTANCE COMPLIANCE
National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products
Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain
no ‘‘Banned Substances’’ as defined in CSP-9-111S2.
Leadfree products are RoHS compliant.
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