LMH6601 250 MHz, 2.4V CMOS Op Amp with Shutdown General Description Features The LMH6601 is a low voltage (2.4V – 5.5V), high speed voltage feedback operational amplifier suitable for use in a variety of consumer and industrial applications. With a bandwidth of 125 MHz at a gain of +2 and guaranteed high output current of 100 mA, the LMH6601 is an ideal choice for video line driver applications including HDTV. Low input bias current (50 pA maximum), rail-to-rail output, and low current noise allow the LMH6601 to be used in various industrial applications such as transimpedance amplifiers, active filters, or high-impedance buffers. The LMH6601 is an attractive solution for systems which require high performance at low supply voltages. The LMH6601 is available in a 6-pin SC70 package, and includes a micropower shutdown feature. VS = 3.3V, TA = 25˚C, AV = 2 V/V, RL = 150Ω to V−, unless specified. n 125 MHz −3 dB small signal bandwidth n 75 MHz −3 dB large signal bandwidth n 30 MHz large signal 0.1 dB gain flatness n 260 V/µs slew rate n 0.25%/0.25˚ differential gain/differential phase n Rail-to-rail output n 2.4V – 5.5V single supply operating range n SC70-6 Package Applications n n n n n n n Video amplifier Charge amplifier Set-top box Sample & hold Transimpedance amplifier Line driver High impedance buffer Response at a Gain of +2 for Various Supply Voltages 20136441 © 2006 National Semiconductor Corporation DS201364 www.national.com LMH6601 250 MHz, 2.4V CMOS Op Amp with Shutdown June 2006 LMH6601 Absolute Maximum Ratings (Note 1) Storage Temperature Range If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Junction Temperature 2 kV Machine Model 200V Output Current − Supply Voltage (V – V ) Voltage at Input/Output Pins 2.4V to 5.5V −40˚C to +85˚C Package Thermal Resistance (θJA) 6.0V + 260˚C Operating Temperature Range 200 mA (Note 3) + 235˚C Wave Soldering (10 sec.) Supply Voltage (V+ – V−) ± 10 mA Input Current Infrared or Convection (20 sec.) Operating Ratings (Note 1) ± 2.5V VIN Differential +150˚C Soldering Information ESD Tolerance (Note 4) Human Body Model −65˚C to +150˚C 6-pin SC70 − V +0.5V, V −0.5V 414˚C/W 5V Electrical Characteristics Single Supply with VS= 5V, AV = +2, RF = 604Ω, SD tied to V+, VOUT = VS/2, RL = 150Ω to V− unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2) Symbol Parameter Condition Min Typ Max (Note 6) (Note 6) (Note 6) Units Frequency Domain Response SSBW –3 dB Bandwidth Small Signal SSBW_1 VOUT = 0.25 VPP 130 VOUT = 0.25 VPP, AV = +1 250 2.5 MHz Peak Peaking VOUT = 0.25 VPP, AV = +1 Peak_1 Peaking VOUT = 0.25 VPP 0 dB LSBW –3 dB Bandwidth Large Signal VOUT = 2 VPP 81 MHz dB Peak_2 Peaking VOUT = 2 VPP 0 dB 0.1 dB BW 0.1 dB Bandwidth VOUT = 2 VPP 30 MHz GBWP_1k Gain Bandwidth Product Unity Gain, RL = 1 kΩ to VS/2 155 Unity Gain, RL = 150Ω to VS/2 125 GBWP_150 AVOL Large Signal Open Loop Gain 0.5V < VOUT < 4.5V PBW Full Power BW –1 dB, AV = +4, VOUT = 4.2 VPP, RL = 150Ω to VS/2 DG Differential Gain DP Differential Phase 56 MHz 66 dB 30 MHz 4.43 MHz, 1.7V ≤ VOUT ≤ 3.3V, RL = 150Ω to V− 0.06 % 4.43 MHz, 1.7V ≤ VOUT ≤ 3.3V RL = 150Ω to V− 0.10 deg 2.6 ns Time Domain Response TRS/TRL Rise & Fall Time 0.25V Step OS Overshoot 0.25V Step 10 % SR Slew Rate 2V Step 275 V/µs TS Settling Time 1V Step, ± 0.1% 50 1V Step, ± 0.02% 220 TS_1 ns PD Propagation Delay Input to Output, 250 mV Step, 50% 2.4 ns CL Cap Load Tolerance AV = −1, 10% Overshoot, 75Ω in Series 50 pF Distortion & Noise Performance HD2 Harmonic Distortion (2nd) HD2_1 HD3 Harmonic Distortion (3rd) HD3_1 2 VPP, 10 MHz −56 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 −61 2 VPP, 10 MHz −73 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 −64 −58 THD Total Harmonic Distortion 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 VN1 Input Voltage Noise > 10 MHz 7 1 MHz 10 > 1 MHz 50 VN2 IN www.national.com Input Current Noise 2 dBc dBc nV/ fA/ RL = 150Ω to V− unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2) (Continued) Symbol Parameter Condition Min Typ Max (Note 6) (Note 6) (Note 6) Units ±1 mV Static, DC Performance ± 2.4 ± 5.0 VIO Input Offset Voltage DVIO Input Offset Voltage Average Drift (Note 8) −5 IB Input Bias Current (Note 9) 5 50 IOS Input Offset Current (Note 9) 2 25 RIN Input Resistance CIN Input Capacitance +PSRR Positive Power Supply Rejection Ratio DC −PSRR Negative Power Supply Rejection Ratio µV/˚C pA pA > 100 GΩ 1.3 pF 55 51 59 dB DC 53 50 61 dB CMRR Common Mode Rejection Ratio DC 56 53 68 dB CMVR Input Voltage Range CMRR > 50 dB V− -0.20 – V+ - 1.5 V ICC Supply Current Normal Operation VOUT = VS/2 9.6 11.5 13.5 mA Shutdown SD tied to ≤ 0.5V (Note 5) 100 VOH1 Output High Voltage (Relative to V+) RL = 150Ω to V– VOH2 RL = 75Ω to VS/2 VOH3 RL = 10 kΩ to V– –210 –480 –190 –190 –60 –110 +5 VOL2 RL = 75Ω to VS/2 +120 VOL3 RL = 10 kΩ to V– +5 IO Output Low Voltage (Relative to V– ) Output Current IO_1 Load VOUT < 0.6V from Respective Supply Source Output Load Rating RO_Enabled Output Resistance +45 +125 mV +45 +125 150 Sink VOUT = VS/2, VID = ± 18 mV (Note 10) mV –12 RL = 150Ω to V– VOL1 nA 180 mA ± 100 THD < −30 dBc, f = 200 kHz, RL tied to VS/2, VOUT = 4 VPP 20 Ω Enabled, AV = +1 0.2 Ω RO_Disabled Output Resistance Shutdown > 100 MΩ CO_Disabled Output Capacitance Shutdown 5.0 pF Miscellaneous Performance VDMAX Voltage Limit for Disable (Pin 5) (Note 5) 0 0.5 VDMIN Voltage Limit for Enable (Pin 5) (Note 5) 4.5 5.0 Ii Logic Input Current (Pin 5) V_glitch Turn-on Glitch Ton Toff IsolationOFF Off Isolation T_OL Overload Recovery SD = 5V (Note 5) V V 10 pA 2.2 V Turn-on Time 1.4 µs Turn-off Time 520 ns 60 dB < 20 ns 1 MHz, RL = 1 kΩ 3 www.national.com LMH6601 5V Electrical Characteristics Single Supply with VS= 5V, AV = +2, RF = 604Ω, SD tied to V+, VOUT = VS/2, LMH6601 3.3V Electrical Characteristics VOUT Single Supply with VS= 3.3V, AV = +2, RF = 604Ω, SD tied to V+, = VS/2, RL = 150Ω to V unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2) − Symbol Parameter Condition Min Typ Max (Note 6) (Note 6) (Note 6) Units Frequency Domain Response SSBW –3 dB Bandwidth Small Signal SSBW_1 VOUT = 0.25 VPP 125 VOUT = 0.25 VPP, AV = +1 250 Peak Peaking VOUT = 0.25 VPP, AV = +1 Peak_1 Peaking VOUT = 0.25 VPP LSBW –3 dB Bandwidth Large Signal VOUT = 2 V Peak_2 Peaking VOUT = 2 VPP 3 PP dB 75 MHz 0 dB MHz 0.1 dB Bandwidth VOUT = 2 VPP 30 GBWP_1k Gain Bandwidth Product Unity Gain, RL = 1 kΩ to VS/2 115 Unity Gain, RL = 150Ω to VS/2 105 AVOL Large Signal Open Loop Gain 0.3V < VOUT < 3V PBW Full Power BW –1 dB, AV = +4, VOUT = 2.8VPP, RL = 150Ω to VS/2 DG Differential Gain DP Differential Phase 56 dB 0.05 0.1 dB BW GBWP_150 MHz MHz 67 dB 30 MHz 4.43 MHz, 0.85V ≤ VOUT ≤ 2.45V, RL = 150Ω to V− 0.0.6 % 4.43 MHz, 0.85V ≤ VOUT ≤ 2.45V RL = 150Ω to V− 0.23 deg Time Domain Response TRS/TRL Rise & Fall Time 0.25V Step 2.7 ns OS Overshoot 0.25V Step 10 % SR Slew Rate 2V Step 260 V/µs TS Settling Time 1V Step, ± 0.1% 70 1V Step, ± 0.02% 300 TS_1 ns PD Propagation Delay Input to Output, 250 mV Step, 50% 2.6 ns CL Cap Load Tolerance AV = −1, 10% Overshoot, 82Ω in Series 50 pF 2 VPP, 10 MHz −61 2 VPP, 10 MHz RL = 1 kΩ to VS/2 −79 Distortion & Noise Performance HD2 Harmonic Distortion (2nd) HD2_1 HD3 Harmonic Distortion (3rd) HD3_2 THD Total Harmonic Distortion VN1 Input Voltage Noise VN2 IN Input Current Noise dBc 2 VPP, 10 MHz −53 2 VPP, 10 MHz RL = 1 kΩ to VS/2 −69 dBc 2 VPP, 10 MHz RL = 1 kΩ to VS/2 −66 dBc > 10 MHz 7 1 MHz 10 > 1 MHz 50 nV/ fA/ Static, DC Performance ±1 ± 2.6 ± 5.5 VIO Input Offset Voltage DVIO Input Offset Voltage Average Drift (Note 8) −4.5 IB Input Bias Current (Note 9) 5 50 IOS Input Offset Current (Note 9) 2 25 RIN Input Resistance CIN Input Capacitance www.national.com 4 mV µV/˚C pA pA > 100 GΩ 1.4 pF LMH6601 3.3V Electrical Characteristics Single Supply with VS= 3.3V, AV = +2, RF = 604Ω, SD tied to V+, VOUT = VS/2, RL = 150Ω to V− unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2) (Continued) Symbol Parameter Condition Min Typ Max (Note 6) (Note 6) (Note 6) Units +PSRR Positive Power Supply Rejection Ratio DC 61 51 80 dB −PSRR Negative Power Supply Rejection Ratio DC 57 52 72 dB CMRR Common Mode Rejection Ratio DC 58 55 73 dB CMVR Input Voltage Range CMRR > 50 dB V− -0.20 – V+ -1.5 V ICC Supply Current Normal Operation VOUT = VS/2 9.2 11 13 mA Shutdown SD tied to ≤ 0.33V (Note 5) 100 VOH1 Output High Voltage (Relative to V+) RL = 150Ω to V– VOH2 RL = 75Ω to VS/2 VOH3 − RL = 10 kΩ to V –210 –360 –190 –190 –50 –100 +4 VOL2 RL = 75Ω to VS/2 +105 VOL3 RL = 10 kΩ to V– +4 IO Output Low Voltage (Relative to V– ) Output Current Source Output Load Rating +45 +125 mV +45 +125 50 Sink VOUT = VS/2, VID = ± 18 mV (Note 10) IO_1 Load VOUT < 0.6V from Respective Supply mV –10 RL = 150Ω to V– VOL1 nA 75 mA ± 75 THD < −30 dBc, f = 200 kHz, RL tied to VS/2, VOUT = 2.6 VPP Ω 25 RO_Enabled Output Resistance Enabled, AV = +1 0.2 Ω RO_Disabled Output Resistance Shutdown > 100 MΩ CO_Disabled Output Capacitance Shutdown 5.6 pF Miscellaneous Performance VDMAX Voltage Limit for Disable (Pin 5) (Note 5) 0 0.33 V VDMIN Voltage Limit for Enable (Pin 5) (Note 5) 2.97 3.3 V Ii Logic Input Current (Pin 5) V_glitch Turn-on Glitch 1.6 V Ton Turn-on Time 3.5 µs Toff Turn-off Time IsolationOFF Off Isolation SD = 3.3V (Note 5) 1 MHz, RL = 1 kΩ 5 8 pA 500 ns 60 dB www.national.com LMH6601 2.7V Electrical Characteristics Single Supply with VS = 2.7V, AV = +2, RF = 604Ω, SD tied to V+, VOUT = VS/2, RL = 150Ω to V unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2) − Symbol Parameter Condition Min Typ Max (Note 6) (Note 6) (Note 6) Units Frequency Domain Response SSBW –3 dB Bandwidth Small Signal SSBW_1 VOUT = 0.25 VPP 120 VOUT = 0.25 VPP, AV = +1 250 MHz Peak Peaking VOUT = 0.25 VPP, AV = +1 3.1 Peak_1 Peaking VOUT = 0.25 VPP 0.1 dB LSBW –3 dB Bandwidth Large Signal VOUT = 2 V 73 MHz Peak_2 Peaking VOUT = 2 VPP 0 dB MHz PP 0.1 dB BW 0.1 dB Bandwidth VOUT = 2VPP 30 GBWP_1k Gain Bandwidth Product Unity Gain, RL = 1 kΩ to VS/2 110 Unity Gain, RL = 150Ω to VS/2 81 GBWP_150 AVOL Large Signal Open Loop Gain 0.25V < VOUT < 2.5V PBW Full Power BW –1 dB, AV = +4, VOUT = 2 VPP, RL = 150Ω to VS/2 DG Differential Gain DP Differential Phase 56 dB MHz 65 dB 13 MHz 4.43 MHz, 0.45V ≤ VOUT ≤ 2.05V RL = 150Ω to V− 0.12 % 4.43 MHz, 0.45V ≤ VOUT ≤ 2.05V RL = 150Ω to V− 0.62 deg Time Domain Response TRS/TRL Rise & Fall Time 0.25V Step 2.7 ns OS Overshoot 0.25V Step 10 % SR Slew Rate 2V Step 260 V/µs TS Settling Time 1V Step, ± 0.1% 147 1V Step, ± 0.02% 410 Input to Output, 250 mV Step, 50% 3.4 ns TS_1 PD Propagation Delay ns Distortion & Noise Performance HD2 Harmonic Distortion (2nd) 1 VPP, 10 MHz −58 dBc HD3 Harmonic Distortion (3rd) 1 VPP, 10 MHz −60 dBc Input Voltage Noise > 10 MHz 8.4 1 MHz 12 > 1 MHz 50 VN1 VN2 IN Input Current Noise nV/ fA/ Static, DC Performance ±1 ± 3.5 ± 6.5 VIO Input Offset Voltage DVIO Input Offset Voltage Average Drift (Note 8) −6.5 IB Input Bias Current (Note 9) 5 50 IOS Input Offset Current (Note 9) 2 25 RIN Input Resistance CIN Input Capacitance +PSRR Positive Power Supply Rejection Ratio DC 58 53 68 −PSRR Negative Power Supply Rejection Ratio DC 56 53 69 CMRR Common Mode Rejection Ratio DC 57 52 77 CMVR Input Voltage Range V− -0.20 – www.national.com CMRR > 50 dB 6 mV µV/˚C pA pA > 100 GΩ 1.6 pF dB dB dB V+ -1.5 V VS/2, RL = 150Ω to V− unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2) (Continued) Symbol ICC VOH1 Parameter Supply Current Output High Voltage (Relative to V+) Condition Min Typ Max (Note 6) (Note 6) (Note 6) Normal Operation VOUT = VS/2 9.0 Shutdown SD tied to ≤ 0.27V (Note 5) 100 RL = 150Ω to V– VOH2 RL = 75Ω to VS/2 VOH3 RL = 10 kΩ to V– –260 –420 RL = 75Ω to VS/2 +125 VOL3 – IO Output Current VOUT ≤ 0.6V from Respective Supply VOUT = VS/2, VID = ± 18 mV (Note 10) IO_1 +4 Source 25 Sink 62 Source 25 Sink 35 mV –10 VOL2 RL = 10 kΩ to V nA –200 –50 100 +4 Output Low Voltage (Relative to V– ) mA –200 RL = 150Ω to V– VOL1 10.6 12.5 Units +45 +125 mV +45 125 mA Load Output Load Rating THD < −30 dBc, f = 200 kHz, RL tied to VS/2, VOUT = 2.2 VPP 40 Ω RO_Enable Output Resistance Enabled, AV = +1 0.2 Ω RO_Disabled Output Resistance Shutdown > 100 MΩ CO_Disabled Output Capacitance Shutdown 5.6 pF Miscellaneous Performance VDMAX Voltage Limit for Disable (Pin 5) (Note 5) 0 0.27 VDMIN Voltage Limit for Enable (Pin 5) (Note 5) 2.43 2.7 Ii Logic Input Current (Pin 5) V_glitch Turn-on Glitch 1.2 V Ton Turn-on Time 5.2 µs Toff Turn-off Time IsolationOFF Off Isolation SD = 2.7V (Note 5) 1 MHz, RL = 1 kΩ 4 V V pA 760 ns 60 dB Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Note 3: The maximum continuous output current (IOUT) is determined by device power dissipation limitations. Note 4: Human Body Model is 1.5 kΩ in series with 100 pF. Machine Model is 0Ω in series with 200 pF. Note 5: SD logic is CMOS compatible. To ensure proper logic level and to minimize power supply current, SD should typically be less than 10% of total supply voltage away from either supply rail. Note 6: Typical numbers are the most likely parametric norm. Bold numbers refer to over temperature limits. Note 7: Negative input current implies current flowing out of the device. Note 8: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. Note 9: Guaranteed by design. Note 10: “VID” is input differential voltage (input overdrive). 7 www.national.com LMH6601 2.7V Electrical Characteristics Single Supply with VS = 2.7V, AV = +2, RF = 604Ω, SD tied to V+, VOUT = LMH6601 Connection Diagram 6-Pin SC70 20136401 Top View Ordering Information Package 6-Pin SC70 www.national.com Part Number LMH6601MG LMH6601MGX Package Marking Transport Media 1k Units Tape and Reel A95 3k Units Tape and Reel 8 NSC Drawing MAA06A Frequency Response for Various Output Amplitudes Frequency Response for Various Output Amplitudes 20136414 20136413 Frequency Response for Various Output Amplitudes −3 dB BW vs. Supply Voltage for Various Output Swings 20136420 20136415 Non-inverting Frequency Response for Various Gain Inverting Frequency Response for Various Gain 20136416 20136417 9 www.national.com LMH6601 Typical Performance Characteristics Unless otherwise noted, all data is with AV = +2, RF = RG = 604Ω, VS = 3.3V, VOUT = VS/2, SD tied to V+, RL = 150Ω to V−, T = 25˚C. LMH6601 Typical Performance Characteristics Unless otherwise noted, all data is with AV = +2, RF = RG = 604Ω, VS = 3.3V, VOUT = VS/2, SD tied to V+, RL = 150Ω to V−, T = 25˚C. (Continued) Frequency Response for Various Loads Frequency Response for Various Supply Voltages 20136419 20136421 −3 dB BW vs. Ambient Temperature Frequency Response for Various Cap Load 20136422 20136418 Frequency Response for Various Supply Voltage Max Output Swing vs. Frequency 20136426 20136441 www.national.com 10 Output Swing vs. Sink Current for Various Supply Voltages Peak Output Swing vs. RL 20136427 20136464 Output Swing vs. Source Current for Various Supply Voltages HD2 vs. Frequency 20136404 20136465 HD3 vs. Frequency THD vs. Output Swing 20136405 20136402 11 www.national.com LMH6601 Typical Performance Characteristics Unless otherwise noted, all data is with AV = +2, RF = RG = 604Ω, VS = 3.3V, VOUT = VS/2, SD tied to V+, RL = 150Ω to V−, T = 25˚C. (Continued) LMH6601 Typical Performance Characteristics Unless otherwise noted, all data is with AV = +2, RF = RG = 604Ω, VS = 3.3V, VOUT = VS/2, SD tied to V+, RL = 150Ω to V−, T = 25˚C. (Continued) THD vs. Output Swing Slew Rate vs. Ambient Temperature 20136423 20136403 Settling Time ( ± 1%) vs. Output Swing Output Settling 20136412 20136411 Isolation Resistor & Settling Time vs. CL Isolation Resistor & Settling Time vs. CL 20136429 20136428 www.national.com 12 Closed Loop Output Impedance vs. Frequency for Various Supply Voltages Off Isolation vs. Frequency 20136410 20136408 Noise Voltage vs. Frequency Open Loop Gain/ Phase 20136435 20136424 CMRR vs. Frequency +PSRR vs. Frequency 20136425 20136439 13 www.national.com LMH6601 Typical Performance Characteristics Unless otherwise noted, all data is with AV = +2, RF = RG = 604Ω, VS = 3.3V, VOUT = VS/2, SD tied to V+, RL = 150Ω to V−, T = 25˚C. (Continued) LMH6601 Typical Performance Characteristics Unless otherwise noted, all data is with AV = +2, RF = RG = 604Ω, VS = 3.3V, VOUT = VS/2, SD tied to V+, RL = 150Ω to V−, T = 25˚C. (Continued) −PSRR vs. Frequency Supply Current vs. Ambient Temperature 20136433 20136440 Supply Current vs. VCM Supply Current vs. Supply Voltage 20136437 20136467 Offset Voltage vs. Ambient Temperature for 3 Representative Units Offset Voltage Distribution 20136434 www.national.com 20136436 14 Offset Voltage vs. VCM (Typical Part) Input Bias Current vs. Common Mode Voltage 20136438 20136442 Small Signal Step Response Large Signal Step Response 20136430 20136431 Large Signal Step Response Turn On/Off Waveform 20136466 20136432 15 www.national.com LMH6601 Typical Performance Characteristics Unless otherwise noted, all data is with AV = +2, RF = RG = 604Ω, VS = 3.3V, VOUT = VS/2, SD tied to V+, RL = 150Ω to V−, T = 25˚C. (Continued) LMH6601 Typical Performance Characteristics Unless otherwise noted, all data is with AV = +2, RF = RG = 604Ω, VS = 3.3V, VOUT = VS/2, SD tied to V+, RL = 150Ω to V−, T = 25˚C. (Continued) DG vs. VOUT for Various VS DP vs. VOUT for Various VS 20136472 20136471 DG vs. VOUT (DC and AC Coupled Load Compared) DP vs. VOUT (DC and AC Coupled Load Compared) 20136473 www.national.com 20136474 16 LMH6601 Application Information OPTIMIZING PERFORMANCE With many op amps, additional device non-linearity and sometimes less loop stability arises when the output has to switch from current-source mode to current-sink mode or vice versa. When it comes to achieving the lowest distortion and the best Differential Gain/ Differential Phase (DG/ DP, broadcast video specs), the LMH6601 is optimized for single supply DC coupled output applications where the load current is returned to the negative rail (V−). That is where the output stage is most linear (lowest distortion) and which corresponds to unipolar current flowing out of this device. To that effect, it is easy to see that the distortion specifications improve when the output is only sourcing current which is the distortion-optimized mode of operation for the LMH6601. In application where the LMH6601 output is AC coupled or when it is powered by separate dual supplies for V+ and V−, the output stage supplies both source and sink current to the load and results in less than optimum distortion (and DG/ DP). Figure 1 compares the distortion results between a DC and an AC coupled load to show the magnitude of this difference. See the DG/DP plots in the Typical Performance Characteristics section for a comparison between DC and AC coupling of the video load. 20136470 FIGURE 2. Output Pull-Down Value for Dual Supply & AC Coupling Furthermore, with a combination of low closed loop gain setting (i.e. AV = +1 for example where device bandwidth is the highest), light output loading (RL > 1 kΩ) , and with a significant capacitive load (CL > 10 pF) , the LMH6601 is most stable if output sink current is kept to less than about 5 mA. The pull-down method described in Figure 2 is applicable in these cases as well where the current that would normally be sunk by the op amp is diverted to the RP path instead. SHUTDOWN CAPABILITY AND TURN ON/ OFF BEHAVIOR With the device in shutdown mode, the output goes into high impedance (ROUT > 100 MΩ) mode. In this mode, the only path between the inputs and the output pin is through the external components around the device. So, for applications where there is active signal connection to the inverting input, with the LMH6601 in shutdown, the output could show signal swings due to current flow through these external components. For non-inverting amplifiers in shutdown, no output swings would occur, because of complete input-output isolation, with the exception of capacitive coupling. For maximum power saving, the LMH6601 supply current drops to around 0.1 µA in shutdown. All significant power consumption within the device is disabled for this purpose. Because of this, the LMH6601 turn on time is measured in micro-seconds whereas its turn off is fast (nano-seconds) as would be expected from a high speed device like this. The LMH6601 SD pin is a CMOS compatible input with a pico-ampere range input current drive requirement. This pin needs to be tied to a level or otherwise the device state would be indeterminate. The device shutdown threshold is half way between the V+ and V− pin potentials at any supply voltage. For example, with V+ tied to 10V and V− equal to 5V, you can expect the threshold to be at 7.5V. The state of the device (shutdown or normal operation) is guaranteed over temperature as longs as the SD pin is held to within 10% of the total supply voltage. For V+ = 10V, V− = 5V, as an example: 5V ≤ SD ≤ 5.5V • Shutdown Range 9.5V ≤ SD ≤ 10V • Normal Operation Range 20136406 FIGURE 1. Distortion Comparison between DC & AC Coupling of the Load In certain applications, it may be possible to optimize the LMH6601 for best distortion (and DG/DP) even though the load may require bipolar output current by adding a pulldown resistor to the output. Adding an output pull-down resistance of appropriate value could change the LMH6601 output loading into source-only. This comes at the price of higher total power dissipation and increased output current requirement. Figure 2 shows how to calculate the pull-down resistor value for both the dual supply and for the AC coupled load applications. 17 www.national.com LMH6601 Application Information With some op amps, when the output approaches either one or both rails and saturation starts to set in, there is significant increase in the transistor parasitic capacitances which leads to loss of Phase Margin. That is why with these devices, there are sometimes hints of instability with output close to the rails. With the LMH6601, as can be seen in Figure 4, the output waveform remains free of instability throughout its range of voltages. (Continued) OVERLOAD RECOVERY AND SWING CLOSE TO RAILS The LMH6601 can recover from an output overload in less than 20 ns. See Figure 3 below for the input and output scope photos: SINGLE SUPPLY VIDEO APPLICATION The LMH6601’s high speed and fast slew rate make it an ideal choice for video amplifier and buffering applications. There are cost benefits in having a single operating supply. Single supply video systems can take advantage of the LMH6601’s low supply voltage operation along with its ability to operate with input common mode voltages at or slightly below the V− rail. Additional cost savings can be achieved by eliminating or reducing the value of the input and output AC coupling capacitors commonly employed in single supply video applications. This Application section shows some circuit techniques used to help in doing just that. DC COUPLED, SINGLE SUPPLY BASEBAND VIDEO AMPLIFIER/DRIVER The LMH6601 output can swing very close to either rail to maximize the output dynamic range which is of particular interest when operating in a low voltage single supply environment. Under light output load conditions, the output can swing as close as a few milli-volts of either rail. This also allows a video amplifier to preserve the video black level for excellent video integrity. In the example shown below in Figure 5, the baseband video output is amplified and buffered by the LMH6601 which then drives the 75Ω back terminated video cable for an overall gain of +1 delivered to the 75Ω load. The input video would normally have a level between 0V to approximately 0.75V. 20136407 FIGURE 3. LMH6601 Output Overload Recovery Waveform In Figure 3, the input step function is set so that the output is driven to one rail and then the other and then the output recovery is measured from the time the input crosses 0V to when the output reaches this point. Also, when the LMH6601 input voltage range is exceeded near the V+ rail, the output does not experience output phase reversal, as some op amps do. This is particularly advantageous in applications where output phase reversal has to be avoided at all costs, such as in servo loop control among others. This adds to the LMH6601’s set of features which make this device easy to use. In addition, the LMH6601’s output swing close to either rail is well-behaved as can be seen in the scope photo of Figure 4. 20136444 FIGURE 5. Single Supply Video Driver Capable of Maintaining Accurate Video Black Level 20136443 FIGURE 4. LMH6601’s “Clean” Swing to Either Rail www.national.com 18 LMH6601 Application Information (Continued) With the LMH6601 input common mode range including the V− (ground) rail, there will be no need for AC coupling or level shifting and the input can directly drive the noninverting input which has the additional advantage of high amplifier input impedance. With LMH6601’s wide rail-to-rail output swing, as stated earlier, the video black level of 0V is maintained at the load with minimal circuit complexity and using no AC coupling capacitors. Without true rail-to-rail output swing of the LMH6601, and more importantly without the LMH6601’s ability of exceedingly close swing to V−, the circuit would not operate properly as shown at the expense of more complexity. This circuit will also work for higher input voltages. The only significant requirement is that there is at least 1.8V from the maximum input voltage to the positive supply (V+). 20136446 FIGURE 7. Single Supply DC Coupled Composite Video Driver for Negative Going Sync Tip The Composite Video Output of some low cost consumer video equipment consists of a current source which develops the video waveform across a load resistor (usually 75Ω), as shown in Figure 6 below. With these applications, the same circuit configuration just described and shown in Figure 6 will be able to buffer and drive the Composite Video waveform which includes sync and video combined. However, with this arrangement, the LMH6601 supply voltage needs to be at least 3.3V or higher in order to allow proper input common mode voltage headroom because the input can be as high as 1V peak. In the circuit of Figure 7, the input is shifted positive by means of R1, R2, and RT in order to satisfy U1’s Common Mode input range. The signal will loose 20% of its amplitude in the process. The closed loop gain of U1 will need to be set to make up for this 20% loss in amplitude. This gives rise to the gain expression shown below which is based on a getting a 2 VPP output with a 0.8 VPP input: (1) R3 will produce a negative shift at the output due to VS (3.3V in this case). R3 will need to be set so that the “Video In” sync tip (−0.3V at RT or 0.61V at U1 non-inverting input) corresponds to near 0V at the output. (2) Equation (1) and Equation (2) need to be solved simultaneously to arrive at the values of R3, RF, and RG which will satisfy both. From the datasheet, one can set RF = 620Ω to be close to the recommended value for a gain of +2. It is easier to solve for RG and R3 by starting with a good estimate for one and iteratively solving Equation and Equation (2) to arrive at the results. Here is one possible iteration cycle for reference: 20136445 FIGURE 6. Single Supply Composite Video Driver for Consumer Video Outputs If the “Video In” signal is Composite Video with negative going Sync tip, a variation of the previous configurations should be used. This circuit produces a unipolar (above 0V) DC coupled single supply video signal as shown in Figure 7. 19 www.national.com LMH6601 Application Information RF = 620Ω (Continued) TABLE 1. Finding Figure 7 External Resistor Values by Iteration Estimate RG (Ω) Calculated (from Equation (2)) R3 (Ω) Equation (1) LHS Calculated 1k 1.69k 0.988 Increase Equation (1) LHS by reducing RG 820 1.56k 1.15 Increase Equation (1) LHS by reducing RG 620 1.37k 1.45 Increase Equation (1) LHS by reducing RG 390 239 4.18 Reduce Equation (1) LHS by increasing RG 560 1.30k 1.59 Close to target value of 1.5V/V for Equation (1) The final set of values for RG and R3 in Table 1 are values which will result in the proper gain and correct video levels (0V to 1V) at the output (VLOAD). Comment (Compare Equation (1) LHS Calculated to RHS) Because of the DC bias at the output, the load needs to be AC coupled as well through CO. Some applications implement a small valued ceramic capacitor (not shown) in parallel with CO which is electrolytic. The reason for this is that the ceramic capacitor will tend to shunt the inductive behavior of the Electrolytic capacitor at higher frequencies for an improved overall low impedance output. CG2 is intended to boost the high frequency gain in order to improve the video frequency response. This value is to be set and trimmed on the board to meet the application’s specific system requirements. AC COUPLED VIDEO Many monitors and displays accept AC coupled inputs. This simplifies the amplification and buffering task in some respects. As can be seen in Figure 8, R1 and R2 simply set the input to the center of the input linear range while CIN AC couples the video onto the op amp’s input. The op amp is set for a closed loop gain of 2 with RF and RG. CG is there to make sure the device output is also biased at mid-supply. 20136449 FIGURE 8. AC Coupled Video Amplifier/Driver coupling scheme due to the low frequency limit of this circuit. The −3 dB low frequency limit of the output circuit is given by: f_low_frequency (−3 dB)= 1/ (2*pi* 75*2(Ω) * CO) (3) = ∼ 4.82 Hz For CO = 220 µF A possible implementation of the SAG compensation is shown in Figure 9. SAG COMPENSATION The capacitors shown in Figure 8 (except CG2), and especially CO, are the large electrolytic type which are considerably costly and take up valuable real estate on the board. It is possible to reduce the value of the output coupling capacitor, CO, which is the largest of all, by using what is called SAG compensation. SAG refers to what the output video experiences due to the low frequency video content it contains which cannot adequately go through the output AC www.national.com 20 LMH6601 Application Information (Continued) 20136450 FIGURE 9. AC Coupled Video Amplifier/Driver with SAG Compensation In this circuit, the output coupling capacitor value and size is greatly reduced at the expense of slightly higher op amp output voltage drive. Note that C1 is not only part of the SAG compensation, but it also sets the amplifier’s DC gain to 0 dB so that the output is set to mid-rail for linearity purposes. Also note that exceptionally high values are chosen for the R1 and R2 biasing resistors (510 kΩ). The LMH6601 has extremely low input bias current which allows this selection thereby reducing the CIN value in this circuit such that CIN can even be a non-polar capacitors which will reduce cost. At high enough frequencies where both CO and C1 can be considered to be shorted out, R3 shunts R4 and the closed loop gain is determined by: Closed_loop_Gain (V/V)= VL/VIN = (1+ (R3||R4)/ R5) (4) [RL/(RL+RO)]= 1V/V At intermediate frequencies, where the CO, RO, RL path experiences low frequency gain loss, the R3, R5, C1 path provides feedback from the load side of CO. With the load side gain reduced at these lower frequencies, the feedback to the op amp inverting node reduces, causing an increase at the op amp’s output as a response. For NTSC video, low values of CO influence how much video black level shift occurs during the vertical blanking interval (∼1.5 ms) which has no video activity and thus is sensitive to CO’s charge dissipation through the load which could cause output SAG. An especially tough pattern is the NTSC pattern called “Pulse & Bar.” With this pattern the entire top and bottom portion of the field is black level video where for about 8.5 ms CO is discharging through the load with no video activity to replenish that charge. Figure 10 shows the output of the Figure 9 circuit with the scope’s cursors pointing to the SAG. 20136451 FIGURE 10. Figure 9 Scope Photo Showing Video SAG There is a subtlety with the additional output drive in the SAG correction circuit, compared to a circuit with no SAG compensation, especially when using lower power supply voltages. This will be explained later after a brief introduction, below, on the effects of AC coupling on output swing. With the circuit of Figure 9 and any other AC coupled pulse amplifier, the waveform duty cycle variations exert additional restrictions on voltage swing at any node. This is illustrated in the waveforms shown in Figure 11. 21 www.national.com LMH6601 Application Information (Continued) 20136452 FIGURE 11. Headroom Considerations with AC Coupled Amplifiers If a stage has a 3 VPP unclipped swing available at a given node, as shown in Figure 11, the maximum allowable amplitude for an arbitrary waveform is 1⁄2 of 3V or 1.5 VPP. This is due to the shift in the average value of the waveform as the duty cycle varies. Figure 11 shows what would happen if a 2 VPP signal were applied. A low duty cycle waveform, such as the one in Figure 11B, would have high positive excursions. At low enough duty cycles, the waveform could get clipped on the top, as shown, or a more subtle loss of linearity could occur prior to full-blown clipping. The converse of this occurs with high duty cycle waveforms and negative clipping, as depicted in Figure 11C. Now, let’s get back to discussing the SAG compensation output swing subtlety hinted at earlier. For the Figure 9 circuit, with a 1 VPP Composite Video input, the op amp output will swing 2 VPP because the stage gain is set to 2 V/V. With the output set to VCC/2 (2.5V in this case), the op amp output voltage will range from 0.5V to 4.5V, assuming video duty cycle variation of 100% to 0% respectively. In reality, the duty cycle only approaches these extreme end points and it never quite gets there. Figure 12 shows the measured response of this circuit to show the worst case swing at the op amp output pin. Note that the extra output drive at the op amp output for SAG compensation, which shows up as a tilt in the upper video waveform, could cause clipping as the output swings even closer to the rails. www.national.com 20136453 FIGURE 12. SAG Compensation Requires Higher Swing at op amp Output 22 sheet tables) as video signals could be as large as 2 VPP when applied to the commonly used gain of +2 configuration. Because of this relatively large swing, the op amp Slew Rate (SR) limitation should also be considered. Table 2 shows these requirements for various video line rates calculated using a rudimentary technique and intended as a first order estimate only. (Continued) HOW TO PICK THE RIGHT VIDEO AMPLIFIER Apart from output current drive and voltage swing, the op amp used for a video amplifier/cable driver should also possess the minimum requirement for speed and slew rate. For video type loads, it is best to consider Large Signal Bandwidth (or LSBW in the National Semiconductor data TABLE 2. Rise Time, −3 dB BW, and Slew Rate Requirements for Various Video Line Rates Video Standard Line Rate (HxV) Refresh Rate (Hz) Horizontal Active (KH%) Vertical Active (KV%) Pixel Time (ns) Rise Time (ns) TV_NTSC 451x483 30 84 92 118.3 39.4 9 41 VGA 640x480 75 80 95 33.0 11.0 32 146 SVGA 800x600 75 76 96 20.3 6.8 52 237 XGA 1024x768 75 77 95 12.4 4.1 85 387 SXGA 1280x1024 75 75 96 7.3 2.4 143 655 UXGA 1600x1200 75 74 96 4.9 1.6 213 973 For any video line rate (HxV corresponding to the number of Active horizontal and vertical lines), the speed requirements can be estimated if the Horizontal Active (KH%) and Vertical Active (KV%) numbers are known. These percentages correspond to the percentages of the active number of lines (horizontal or vertical) to the total number of lines as set by VESA standards. Here are the general expressions and the specific calculations for the SVGA line rate shown in Table 2. LSBW (MHz) SR (V/µs) The LMH6601 specifications show that it would be a suitable choice for video amplifiers up to and including the SVGA line rate as demonstrated above. For more information about this topic and others relating to video amplifiers, please see Application Note 1013: http://www.national.com/an/AN/AN-1013.pdf#page=1 CURRENT TO VOLTAGE CONVERSION (TRANSIMPEDANCE AMPLIFIER (TIA)) Being capable of high speed and having ultra low input bias current makes the LMH6601 a natural choice for Current to Voltage applications such as photodiode I-V conversion. In these type of applications, as shown in Figure 13 below, the photodiode is tied to the inverting input of the amplifier with RF set to the proper gain (gain is measured in Ohms). (5) Requiring that an “On” pixel is illuminated to at least 90% of its final value before changing state will result in the rise/fall time equal to, at most, 1⁄3 the pixel time as shown below: (6) Assuming a single pole frequency response roll-off characteristic for the closed loop amplifier used, we have: (7) Rise/Fall times are 10%-90% transition times, which for a 2 VPP video step would correspond to a total voltage shift of 1.6V (80% of 2V). So, the Slew Rate requirement can be calculated as follows: 20136458 FIGURE 13. Typical Connection of a Photodiode Detector to an op amp (8) 23 www.national.com LMH6601 Application Information LMH6601 Application Information (Continued) With the LMH6601 input bias current in the femto-amperes range, even large values of gain (RF) do not increase the output error term appreciably. This allows circuit operation to a lower light intensity level which is always of special importance in these applications. Most photo-diodes have a relatively large capacitance (CD) which would be even larger for a photo-diode designed for higher sensitivity to light because of its larger area. Some applications may run the photodiode with a reverse bias in order to reduce its capacitance with the disadvantage of increased contributions from both dark current and noise current. Figure 14 shows a typical photodiode capacitance plot vs. reverse bias for reference. 20136460 FIGURE 15. Transimpedance Amplifier Graphical Stability Analysis and Compensation Figure 15 shows that placing a capacitor, CF, with the proper value, across RF will create a pole in the NG function at fP. For optimum performance, this capacitor is usually picked so that NG is equal to the op amp’s open loop gain at fP. This will cause a “flattening” of the NG slope beyond the point of intercept of the two plots (open loop gain and NG) and will results in a Phase Margin (PM) of 45˚ assuming fP and fZ are at least a decade apart. This is because at the point of intercept, the NG pole at fP will have a 45˚ phase lead contribution which leaves 45˚ of PM. For reference, Figure 15 also shows the transimpedance gain (I-V (Ω)) Here is the theoretical expression for the optimum CF value and the expected −3 dB bandwidth: 20136459 FIGURE 14. Typical Capacitance vs. Reverse Bias (Source: OSI Optoelectronics) The diode capacitance (CD) along with the input capacitance of the LMH6601 (CA) has a bearing on the stability of this circuit and how it is compensated. With large transimpedance gain values (RF), the total combined capacitance on the amplifier inverting input (CIN = CD + CA) will work against RF to create a zero in the Noise Gain (NG) function (see Figure 15). If left untreated, at higher frequencies where NG equals the open loop transfer function there will be excess phase shift around the loop (approaching 180˚) and therefore, the circuit could be unstable. This is illustrated in Figure 15. www.national.com (9) (10) Table 3, below, lists the results, along with the assumptions and conditions, of testing the LMH6601 with various photodiodes having different capacitances (CD) at a transimpedance gain (RF) of 10 kΩ. 24 LMH6601 Application Information (Continued) TABLE 3. Transimpedance Amplifier Figure 13 Compensation and Performance Results CD (pF) CIN (pF) CF_Calculated (pF) CF used (pF) 10 12 1.1 1 14 15 6 50 52 2.3 3 7 7.0 4 500 502 7.2 8 2 2.5 9 −3 dB BW −3 dB BW Calculated (MHz) Measured (MHz) CA = 2 pF GBWP = 155 MHz VS = 5V Step Response Overshoot (%) CAPACITIVE LOAD The LMH6601 can drive a capacitive load of up to 1000 pF with correct isolation and compensation. Figure 17 illustrates the in-loop compensation technique to drive a large capacitive load. TRANSIMPEDANCE AMPLIFIER NOISE CONSIDERATIONS When analyzing the noise at the output of the I-V converter, it is important to note that the various noise sources (i.e. op amp noise voltage, feedback resistor thermal noise, input noise current, photodiode noise current) do not all operate over the same frequency band. Therefore, when the noise at the output is calculated, this should be taken into account. The op amp noise voltage will be gained up in the region between the noise gain’s “zero” and its “pole” (fz and fp in Figure 15). The higher the values of RF and CIN, the sooner the noise gain peaking starts and therefore its contribution to the total output noise would be larger. It is obvious to note that it is advantageous to minimize CIN (e.g. by proper choice of op amp, by applying a reverse bias across the diode at the expense of excess dark current and noise). However, most low noise op amps have a higher input capacitance compared to ordinary op amps. This is due to the low noise op amp’s larger input stage. 20136468 FIGURE 17. In-Loop Compensation Circuit for Driving a Heavy Capacitive Load When driving a high capacitive load, an isolation resistor (RS) should be connected in series between the op amp output and the capacitive load to provide isolation and to avoid oscillations. A small value capacitor (CF) is inserted between the op amp output and the inverting input as shown such that this capacitor becomes the dominant feedback path at higher frequency. Together these components allow heavy capacitive loading while keeping the loop stable. There are few factors which affect the driving capability of the op amp: • Op amp internal architecture OTHER APPLICATIONS • Closed loop gain and output capacitor loading Table 4 shows the measured step response for various values of load capacitors (CL), series resistor (RS) and feedback resistor (CF) with gain of +2 (RF = RG = 604Ω) and RL = 2 kΩ: TABLE 4. LMH6601 Step Response Summary for the Circuit of Figure 17 20136463 FIGURE 16. Charge Preamplifier Taking Advantage of LMH6601’s Femto-Ampere Range Input Bias Current CL (pF) RS (Ω) CF (pF) trise/ tfall (ns) Overshoot (%) 10 0 1 6* 8 50 0 1 7* 6 110 47 1 10 16 300 6 10 12 20 500 80 10 33 10 910 192 10 65 10 * Response limited by input step generator rise time of 5 ns 25 www.national.com LMH6601 Application Information (Continued) EVALUATION BOARD National Semiconductor provides the following evaluation board as a guide for high frequency layout and as an aid in device testing and characterization. Many of the datasheet plots were measured with this board: Figure 18 shows the increase in rise/fall time (bandwidth decrease) at VOUT with larger capacitive loads, illustrating the trade-off between the two: Device Package Board Part # LMH6601MG SC70-6 LMH730165 This evaluation board can be shipped when a device sample request is placed with National Semiconductor. 20136469 FIGURE 18. LMH6601 In-Loop Compensation Response www.national.com 26 LMH6601 250 MHz, 2.4V CMOS Op Amp with Shutdown Physical Dimensions inches (millimeters) unless otherwise noted 6-Pin SC70 NS Package Number MA006A National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. BANNED SUBSTANCE COMPLIANCE National Semiconductor follows the provisions of the Product Stewardship Guide for Customers (CSP-9-111C2) and Banned Substances and Materials of Interest Specification (CSP-9-111S2) for regulatory environmental compliance. Details may be found at: www.national.com/quality/green. Lead free products are RoHS compliant. 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