LM8272 Dual RRIO, High Output Current & Unlimited Cap Load Op Amp in Miniature Package General Description Features The LM8272 is a Rail-to-Rail input and output Op Amp which can operate with a wide supply voltage range. This device has high output current drive, greater than Rail-to-Rail input common mode voltage range, unlimited capacitive load drive capability while requiring only 0.95mA/channel supply current. It is specifically designed to handle the requirements of flat panel TFT panel VCOM driver applications as well as being suitable for other low power, and medium speed applications which require ease of use and enhanced performance over existing devices. Greater than Rail-to-Rail input common mode voltage range with 50dB of Common Mode Rejection, allows high side and low side sensing, among many applications, without having any concerns over exceeding the range and no compromise in accuracy. Exceptionally wide operating supply voltage range of 2.5V to 24V alleviates any concerns over functionality under extreme conditions and offers flexibility of use in multitude of applications. In addition, most device parameters are insensitive to power supply variations; this design enhancement is yet another step in simplifying its usage. (VS = 12V, TA = 25˚C, Typical values unless specified). n GBWP 15MHz n Wide supply voltage range 2.5V to 24V n Slew rate 15V/µs n Supply current/channel 0.95mA n Cap load tolerance Unlimited ± 130mA n Output short circuit current ± 65mA n Output current (1V from rails) n Input common mode voltage 0.3V beyond rails n Input voltage noise 15nV/ n Input current noise 1.4pA/ Applications n n n n TFT-LCD flat panel VCOM driver A/D converter buffer High side/low side sensing Headphone amplifier The LM8272 is offered in the 8-pin MSOP package. Connection Diagram Large Signal Step Response for Various Cap. Load 8-Pin MSOP 10130863 Top View 10130899 Ordering Information Package 8-Pin MSOP Part Number LM8272MM LM8272MMX © 2002 National Semiconductor Corporation DS101308 Package Marking A60 Transport Media 1k Unit Tape and Reel 3.5k Unit Tape and Reel NSC Drawing MUA08A www.national.com LM8272 Dual RRIO, High Output Current & Unlimited Cap Load Op Amp in Miniature Package December 2002 LM8272 Dual Absolute Maximum Ratings Junction Temperature (Note 4) (Note 1) Soldering Information: If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance 2KV (Note 2) 200V(Note 9) VIN Differential +/−10V Output Short Circuit Duration + Supply Voltage (V - V ) V+ +0.3V, V− −0.3V Storage Temperature Range −65˚C to +150˚C 235˚C Wave Soldering (10 sec.) 260˚C Supply Voltage (V+ - V−) 2.5V to 24V Junction Temperature Range(Note 4) 27V Voltage at Input/Output pins Infrared or Convection (20 sec.) Operating Ratings (Notes 3, 11) − +150˚C −40˚C to +85˚C Package Thermal Resistance, θJA,(Note 4) 8-Pin MSOP 235C/W 5V Electrical Characteristics Unless otherwise specified, all limited guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = 0.5V, VO = V+/2, and RL > 1MΩ to V−. Boldface limits apply at the temperature extremes. Symbol Parameter Condition Typ (Note 5) Limit (Note 6) Units VOS Input Offset Voltage VCM = 0.5V & VCM = 4.5V +/−0.7 +/−5 +/− 7 mV max TC VOS Input Offset Average Drift VCM = 0.5V & VCM = 4.5V (Note 12) +/−2 — µV/˚C IB Input Bias Current (Note 7) — ± 2.00 ± 2.70 µA max IOS Input Offset Current 20 250 400 nA max CMRR Common Mode Rejection Ratio VCM stepped from 0V to 5V 80 64 61 dB min +PSRR Positive Power Supply Rejection Ratio V+ from 4.5V to 13V 100 78 74 dB min CMVR Input Common-Mode Voltage Range CMRR > 50dB −0.3 −0.1 0.0 V max 5.3 5.1 5.0 V min 80 64 60 dB min V min AVOL Large Signal Voltage Gain VO = 0.5 to 4.5V, RL = 10kΩ to V+/2 VO Output Swing High RL = 10kΩ to V− 4.93 4.85 ISOURCE = 5mA 4.85 4.70 Output Swing Low RL = 10kΩ to V+ 215 250 ISINK = 5mA 300 350 Output Short Circuit Current Sourcing to V− VID = 200mV (Note 10) 100 — Sinking to V+ VID = −200mV (Note 10) 100 — ISC mV max mA IOUT Output Current VID = ± 200mV, VO = 1V from rails ± 55 — mA IS Supply Current (Both Channel) No load, VCM = 0.5V 1.8 2.3 2.8 mA max SR Slew Rate (Note 8) AV = +1, VI = 5VPP 12 — V/µs + fu Unity Gain Frequency VI = 10mVp, RL = 2KΩ to V /2 7.5 — MHz GBWP Gain-Bandwidth Product f = 50KHz 13 — MHz Phim Phase Margin VI = 10mVp, RL = 2kΩ to V+/2 55 — deg en Input-Referred Voltage Noise f = 2KHz, RS = 50Ω 15 — www.national.com 2 nV/ (Continued) Unless otherwise specified, all limited guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = 0.5V, VO = V+/2, and RL > 1MΩ to V−. Boldface limits apply at the temperature extremes. Symbol Parameter Condition Typ (Note 5) Limit (Note 6) in Input-Referred Current Noise f = 2KHz 1.4 — fmax Full Power Bandwidth ZL = (20pF || 10kΩ) to V+/2 700 — Units pA/ KHz 12V Electrical Characteristics Unless otherwise specified, all limited guaranteed for TJ = 25˚C, V+ = 12V, V− = 0V, VCM = 6V, VO = 6V, and RL > 1MΩ to V−. Boldface limits apply at the temperature extremes. Symbol Parameter Condition Typ (Note 5) Limit (Note 6) Units VOS Input Offset Voltage VCM = 0.5V & VCM = 11.5V +/−0.7 +/−7 +/− 9 mV max TC VOS Input Offset Average Drift VCM = 0.5V & VCM = 11.5V (Note 12) +/−2 — µV/˚C IB Input Bias Current (Note 7) — ± 2.00 ± 2.80 µA max IOS Input Offset Current 30 275 550 nA max CMRR Common Mode Rejection Ratio VCM stepped from 0V to 12V 88 74 72 dB min +PSRR Positive Power Supply Rejection Ratio V+ from 4.5V to 13V, VCM = 0.5V 100 78 74 dB min −PSRR Negative Power Supply Rejection Ratio 85 — dB CMVR Input Common-Mode Voltage Range −0.3 −0.1 0 V max 12.3 12.1 12.0 V min 83 74 70 dB min V min CMRR > 50dB AVOL Large Signal Voltage Gain VO = 1V to 11V RL = 10kΩ to V+/2 VO Output Swing High RL 10kΩ to V+/2 11.8 11.7 ISOURCE = 5mA 11.6 11.5 Output Swing Low RL = 10kΩ to V+/2 0.25 0.3 ISINK = 5mA .40 .45 Output Short Circuit Current Sourcing to V− VID = 200mV (Note 10) 130 110 Sinking to V+ VID = 200mV (Note 10) 130 110 mA min ISC V max IOUT Output Current VID = ± 200mV, VO = 1V from rails ± 65 — mA IS Supply Current (Both Channel) No load, VCM = 0.5V 1.9 2.4 2.9 mA max SR Slew Rate (Note 8) AV = +1, VI = 10VPP, CL = 10pF 15 — AV = +1, VI = 10VPP, CL = 0.1µF 1 — ROUT Close Loop Output Resistance AV = +1, f = 100KHz 3 — Ω fu Unity Gain Frequency VI = 10mVp, RL = 2kΩ to V+/2 8 — MHz GBWP Gain-Bandwidth Product f = 50KHz 15 — MHz Phim Phase Margin VI = 10mVp, RL = 2kΩ to V+/2 57 — Deg 20 — dB GM Gain Margin + VI = 10mVp, RL = 2kΩ to V /2 3 V/µs www.national.com LM8272 Dual 5V Electrical Characteristics LM8272 Dual 12V Electrical Characteristics (Continued) Unless otherwise specified, all limited guaranteed for TJ = 25˚C, V+ = 12V, V− = 0V, VCM = 6V, VO = 6V, and RL > 1MΩ to V−. Boldface limits apply at the temperature extremes. Symbol −3dB BW Parameter Small Signal -3db Bandwidth Condition AV = +1, RL = 2kΩ to V+/2 + Typ (Note 5) Limit (Note 6) 12.5 — AV = +1, RL = 600Ω to V /2 10.5 — AV = +10, RL = 600Ω to V+/2 1.0 — Units MHz en Input-Referred Voltage Noise f = 2KHz, RS = 50Ω 15 — nV/ in Input-Referred Current Noise f = 2KHz 1.4 — pA/ fmax Full Power Bandwidth ZL = (20pF || 10kΩ) to V+/2 300 — KHz THD+N Total Harmonic Distortion +Noise AV = +2, RL = 2kΩ to V+/2 VO = 8VPP, VS = ± 5V 0.02 — % CT Rej. Cross-Talk Rejection f = 5MHz, Driver RL = 10kΩ to V+/2 68 — dB Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Rating indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Human body model, 1.5kΩ in series with 100pF. Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C. Note 4: The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: Positive current corresponds to current flowing into the device. Note 8: Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower. Note 9: Machine Model, 0Ω is series with 200pF. Note 10: Short circuit test is a momentary test. See Note 11. Note 11: Output short circuit duration is infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. Note 12: Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. www.national.com 4 VOS Distribution VOS vs. VCM for 3 Representative Units 101308A2 10130830 VOS vs. VCM for 3 Representative Units VOS vs. VCM for 3 Representative Units 10130829 10130831 VOS vs. VS for 3 Representative Units VOS vs. VS for 3 Representative Units 10130884 10130883 5 www.national.com LM8272 Dual Typical Performance Charateristics LM8272 Dual Typical Performance Charateristics (Continued) VOS vs. VS for 3 Representative Units IB vs. VS 10130882 10130871 IB vs. VS IS vs. VCM 101308A3 10130872 IS vs. VCM IS vs. VS 10130874 10130875 www.national.com 6 LM8272 Dual Typical Performance Charateristics (Continued) IS vs. VS CMRR vs. Frequency 10130887 10130873 +PSRR vs. Frequency −PSRR vs. Frequency 10130888 10130889 Open Loop Gain/Phase for Various Supplies Closed Loop Frequency Response for Various Gains 10130896 10130893 7 www.national.com LM8272 Dual Typical Performance Charateristics (Continued) Closed Loop Frequency Response for Various Gains Closed Loop Frequency Response for Various Gains RL 10130894 10130895 Maximum Output Swing vs. Load (1% Distortion) Maximum Output Swing vs. Frequency (1% Distortion) 10130877 10130876 Closed Loop Small Signal Frequency Response for Various CL Overshoot vs. Cap Load 10130886 www.national.com 10130878 8 LM8272 Dual Typical Performance Charateristics (Continued) VOUT from V+ vs. ISOURCE Settling Time ( ± 1%) & Slew Rate vs. Cap Load 10130898 10130879 VOUT from V− vs. ISINK Step Response for Various Amplitudes 101308A0 10130897 Step Response for Various Amplitudes Large Signal Step Response for Various Cap Loads 101308A1 10130899 9 www.national.com LM8272 Dual Typical Performance Charateristics (Continued) THD+N vs. Input Amplitude for Various Frequency Input Referred Noise Density 10130892 10130880 Closed Loop Output Impedance vs. Frequency Crosstalk Rejection vs. Frequency 10130881 10130885 www.national.com 10 LM8272 Dual Application Notes BLOCK DIAGRAM AND OPEATIONAL DESCRIPTION A) INPUT STAGE: As can be seen from the simplified schematic in Figure 1, the input stage consists of two distinct differential pairs (Q1-Q2 and Q3-Q4) in order to accommodate the full Rail-to-Rail input common mode voltage range. The voltage drop across R5, R6, R7 and R8 is kept to less than 200mV in order to allow the input to exceed the supply rails. Q13 acts as a switch to steer current away from Q3-Q4 and into Q1-Q2, as the input increases beyond 1.4 of V+. This in turn shifts the signal path from the bottom stage differential pair to the top one and causes a subsequent increase in the supply current. In transitioning from one stage to another, certain input stage parameters (VOS, Ib, IOS, en, and in) are determined based on which differential pair is “on” at the time. Input Bias current, Ib, will change in value and polarity as the input crosses the transition region. In addition, parameter such as PSRR and CMRR which involve the input offset voltage will also be effected by changes in VCM across the differential pair transition region. 101308A4 FIGURE 2. Input Stage Current vs. Differential Input Voltage B) OUTPUT STAGE: The output stage (see Figure 1) is comprised of complimentary NPN and PNP common-emitter stages to permit voltage swing to within a Vce(sat) of either supply rail. Q9 supplies the sourcing and Q10 supplies the sinking current load. Output current limiting is achieved by limiting the Vce of Q9 and Q10; using this approach to current limiting, alleviates the draw back to the conventional scheme which requires one Vbe reduction in output swing. The frequency compensation circuit includes Miller capacitors from collector to base of each output transistor (see Figure 1, Ccomp9 and Ccomp10). At light capacitive loads, the high frequency gain of the output transistors is high, and the Miller effect increases the effective value of the capacitors thereby stabilizing the Op Amp. Large capacitive loads greatly decrease the high frequency gain of the output transistors thus lowering the effective internal Miller capacitance - the internal pole frequency increases at the same time a low frequency pole is created at the Op Amp output due to the large load capacitor. In this fashion, the internal dominant pole compensation, which works by reducing the loop gain to less than 0dB when the phase shift around the feedback loop is more than 180˚, varies with the amount of capacitive load and becomes less dominant when the load capacitor has increased enough. Hence the Op Amp is very stable even at high values of load capacitance resulting in the uncharacteristic feature of stability under all capacitive loads. 10130870 FIGURE 1. Simplified Schematic Diagram The input stage is protected with the combination of R9-R10 and D1, D2, D3 and D4 against differential input overvoltages. This fault condition could otherwise harm the differential pairs or cause offset voltage shift in case of prolonged over voltage. As shown in Figure 2, if this voltage reaches approximately ± 1.4V at 25˚C, the diodes turn on and current flow is limited by the internal series resistors (R9 and R10). The Absolute Maximum Rating of ± 10V differential on VIN still needs to be observed. With temperature variation, the point were the diodes turn on will change at the rate of 5mV/˚C C) OUTPUT VOLTAGE SWING CLOSE TO V−: The LM8272’s output stage design allows voltage swings to within millivolts of either supply rail for maximum flexibility and improved useful range. Because of this design architecture, as can be seen from Figure 1 diagram, with Output approaching either supply rail, either Q9 or Q10 CollectorBase junction reverse bias will decrease. With output less than a Vbe from either rail, the corresponding output transistor operates near saturation. In this mode of operation, the transistor will exhibit higher junction capacitance and lower ft which will reduce Phase Margin. With the Noise Gain (NG = 1 + Rf/Rg, Rf & Rg are external gain setting resistors) of 2 or higher, there is sufficient Phase Margin that this reduction (in Phase Margin) is of no consequence. However, with lower 11 www.national.com LM8272 Dual Application Notes ing to loads tied between the output and ground. In each case, the intersection of the device plot at the appropriate temperature with the load line would be the typical output swing possible for that load. For example, a 600Ω load can accommodate an output swing to within 100mV of V− and to 250mV of V+ (VS = ± 5V) corresponding to a typical 9.65VPP unclipped swing. (Continued) Noise Gain ( < 2) and with less than 150mV voltage to the supply rail, if the output loading is light, the Phase Margin reduction could result in unwanted oscillations. In the case of the LM8272, due to inherent architectural specifics, the oscillation occurs only with respect to Q10 when output swings to within 150mV of V−. However, if Q10 collector current is larger than its idle value of a few microamps, the Phase Margin loss becomes insignificant. In this case, 300µA is the required Q10 collector current to remedy this situation. Therefore, when all the aforementioned critical conditions are present at the same time (NG < 2, VOUT < 150mV from supply rails, & output load is light) it is possible to ensure stability by adding a load resistor to the output to provide the necessary Q10 minimum Collector Current (300µA). For 12V (or ± 6V) operation, for example, add a 39kΩ resistor from the output to V+ to cause 300µA output sinking current and ensure stability. This is equivalent to about 15% increase in total quiescent power dissipation. DRIVING CAPACTIVE LOADS: The LM8272 is specifically designed to drive unlimited capacitive loads without oscillations (see Settling Time and Overshoot vs. Cap Load plots in the typical performance characteristics section). In addition, the output current handling capability of the device allows for good slewing characteristics even with large capacitive loads (Settling Time and Slew Rate vs. Cap Load plot). The combination of these features is ideal for applications such as TFT flat panel buffers, A/D converter input amplifiers, etc. 10130890 FIGURE 3. Steady State Output Sourcing Characteristics with Load Lines However, as in most Op Amps, addition of a series isolation resistor between the Op Amp and the capacitive load improves the settling and overshoot performance. Output current drive is an important parameter when driving capacitive loads. This parameter will determine how fast the output voltage can change. Referring to the Settling Time and Slew Rate vs. Cap Load plots (typical performance characteristics section), two distinct regions can be identified. Below about 10,000pF, the output Slew Rate is solely determined by the Op Amp’s compensation capacitor value and available current into that capacitor. Beyond 10nF, the Slew Rate is determined by the Op Amp’s available output current. An estimate of positive and negative slew rates for loads larger than 100nF can be made by dividing the short circuit current value by the capacitor. ESTIMATING THE OUTPUT VOLTAGE SWING It is important to keep in mind that the steady state output current will be less than the current available when there is an input overdrive present. For steady state conditions, Figure 3 and Figure 4 plots can be used to predict the output swing. These plots also show several load lines correspond- www.national.com 10130891 FIGURE 4. Steady State Output Sinking Characteristics with Load Lines 12 TABLE 1. Normalized AC Power Dissipated in the Output Stage for Standard Waveforms (Continued) OUTPUT SHORT CIRCUIT CURRENT AND DISSIPATION ISSUES: PAC (W.Ω/V2) Sinusoidal The LM8272 output stage is designed for maximum output current capability. Even though momentary output shorts to ground and either supply can be tolerated at all operating voltages, longer lasting short conditions can cause the junction temperature to rise beyond the absolute maximum rating of the device, especially at higher supply voltage conditions. Below supply voltage of 6V, output short circuit condition can be tolerated indefinitely. 50.7 x 10 DC Load Power AC Load Power Square 62.5 x 10−3 The use of supply decoupling is mandatory in most applications. As with most relatively high speed/high output current Op Amps, best results are achieved when each supply line is decoupled with two capacitors; a small value ceramic capacitor (∼0.01µF) placed very close to the supply lead in addition to a large value Tantalum or Aluminum ( > 4.7µF). The large capacitor can be shared by more than one device if necessary. The small ceramic capacitor maintains low supply impedance at high frequencies while the large capacitor will act as the charge “bucket” for fast load current spikes at the Op Amp output. The combination of these capacitors will provide supply decoupling and will help keep the Op Amp oscillation free under any load. Op Amp Quiescent Power Dissipation PDC = IO · (Vr - Vo) 46.9 x 10 −3 OTHER APPLICATION HINTS: Ptotal = PQ + PDC + PAC PAC = See Table 1 below Triangular The table entries are normalized to VS2/RL. To figure out the AC load current component of power dissipation, simply multiply the table entry corresponding to the output waveform by the factor VS2/RL. For example, with ± 12V supplies, a 600Ω load, and triangular waveform power dissipation in the output stage is calculated as: PAC = (46.9 x 10−3) · [242/600] = 45.0mW With the Op Amp tied to a load, the device power dissipation consists of the quiescent power due to the supply current flow into the device, in addition to power dissipation due to the load current. The load portion of the power itself could include an average value (due to a DC load current) and an AC component. DC load current would flow if there is an output voltage offset, or the output AC average current is non-zero, or if the Op Amp operates in a single supply application where the output is maintained somewhere in the range of linear operation. Therefore: P Q = IS · V S −3 where: IS: Supply Current VS: Total Supply Voltage (V+ - V−) VO: Average Output Voltage LM8272 ADVANTAGES: Compared to other Rail-to-Rail Input/Output devices, the LM8272 offers several advantages such as: • Improved cross over distortion • Nearly constant supply current throughout the output voltage swing range and close to either rail. • Nearly constant Unity gain frequency (fu) and Phase Margin (Phim) for all operating supplies and load conditions. • No output phase reversal under input overload condition. Vr: V+ for sourcing and V− for sinking current Table 1 below shows the maximum AC component of the load power dissipated by the Op Amp for standard Sinusoidal, Triangular, and Square Waveforms: 13 www.national.com LM8272 Dual Application Notes LM8272 Dual RRIO, High Output Current & Unlimited Cap Load Op Amp in Miniature Package Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin MSOP NS Package Number MUA08A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Email: [email protected] www.national.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: [email protected] National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.