KERSEMI SIHFIBC20G-E3

IRFIBC20G, SiHFIBC20G
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Isolated Package
• High Voltage Isolation = 2.5 kVRMS (t = 60 s;
f = 60 Hz)
• Sink to Lead Creepage Distance = 4.8 mm
• Dynamic dV/dt Rating
• Low Thermal Resistance
• Lead (Pb)-free Available
600
RDS(on) (Ω)
VGS = 10 V
4.4
Qg (Max.) (nC)
18
Qgs (nC)
3.0
Qgd (nC)
8.9
Configuration
Single
D
TO-220 FULLPAK
COMPLIANT
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-220 FULLPAK eliminates the need for additional
insulating hardware in commercial-industrial applications.
The molding compound used provides a high isolation
capability and a low thermal resistance between the tab and
external heatsink. The isolation is equivalent to using a 100
micron mica barrier with standard TO-220 product. The
FULLPAK is mounted to a heatsink using a single clip or by
a single screw fixing.
G
G D S
Available
RoHS*
S
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-220 FULLPAK
IRFIBC20GPbF
SiHFIBC20G-E3
IRFIBC20G
SiHFIBC20G
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
600
Gate-Source Voltage
VGS
± 20
Continuous Drain Current
Pulsed Drain
VGS at 10 V
TC = 25 °C
TC = 100 °C
Currenta
ID
IDM
Linear Derating Factor
UNIT
V
1.7
1.1
A
6.8
0.24
W/°C
mJ
Single Pulse Avalanche Energyb
EAS
84
Repetitive Avalanche Currenta
IAR
1.7
A
Repetitive Avalanche Energya
EAR
3.0
mJ
Maximum Power Dissipation
TC = 25 °C
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
PD
30
W
dV/dt
3.0
V/ns
TJ, Tstg
- 55 to + 150
for 10 s
6-32 or M3 screw
300d
°C
10
lbf · in
1.1
N·m
Notes
a.
b.
c.
d.
Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
VDD = 50 V, starting TJ = 25 °C, L = 53 mH, RG = 25 Ω, IAS = 1.7 A (see fig. 12).
ISD ≤ 2.2 A, dI/dt ≤ 40 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
1.6 mm from case.
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IRFIBC20G, SiHFIBC20G
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
65
Maximum Junction-to-Case (Drain)
RthJC
-
4.1
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 µA
600
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.88
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.0
V
nA
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
IGSS
IDSS
RDS(on)
gfs
VGS = ± 20 V
-
-
± 100
VDS = 600 V, VGS = 0 V
-
-
100
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
500
-
-
4.4
Ω
1.4
-
-
S
ID = 1.0 Ab
VGS = 10 V
VDS = 50 V, ID = 1.0
Ab
µA
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Drain to Sink Capacitance
C
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
tr
td(off)
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
350
-
-
48
-
-
8.6
-
f = 1.0 MHz
-
12
-
-
-
18
-
-
3.0
-
-
8.9
-
10
-
-
23
-
-
30
-
-
25
-
-
4.5
-
VGS = 10 V
ID = 2.0 A, VDS = 360 V,
see fig. 6 and 13b
VDD = 300 V, ID = 2.0 A,
RG = 18Ω, RD= 150 Ω,
see fig. 10b
tf
LD
LS
Between lead,
6 mm (0.25") from
package and center of
die contact
D
pF
nC
ns
nH
G
-
7.5
-
-
-
1.7
-
-
6.8
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
Body Diode Voltage
IS
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 1.7 A, VGS = 0
TJ = 25 °C, IF = 2.0 A, dI/dt = 100 A/µsb
-
-
1.6
V
-
290
580
ns
-
0.65
1.3
µC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
2
S
Vb
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IRFIBC20G, SiHFIBC20G
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFIBC20G, SiHFIBC20G
4
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
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IRFIBC20G, SiHFIBC20G
RD
VDS
VGS
D.U.T.
RG
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
D.U.T
RG
+
-
I AS
V DD
VDS
10 V
tp
0.01 Ω
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
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IRFIBC20G, SiHFIBC20G
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
6
Fig. 13b - Gate Charge Test Circuit
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IRFIBC20G, SiHFIBC20G
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
•
•
•
•
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
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