Electrical Specifications Subject to Change LT8697 USB 5V 2.5A Output, 42V Input Synchronous Buck with Cable Drop Compensation Features Description Wide Input Range: 5V to 42V n Low Dropout Under All Conditions: 450mV at 2.1A n Accurate 5V Output: ±1.3% Over Full Temperature Range n Programmable Cable Drop Compensation n Programmable Output Current Limit n Output Current Monitor n Dual Input Feedback Permits Regulation on Output of USB Switch n Forced Continuous Mode for Fast Load Step Response n High Efficiency Synchronous Operation at 2MHz: 93% Efficiency at 2.1A, 5VOUT from 12VIN 95% Efficiency at 0.9A, 5VOUT from 12VIN n Fast Minimum Switch-On Time: 70ns n Adjustable Output from 5.0V to 5.25V n Adjustable and Synchronizable: 300kHz to 2.2MHz n Small Thermally Enhanced 3mm × 5mm 24-Lead QFN Package The LT®8697 is a compact, high efficiency, high speed synchronous monolithic step-down switching regulator designed to power 5V USB applications. A precise output voltage and programmable cable drop compensation maintain accurate 5V regulation at the USB socket at the end of a long cable. Forced continuous operation allows the LT8697 to sink current, further enhancing accurate 5V regulation during load transients. n Accurate and programmable output current limit, a power good indicator pin and an output current monitor pin improve system reliability and safety, allow the user to implement latch-off or auto-retry functionality and can eliminate the need for a USB switch IC. Dual feedback allows regulation on the output of a USB switch and limits cable drop compensation to a maximum of 5.8V output, protecting USB devices during fault conditions. Thermal shutdown provides additional protection by limiting power dissipation in the IC during an overtemperature fault. The LT8697 is available in a small 24-lead 3mm × 5mm package with an exposed pad for low thermal resistance. Applications L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Automotive and Industrial USB n Precision 5V Supply n Typical Application 2MHz 5V Step-Down Converter with Cable Drop Compensation 5.50 0.1µF 4.7µF VIN VOUT BST 3.3µH EN/UV 1µF 10nF 16.5k SYS LT8697 ICTRL ISP SYNC ISN TR/SS USB5V RT 47µF ×2 1nF + 10k LOAD INTVCC PGND VLOAD 5V, 2.4A – RCBL GND 5.25 0.1Ω 0.018Ω 18.2k 0.1Ω 5.00 3 VLOAD 4.75 4.50 4.25 8697 TA01a 4 VOUT 2 ILOAD 50mA/µs 100µs/DIV CURRENT (A) PG SW 5 3 METERS AWG 20 TWISTED PAIR CABLE VOLTAGE (V) VIN 6V TO 42V Transient Response Through 3 Meters AWG 20 Twisted-Pair Cable 1 0 8697 TA01b 8697p For more information www.linear.com/LT8697 1 LT8697 Pin Configuration ISP ISN ICTRL RCBL TOP VIEW VIN, EN/UV, PG, ISP, ISN............................................42V SYS............................................................................30V USB5V......................................................................3mA BST Above SW.............................................................4V SW Above VIN...........................................................0.3V TR/SS, ICTRL..............................................................4V RT, RCBL......................................................................2V SYNC...........................................................................6V Operating Junction Temperature Range (Notes 2, 3) LT8697E.................................................. –40°C to 125°C LT8697I................................................... –40°C to 125°C 24 23 22 21 SYNC 1 20 USB5V TR/SS 2 19 PG RT 3 18 SYS EN/UV 4 17 INTVCC 25 GND VIN 5 16 BST VIN 6 15 SW PGND 7 14 SW PGND 8 13 SW NC NC 9 10 11 12 NC (Note 1) NC Absolute Maximum Ratings UDD PACKAGE 24-LEAD (3mm × 5mm) PLASTIC QFN θJA = 46°C/W, θJC = 5°C/W EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT8697EUDD#PBF LT8697EUDD#TRPBF LGGW 24-Lead (3mm × 5mm) Plastic QFN –40°C to 125°C LT8697IUDD#PBF LT8697IUDD#TRPBF LGGW 24-Lead (3mm × 5mm) Plastic QFN –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 2, 4) PARAMETER CONDITIONS VIN Undervoltage Lockout MIN l VIN Shutdown Current VEN/UV = 0.3V VIN Current in Regulation VIN = 12V, ILOAD = 100µA, RT = 56.2k l l TYP MAX 2.9 3.4 V 1 3 8 µA µA 9 12 mA l VIN to Disable Forced Continuous Mode VIN Rising Output Sink Current in Forced Continuous Mode VUSB5V = 5.5V, L = 6.8µH, RT = 56.2k USB5V Voltage VIN = 12V l USB5V Voltage Line Regulation VIN = 6V to 42V l Regulated Load Voltage Through 0.3Ω VIN = 12V, ILOAD = 2.1A, Voltage at Point of Load (End of Cable), RCBL = 13.7k, RCDC = 10k, RSENSE = 20mΩ l USB5V Clamp Voltage IUSB5V = 3mA UNIT 27 29 31 V 0.6 1 1.7 A 4.97 4.91 4.99 4.99 5.01 5.04 V V 6 35 4.925 5 5.075 9 mV V V 8697p 2 For more information www.linear.com/LT8697 LT8697 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 2, 4) PARAMETER CONDITIONS MIN TYP MAX USB5V Current VISN = 5V, VISP – VISN = 40mV, RCBL = 13.7k VISN = 5V, VISP – VISN = 10mV, RCBL = 13.7k VISN = 5V, VISP – VISN = 0V, RCBL = 13.7k RCBL = Open l l l l 58 12 0 0 60 15 2 1 62 23 8 2 µA µA µA µA Current Sense Voltage (VISP – VISN) VCTRL = 1.5V, VISN = 5V VCTRL = 1.5V, VISN = 0V VCTRL = 800mV, VISN = 5V VCTRL = 800mV, VISN = 0V VCTRL = 200mV, VISN = 5V VCTRL = 200mV, VISN = 0V l l l l l l 45.5 44.5 37.5 36 6 5 48 48.5 39.5 40 9.5 10 50 53 42 44.5 13 15 mV mV mV mV mV mV RCBL Monitor Voltage VISP – VISN = 40mV, RCBL = 13.7k VISP – VISN = 10mV, RCBL = 13.7k l l 720 130 800 205 880 280 mV mV RCBL Output Current Limit VISP – VISN = 50mV, VRCBL = 0V –2 –3 –4 mA 20 µA –3 µA ISP, ISN Bias Current VISP = VISN = 0V, 5V –20 ICTRL Current VICTRL = 1.5V –0.5 INTVCC Voltage VSYS = 0V, 5V 3.4 INTVCC Undervoltage Lockout SYS Voltage VIN = 12V –2 l V 2.6 2.9 3.15 V 5.63 5.8 5.92 V SYS Voltage to Disable Forced Continuous Mode 7.5 SYS Current in Regulation VSYS = 5V, RT = 56.2k Dropout Voltage (VIN – VSYS) VSYS = 5V, ILOAD = 2.1A l Minimum On-Time ILOAD = 1A Minimum Off-Time ILOAD = 0.5A 3 4 96 97.5 30 50 V 5 450 Maximum Duty Cycle in Dropout l UNIT mA mV 99 % 45 70 ns 80 110 ns Minimum VIN for SYS Regulation at Full Frequency RT = 16.5k, VUSB5V = 0V, ILOAD = 0.5A l 6.2 7 7.9 V Oscillator Frequency RT = 140k RT = 56.2k RT = 16.5k l l l 250 620 1.9 300 700 2.00 340 750 2.05 kHz kHz MHz Top Power NMOS On-Resistance ISW = 1A l 3.2 4.8 3.5 4.5 0.94 Top Power NMOS Current Limit Bottom Power NMOS On-Resistance VINTVCC = 3.4V, ISW = 1A Bottom Power NMOS Current Limit VINTVCC = 3.4V SW Leakage Current VIN = 42V, VSW = 0V, 42V EN/UV Threshold VEN/UV Rising 120 mΩ 6 65 l EN/UV Hysteresis A mΩ 5.8 A 0.1 5 µA 1.0 1.06 V 40 mV EN/UV Bias Current VEN/UV = 2V PG Upper Threshold Offset from VUSB5V VUSB5V Falling l 6 9 12 % PG Lower Threshold Offset from VUSB5V VUSB5V Rising l –6 –9 –12 % VPG = 0.1V l –20 PG Hysteresis PG Pull-Down Resistance 20 1.3 680 PG Transition Delay VUSB5V from 5V to 4V SYNC Threshold VSYNC Falling VSYNC Rising 0.8 1.6 SYNC Current VSYNC = 2V –40 TR/SS Current VTR/SS = 0V –1.2 TR/SS Pull-Down Resistance Fault Condition, VTR/SS = 0.1V % 2000 40 1.1 2.0 –2.2 230 nA Ω µs 1.4 2.4 V V 40 nA –3.2 µA Ω 8697p For more information www.linear.com/LT8697 3 LT8697 Electrical Characteristics Note 3: This IC includes overtemperature protection that is intended to protect the device during overload conditions. Junction temperature will exceed 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature will reduce lifetime. Note 4: Polarity specification for current into a pin is positive and out of a pin is negative. All voltages are referenced to GND unless otherwise specified. MAX and MIN refer to absolute values. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT8697E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. The LT8697I is guaranteed over the full –40°C to 125°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Typical Performance Characteristics 5.00 VUSB5V vs Temperature 5.02 VIN = 12V 4.99 TA = 25°C, unless otherwise noted. VUSB5V vs VIN 70 IUSB5V vs Temperature RCBL = 13.7k 60 5.01 VSENSE = 40mV 4.97 5.00 IUSB5V (µA) 4.98 VUSB5V (V) VUSB5V (V) 50 4.99 40 30 VSENSE = 10mV 20 4.96 4.98 4.95 –55 –25 5 65 35 TEMPERATURE (°C) 95 4.97 125 10 6 10 14 18 22 26 VIN (V) 30 34 8697 G01 225 200 62 IUSB5V (µA) IUSB5V (µA) 175 125 100 75 VIN = 12V RCDC = 10k RCBL = 13.3k ILOAD = 2A RSENSE = 20mΩ 0 10 30 20 VSENSE (mV) 40 50 60 58 54 0.2 155 VSENSE vs VCTRL 40 30 20 10 0.7 1.2 1.7 2.2 FREQUENCY (MHz) 8697 G04 125 50 56 RCBL = 40.2k 25 0 60 RCBL = 13.7k 50 5 65 35 95 TEMPERATURE (°C) 8697 G03 IUSB5V vs Frequency 64 RCBL = 4.12k –25 8697 G02 IUSB5V vs VSENSE 150 0 –55 42 VSENSE (mV) 250 38 VSENSE = 0mV 8697 G05 0 0 0.2 0.4 0.8 0.6 VCTRL (V) 1 1.2 8697 G06 8697p 4 For more information www.linear.com/LT8697 LT8697 Typical Performance Characteristics VEN vs Temperature 100 1.01 EFFICIENCY (%) EN/UV THRESHOLD (V) 1.02 EN/UV RISING 1.00 0.99 0.98 0.97 Efficiency vs ILOAD 100 95 90 90 80 85 70 80 75 fSW = 2MHz RSENSE = 18mΩ DCRL = 20mΩ RCBL = OPEN 70 65 60 EN/UV FALLING 0.96 –25 35 5 65 TEMPERATURE (°C) 95 50 125 0 0.5 1.5 1 LOAD CURRENT (A) Efficiency vs Frequency 100 16 70 60 0.2 VIN = 8V VIN = 12V VIN = 24V 0.7 VIN = 8V VIN = 12V VIN = 24V 0 0.001 00.01 1 0.1 LOAD CURRENT (A) fSW = 700kHz 12 10 8 6 4 0 2.2 6 12 24 30 18 INPUT VOLTAGE (V) 36 8697 G10 8697 G09 10.0 fSW = 700kHz VIN = 12V 9.5 9.0 8.5 8.0 7.5 7.0 –55 42 –25 5 35 65 95 TEMPERATURE (°C) Top FET Current Limit vs Temperature 155 Bottom FET Current Limit vs Temperature 5.0 5.0 5.0 125 8697 G12 8697 G11 Top FET Current Limit vs Duty Cycle 10 No Load Supply Current vs Temperature 2 1.7 1.2 FREQUENCY (MHz) 20 NO LOAD INPUT CURRENT (mA) INPUT CURRENT (mA) EFFICIENCY (%) L = 15µH RSENSE = 18mΩ DCRL = 40mΩ RCBL = OPEN ILOAD = 0.9A 30 10 No Load Supply Current vs VIN 14 80 fSW = 2MHz RSENSE = 18mΩ DCRL = 20mΩ RCBL = OPEN 40 8697 G08 8697 G07 90 50 2.5 2 Efficiency vs ILOAD 60 VIN = 8V VIN = 12V VIN = 24V 55 0.95 –55 EFFICIENCY (%) 1.03 TA = 25°C, unless otherwise noted. 30% DC 4.1 CURRENT LIMIT (A) 4.4 70% DC 4.0 3.5 3.8 3.5 4.6 4.5 CURRENT LIMIT (A) CURRENT LIMIT (A) 4.7 0 0.2 0.4 0.6 DUTY CYCLE (%) 0.8 1.0 8697 G13 3.0 –55 4.2 3.8 3.4 –25 5 35 65 TEMPERATURE (°C) 95 125 8697 G13 3.0 –55 –25 5 35 65 95 TEMPERATURE (°C) 125 155 8697 G15 8697p For more information www.linear.com/LT8697 5 LT8697 Typical Performance Characteristics Switch Drop vs Temperature 350 SWITCH CURRENT = 1A 100 300 SWITCH DROP (mV) 200 SWITCH DROP (mV) Minimum On-Time vs Temperature Switch Drop vs ISW TOP SW 150 100 BOTTOM SW 90 250 200 TOP SW 150 100 BOTTOM SW 50 –25 5 35 65 95 TEMPERATURE (°C) 125 0 155 0 0.5 1.5 2 1 SWITCH CURRENT (A) 95 ILOAD = 2.1A 95 90 ILOAD = 0.9A 85 ILOAD = 0A 80 75 –55 –25 5 35 65 95 TEMPERATURE (°C) 90 85 ILOAD = 2.1A 80 75 ILOAD = 0.9A 70 ILOAD = 0A 60 –55 –25 155 2.10 2.05 2.00 1.95 1.90 300 200 100 95 65 35 TEMPERATURE (°C) 125 5 0 155 0 0.5 1.5 1 LOAD CURRENT (A) 2 Switching Frequency vs ILOAD 2500 RT = 16.5k 2050 2000 1950 2.5 8697 G21 SWITCHING FREQUENCY (kHz) RT = 16.5k SWITCHING FREQUENCY (kHz) SWITCHING FREQUENCY (MHz) 2100 155 400 8697 G20 Switching Frequency vs Temperature 2.15 125 DCRL = 20mΩ RSENSE = 18mΩ 500 8697 G19 2.20 65 35 95 5 TEMPERATURE (°C) Dropout Voltage vs ILOAD 600 RT = 30.1k SYNC = 1.2MHz 65 125 ILOAD = 2.1A 8697 G18 DROPOUT VOLTAGE (mV) MINIMUM OFF-TIME (ns) MINIMUM OFF-TIME (ns) 100 105 ILOAD = 0.9A 50 Minimum Off-Time vs Temperature RT = 30.1k SYNC = 3V 100 60 8697 G17 Minimum Off-Time vs Temperature 110 ILOAD = 0A 70 30 –55 –25 2.5 8697 G16 115 80 40 50 0 –55 120 MINIMUM ON-TIME (ns) 250 TA = 25°C, unless otherwise noted. Switching Frequency vs VSYS RT = 16.5k 2000 1500 1000 500 1.85 1.80 –55 –25 5 35 65 95 TEMPERATURE (°C) 125 155 8697 G22 1900 0.0001 0.001 0.1 0.01 LOAD CURRENT (A) 1 10 8697 G23 0 0 1 3 2 VSYS (V) 4 5 8697 G24 8697p 6 For more information www.linear.com/LT8697 LT8697 Typical Performance Characteristics VUSB5V vs VTR/SS 2.2 11.0 VTR/SS = 0.5V 2.1 5 PG High Thresholds ITR/SS vs Temperature PG THRESHOLD OFFSET FROM VUSB5V (%) 6 TA = 25°C, unless otherwise noted. 2.0 ITR/SS (µA) VUSB5V (V) 4 3 2 1.9 1.8 1.7 1.6 1 0 1.5 0 0.2 0.4 0.6 0.8 1.0 1.4 –55 1.2 5 35 65 95 TEMPERATURE (°C) –25 VTR/SS (V) 9.5 USB5V RISING 9.0 8.5 USB5V FALLING 8.0 7.5 7.0 6.5 6.0 –55 –25 35 65 95 5 TEMPERATURE (°C) 13 12 fSW = 2MHz –8.5 12 10 11 8 VIN = 24V USB5V FALLING –10.5 –11.0 –11.5 –12.0 VIN = 12V ISYS (mA) ISYS (mA) –10.0 155 ISYS vs Switching Frequency USB5V RISING –9.5 125 8697 G27 ISYS vs VIN PG Low Thresholds –8.0 10 6 9 4 8 2 –12.5 –25 35 65 95 5 TEMPERATURE (°C) 125 155 7 5 10 15 20 25 30 VIN (V) 35 8697 G28 Transient Response 0A to 1A Load Step 5.50 FRONT PAGE APPLICATION CIRCUIT 5.50 4 5.25 3 VLOAD 2 0.5 1 1.5 2 SWITCHING FREQUENCY (MHz) 2.5 8697 G30 5 VOUT 4 5.00 3 VLOAD 4.75 2 ILOAD 25mA/µs ILOAD 25mA/µs 100µs/DIV 0 CURRENT (A) 4.25 5 CURRENT (A) VOUT 4.75 4.50 0 45 Transient Response 1A to 2A Load Step 5.25 5.00 40 8697 G29 VOLTAGE (V) –13.0 –55 VOLTAGE (V) PG THRESHOLD OFFSET FROM VUSB5V (%) 155 10.0 8697 G26 8697 G25 –9.0 125 10.5 1 0 4.50 4.25 8697 G31 1 FRONT PAGE APPLICATION CIRCUIT 100µs/DIV 0 8697 G32 8697p For more information www.linear.com/LT8697 7 LT8697 Typical Performance Characteristics Transient Response Output Current Limit 10 TA = 25°C, unless otherwise noted. Transient Response USB5V Shorted to GND FRONT PAGE APPLICATION CIRCUIT 5 12 6.5 9 6.0 ILOAD = 0A FRONT PAGE APPLICATION CIRCUT 6 VPG –5 3 ILOAD 50mA/µs –10 –15 100µs/DIV VOUT (V) 0 CURRENT (A) VOLTAGE (V) VLOAD 5.5 0 4.5 –3 4.0 8697 G34 Start-Up Dropout Performance RLOAD = ∞ RLOAD = 5.6Ω VOUT 2V/DIV 100µs/DIV 8697 G33 Start-Up Dropout Performance VIN 2V/DIV USB5V SHORTED TO GND 5.0 VIN VIN 2V/DIV VOUT 100ms/DIV VOUT 2V/DIV VIN VOUT 100ms/DIV 8697 G35 8697 G36 Pin Functions SYNC (Pin 1): External Clock Synchronization Input. Tie to a clock source for synchronization to an external frequency and forced continuous mode. Tie to INTVCC if not used. Do not float. TR/SS (Pin 2): Output Tracking and Soft-Start Pin. This pin allows user control of output voltage ramp rate during start-up. A TR/SS voltage below 0.97V forces the LT8697 to regulate VUSB5V to 5 times the TR/SS voltage. When TR/SS is above 0.97V, the tracking function is disabled and the internal reference resumes control of the error amplifier. An internal 2.2µA pull-up current from INTVCC on this pin allows a capacitor to program output voltage slew rate. This pin is pulled to ground when EN/UV is low, during thermal shutdown and when VIN below its undervoltage lockout threshold; use a series resistor of at least 10k if driving from a low impedance output. RT (Pin 3): Tie a resistor between RT and ground to set the switching frequency. EN/UV (Pin 4): The LT8697 is shut down when this pin is low and active when this pin is high. The hysteretic threshold voltage is 1.00V going up and 0.96V when going down. Tie to VIN if the shutdown feature is not used. An external resistor divider from VIN can be used to program a VIN threshold below which the LT8697 will shut down. 8697p 8 For more information www.linear.com/LT8697 LT8697 Pin Functions VIN (Pins 5, 6): The VIN pins supply current to the LT8697 internal circuitry and to the internal topside power switch. These pins must be tied together and be locally bypassed. Place the positive terminal of the input capacitor as close as possible to the VIN pins, and the negative terminal as close as possible to the PGND pins. PGND (Pins 7, 8): Power Switch Ground. These pins are the return path of the internal bottom side power switch and must be tied together. Place the negative terminal of the input capacitor as close as possible to the PGND pins. NC (Pins 9-12): No Connect. These pins are floating and are not connected to the LT8697. Tie these pins to the same copper as the exposed pad. See Figure 8. SW (Pins 13, 14, 15): The SW pins are the outputs of the internal power switches. Tie these pins together and connect them to the inductor and boost capacitor. This node should be kept small on the PCB for good performance. BST (Pin 16): This pin is used to provide a drive voltage, higher than the input voltage, to the topside power switch. Place a 0.1µF boost capacitor between this pin and SW as close as possible to the LT8697 IC. INTVCC (Pin 17): Internal 3.4V Regulator Bypass Pin. The internal power drivers and control circuits are powered from this voltage. The INTVCC maximum output current is 20mA. INTVCC current will be supplied from SYS if VSYS > 3.1V, otherwise current will be drawn from VIN. Decouple this pin to power ground with at least a 1µF low ESR ceramic capacitor. Do not load the INTVCC pin with external circuitry. SYS (Pin 18): The internal regulator will draw current from SYS instead of VIN when SYS is tied to a voltage higher than 3.3V. The SYS pin must be tied to the side of the inductor opposite the SW pin and must be bypassed by the output capacitor. SYS is also the secondary input to the error amp and regulates to a maximum of 5.8V. USB5V (Pin 20): The LT8697 regulates the USB5V pin to 5V. For cable drop compensation, the USB5V pin input current is proportional to the sensed output current. The USB5V ESD cell clamps to 9V. To allow the LT8697 output to survive a short to 30V, the 10k RCDC resistor must be in place between the USB5V pin and the output to limit the current into this pin. ISP (Pin 21): Current Sense (+) Pin. This is the non-inverting input to the current sense amplifier. ISN (Pin 22): Current Sense (–) Pin. This is the inverting input to the current sense amplifier. RCBL (Pin 23): Cable Drop Compensation Program Pin. A resistor RCBL tied from RCBL to ground programs cable drop compensation by setting the USB5V input current. RCBL can source 1mA. Excessive capacitive loading on RCBL can degrade load transient response. Isolate load capacitance on this pin by tying a 100k resistor between RCBL and the capacitive load. The RCBL load monitor output is valid when the LT8697 is enabled, otherwise the output is zero. Float RCBL if neither the current monitor nor the cable drop compensation feature is desired. ICTRL (PIN 24): Current Adjustment Pin. ICTRL adjusts the maximum VISP – VISN drop before the LT8697 limits the output current. Connect directly to INTVCC or float for a full scale VISP – VISN threshold of 48mV or apply values between ground and 1V to modulate the output current limit. There is an internal 2µA pull-up current on this pin. Float or tie to INTVCC when unused. GND (Exposed Pad Pin 25): Ground. The exposed pad must be connected to the negative terminal of the input capacitor and soldered to the PCB for proper operation and in order to lower the thermal resistance. PG (Pin 19): The PG pin is the open-drain output of an internal window comparator. PG remains low until the USB5V pin is within ±9% of the final regulation voltage and there are no fault conditions. The PG transition delay is approximately 40µs. PG is valid when VIN is above 3.4V regardless of the EN/UV state. 8697p For more information www.linear.com/LT8697 9 10 R4 OPT R3 OPT VIN RT CSS CIN For more information www.linear.com/LT8697 1 3 2 19 4 VIN SYNC RT TR/SS PG EN/UV 5, 6 1V SHDN 2.2µA SHDN TSD INTVCC UVLO VIN UVLO FB SYS + + – 1V ERROR AMP INTERNAL 1V REF ±9% WINDOW COMPARATOR + – – + VC SLOPE COMP 25 SHDN TSD VIN UVLO GND OSCILLATOR 300kHz TO 2.2MHz – + 2µA – + + 24 ICTRL 1V SWITCH LOGIC AND ANTISHOOT THROUGH 20R 3.4V REG + – + – 23 RCBL SW 20 22 21 6 17 18 8697 BD 1M 4M USB5V ISN ISP 7,8 PGND 13,14,15 RCBL FB R R M2 M1 BST INTVCC SYS RCDC RSENSE L CBST CVCC VOUT CCDC COUT CABLE RCABLE /2 RCABLE /2 – VLOAD + LT8697 Block Diagram 8697p LOAD LT8697 Operation The LT8697 is a monolithic, constant frequency, current mode step-down DC/DC converter. An oscillator, with frequency set using a resistor on the RT pin, turns on the internal top power switch at the beginning of each clock cycle. Current in the inductor then increases until the top switch current comparator trips and turns off the switch. The peak inductor current is controlled by the voltage on the internal VC node. When the top power switch turns off, the synchronous power switch turns on until the next clock cycle begins or inductor current falls to zero. If overload conditions result in more than 4.2A flowing through the bottom switch, the next clock cycle will be delayed until switch current returns to a safe level. the output voltage to 5.8V. When regulation is determined by either the output current limit or the SYS pin, USB5V is not regulated to 5V and the output voltage falls below its programmed value. To control the output voltage, the LT8697’s error amplifier servos the VC node by comparing the voltage on the USB5V pin, divided down about 5:1, with an internal 0.97V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference. This differential error makes the error amplifier raise the VC voltage which raises the top switch peak current limit. The feedback process continues until the average inductor current matches the new load current and the output voltage is in regulation. To improve efficiency across all loads, supply current to internal circuitry is sourced from the SYS pin when biased at 3.3V or above. Else, the internal circuitry will draw current from VIN. To implement cable drop compensation, the LT8697 drives the RCBL pin to 20(VISP – VISN). Current sourced from the RCBL pin is derived from the USB5V pin, creating an output offset above the 5V USB5V pin voltage through RCDC that is proportional to the load current and the RCDC/RCBL resistor ratio. This negative output impedance compensates for resistive drops in wiring for remote loads. The LT8697 error amp has two additional feedback paths that can override the USB5V pin control of the VC node. For output current limit, the voltage VISP – VISN across the output current sense resistor is not allowed to exceed the lower of 48mV or VICTRL/20. Also, the SYS pin limits If the EN/UV pin is low, the LT8697 is shut down and draws 1μA from the input. When the EN/UV pin is above 1V, the switching regulator will become active. The LT8697 operates in forced continuous mode (FCM) for fast transient response and full frequency operation over a wide load range. If a clock is applied to the SYNC pin the part will synchronize to the external clock frequency and operate in FCM. When in FCM the oscillator operates continuously and positive SW transitions are aligned to the clock. Negative inductor current is allowed. The LT8697 can sink current from the output and return this charge to the input in this mode, improving load step transient response. FCM is disabled if the VIN pin is held above 29V or if the SYS pin is held above 7.5V. When FCM is disabled in these ways, negative inductor current is not allowed and the LT8697 skips SW cycles in light load conditions. Comparators monitoring the USB5V pin voltage will pull the PG pin low if the output voltage varies more than ±9% (typical) from the set point, or if a fault condition is present. The oscillator reduces the LT8697’s operating frequency when the voltage at the SYS pin is below 4V. This frequency foldback helps to control the inductor current when the output voltage is lower than the programmed value during start-up or overcurrent conditions. 8697p For more information www.linear.com/LT8697 11 LT8697 Applications Information The LT8697 includes the necessary circuitry to implement cable drop compensation. Cable drop compensation allows the regulator to maintain 5V regulation on the USB VLOAD despite high cable resistance. The LT8697 increases its local output voltage VOUT above 5V as the load increases to keep VLOAD regulated to 5V. This compensation does not require running an additional pair of Kelvin sense wires from the regulator to the load, but does require the system designer to know the cable resistance RCABLE as the LT8697 does not sense this value. Program the cable drop compensation using the following ratio: RCBL = 20.55 • RSENSE • RCDC RCABLE where RCDC is a resistor tied between the regulator output and the USB5V pin, RCBL is a resistor tied between the RCBL pin and GND, RSENSE is the sense resistor tied between the ISP and ISN pins in series between the regulator output and the load, and RCABLE is the cable resistance. RSENSE is typically chosen based on the desired current limit and is typically 20mΩ for 2.1A systems and 50mΩ for 0.9A. Please see the Setting the Current Limit section for more information. The current flowing into the USB5V pin through RCDC is identical to the current flowing out of the RCBL resistor. While the ratio of these two resistors should be chosen per the equation above, choose the absolute values of these resistors to keep this current between about 30µA and 200µA at full load current. This restriction results in RCBL and RCDC values between 5k and 33k. If IUSB5V is too low, capacitive loading on the USB5V and RCBL pins will degrade the load step transient performance of the regulator. If IUSB5V is too high, the RCBL pin will go into current limit and the cable drop compensation feature will not work. Capacitance across the remote load to ground downstream of RSENSE forms a zero in the LT8697’s feedback loop due to cable drop compensation. CCDC reduces the cable drop compensation gain at high frequency. The 1nF CCDC capacitor tied across the 10k RCDC is required for stability of the LT8697’s output. If RCDC is changed, CCDC should also be changed to maintain roughly the same 10µs RC time constant. If the capacitance across the remote load is large compared to the LT8697 output capacitor tied to the SYS pin, a longer RCDC • CCDC time constant may be necessary for stability depending on the amount of cable drop compensation used. Output stability should always be verified in the end application circuit. The LT8697 limits the maximum voltage of VOUT by limiting the voltage on the SYS pin VSYS to 5.8V. If the cable drop compensation is programmed to compensate for more than 0.8V of cable drop at the maximum ILOAD, this VSYS maximum will prevent VOUT from rising higher and the voltage at the point of load will drop below 5V. The following equation shows how to derive the LT8697 output voltage VOUT: VOUT = 5V + 20.55 •ILOAD • RSENSE • RCDC RCBL As stated earlier, the LT8697’s cable drop compensation feature does not allow VOUT to exceed the SYS regulation point of 5.8V. If additional impedance is placed in between the SYS pin and the OUT node such as RSENSE or a USB Switch, the voltage drop through these impedances at the maximum ILOAD must also be factored in to this maximum allowable VOUT value. Refer to Figure 1 for load lines of VOUT and VLOAD to see how cable drop compensation works. 6.0 RCABLE = 0.3Ω RSENSE = 20mΩ RCDC = 10kΩ RCBL = 13.7kΩ 5.8 VOLTAGE (V) Cable Drop Compensation 5.6 VOUT 5.4 5.2 VLOAD 5.0 4.8 0 0.5 1 2 1.5 LOAD CURRENT (A) 2.5 3 8697 F01 Figure 1. Cable Drop Compensation Load Line 8697p 12 For more information www.linear.com/LT8697 LT8697 Applications Information Cable Drop Compensation Over a Wide Temperature Range Cable drop compensation with zero temperature variation may be used in many applications. However, matching the cable drop compensation temperature variation to the cable resistance temperature variation may result in better overall output voltage accuracy over a wide operating temperature range. For example, in an application with 0.26Ω of wire resistance and a maximum output current of 2.1A, cable drop compensation adds 0.55V at 25°C to the output at max load for a fully compensated wire resistance. If the wire in this example is copper, the copper resistance temperature coefficient of about 4000ppm/°C results in an output voltage error of –130mV at 85°C and 55mV at 0°C. Figure 2a shows this behavior. 5.8 5.6 ILOAD = 2.1A CABLE = 4 METERS AWG 20 TWISTED-PAIR COPPER VOLTAGE (V) VOUT 5.4 5.2 VLOAD 5.0 4.8 –20 0 20 40 60 TEMPERATURE (°C) 80 100 8697 F02a Figure 2a. Cable Drop Compensation Through 4m of AWG 20 Twisted-Pair Cable (260mΩ) without Temperature Compensation RCBL 10k 1% MURATA NCP21XV103J03RA 10k THERMISTOR 10k 1% 8697 F02b Figure 2b. RCBL Resistor Network for Matching Copper Wire Temperature Coefficient See Table 1 for a list of copper wire resistances vs gauge. Table 1. Copper Wire Resistance vs Wire Gauge AWG RESISTANCE OF Cu WIRE AT 20°C (mΩ/m) 15 10.4 16 13.2 17 16.6 18 21.0 19 26.4 20 33.3 21 42.0 22 53.0 23 66.8 24 84.2 25 106 26 134 27 169 28 213 29 268 30 339 31 427 32 538 33 679 34 856 35 1080 36 1360 37 1720 38 2160 39 2730 40 3440 Cable drop compensation can be made to vary positively versus temperature with the addition of a negative temperature coefficient (NTC) resistor as a part of the RCBL resistance. This circuit idea assumes the NTC resistor is at the same temperature as the cable. Figure 2b shows an example resistor network for RCBL that matches copper resistance variation over a wide –40°C to 125°C temperature range. Figure 2c shows the resultant cable drop compensation output at several temperatures using RCBL with negative temperature variation. 8697p For more information www.linear.com/LT8697 13 LT8697 Applications Information 5.8 5.8 VOUT VOUT 5.6 5.4 VOLTAGE (V) VOLTAGE (V) 5.6 ILOAD = 2.1A CABLE = 4 METERS AWG 20 TWISTED-PAIR COPPER 5.2 5.4 ILOAD = 2.1A CABLE = 4 METERS AWG 20 TWISTED-PAIR COPPER 5.2 VLOAD VLOAD 5.0 4.8 –20 5.0 0 60 20 40 TEMPERATURE (°C) 80 4.8 –20 100 0 60 20 40 TEMPERATURE (°C) 8697 F02c Figure 2c. Cable Drop Compensation Through 4m of AWG 20 Twisted-Pair Cable (260mΩ) with Temperature Compensation Using NTC RCBL The NTC resistor does not give a perfectly linear transfer function versus temperature. Here, for typical component values, the worse case error is <10% of the cable compensation output, or <1% of the total output voltage accuracy. Better output voltage accuracy versus temperature can be achieved if RCBL resistor values are optimized for a narrower temperature range. Contact LTC for help designing an RCBL resistor network. Choosing an RSENSE resistor with a temperature coefficient that matches the cable resistance temperature coefficient can reduce this output voltage error overtemperature if the sense resistor is at roughly the same ambient temperature as RSENSE. Small value copper wire inductors can be used in this way if the inductor resistance is well specified. Figure 2d shows the resultant cable drop compensation output at several temperatures using a copper RSENSE. Use of an RSENSE that varies over temperature will make the LT8697 output current limit vary over temperature. To achieve the rated output current over the full operating temperature range, a higher room temperature output current limit may be necessary. Table 2 shows the manufacturer specified DCR of several copper wire inductors that may be used for RSENSE. 80 100 8697 F02d Figure 2d. Cable Drop Compensation Through 4m of AWG 20 Twisted-Pair Cable (260mΩ) with Temperature Compensation Using Copper RSENSE Table 2. Copper Wire Inductors for Use as Sense Resistors VENDOR PART NUMBER DC RESISTANCE (mΩ) Coilcraft NA5931-AL 15.7 ±5% Coilcraft NA5932-AL 21.8 ±5% Coilcraft NA5933-AL 32.4 ±5% Coilcraft NA5934-AL 34.3 ±5% Coilcraft NA5935-AL 44.1 ±5% Coilcraft NA5936-AL 47.2 ±5% Effect of Cable Inductance on Load Step Transient Response The inductance of long cabling limits the peak-to-peak transient performance of a 2-wire sense regulator to fast load steps. Since a 2-wire sense regulator like the LT8697 detects the output voltage at its local output and not at the point of load, the load step response degradation due to cable inductance is present even with cable resistance compensation. The local regulator output capacitor and the input capacitor of the remote load form a LC tank circuit through the inductive cabling between them. Fast load steps through long cabling show a large peak-to-peak transient response and ringing at the resonant frequency of the circuit. This ringing is a property of the LC tank circuit and does not indicate regulator instability. 8697p 14 For more information www.linear.com/LT8697 LT8697 Applications Information Figure 3 shows the LT8697 load step transient response to a 50mA/µs, 0.5A load step. Two cable impedances are compared: resistive only and then resistive plus inductive. First, a surface mount 0.2Ω resistor is tied between the LT8697 output and the load step generator. This resistor stands in for a purely resistive “cable”. Second, actual AWG 20 twisted-pair cabling 3 meters long with 0.2Ω of total resistance and about 2.3µH of inductance is connected between the LT8697 output and the load step generator. Even though the resistance in these two circuits is the same, the transient load step response in the cable is worse due to the inductance. The degree that cable inductance degrades LT8697 load transient response performance depends on the inductance of the cable and on the load step rate. Long cables have higher inductance than short cables. Cables with less separation between supply and return conductor pairs show lower inductance per unit length than those with separated conductors. Faster load step rate exacerbates the effect of inductance on load step response. 5.50 5 Since the local ground at the LT8697 is separated by a current carrying cable from the remote ground at the point of load, the ground reference points for these two locations are different. Use a differential probe across the remote output at the end of the cable to measure output voltage at that point. Do not simultaneously tie an oscilloscope’s probe ground leads to both the local LT8697 ground and the remote point of load ground. Doing so will result in high current flow in the probe ground lines and a strange and incorrect measurement. Figure 4 shows this behavior. A 1A/µs, 0.5A load step is applied to the LT8697 output through 3 meters of AWG 20 twisted-pair cable. On one curve, the resultant output voltage is measured correctly using a differential probe tied across the point of load. On the other curve, the oscilloscope ground lead is tied to the remote ground. This poor probing causes both a DC error due to the lower ground return resistance and an AC error showing increased overshoot and ringing. Do not add your oscilloscope, lab bench, and input power supply ground lines into your measurement of the LT8697 remote output. 5.6 VLOAD THROUGH 0.2Ω 4 5.00 VLOAD THROUGH 0.2Ω CABLE 2 ILOAD 50mA/µs 4.50 5 VLOAD INCORRECTLY PROBED 5.0 4.7 1 3 VLOAD CORRECTLY PROBED 100µs/DIV 2 ILOAD 1A/µs 4.4 4.25 4 0 CURRENT (A) 4.75 3 VOLTAGE (V) 5.3 CURRENT (A) VOLTAGE (V) 5.25 1 8697 F03 4.1 Figure 3. Effect of Cable Inductance on Load Step Transient Response 100µs/DIV 0 8697 F04 Figure 4. Effect of Probing Remote Output Incorrectly Probing a Remote Output Correctly Reducing Output Overshoot Take care when probing the LT8697’s remote output to obtain correct results. The whole point of cable drop compensation is that the local regulator output has a different voltage than the remote output at the end of a cable due to the cable resistance and high load current. The same is true for the ground return line which also has resistance and carries the same current as the output. A consequence of the use of cable drop compensation is that the local output voltage at the LT8697 SYS pin is regulated to a voltage that is higher than the remote output voltage at the point of load. Several hundred mΩ of cable resistance can separate these two outputs, so at 2A of load current, the SYS pin voltage may be significantly higher than the nominal 5V output at the point of load. 8697p For more information www.linear.com/LT8697 15 LT8697 Applications Information Ensure that any components tied to the LT8697 output can withstand this increased voltage. The LT8697 has several features designed to mitigate any effects of higher output voltage due to cable drop compensation. First, the LT8697 error amplifier, in addition to regulating the voltage on the USB5V pin to 5V for the primary output, also regulates the SYS pin voltage to less than 5.8V. For VSYS < 5.8V, the USB5V feedback input runs the LT8697 control loop, and for VSYS > 5.8V, the SYS feedback input runs the LT8697 control loop. This 5.8V upper limit on the maximum SYS voltage protects components tied to the LT8697 output, such as a USB device or a USB Switch, from an overvoltage condition, but limits the possible amount of cable drop compensation to 0.8V. Additionally, the LT8697 can sink current from the output and return the charge to the input when in forced continuous mode (FCM). This feature improves the step response for a load step from high to low. Cable drop compensation adds voltage to the output to compensate for voltage drop across the line resistance at high load. Since most DC/DC convertors can only source current, a load step from high to near zero current leaves the output voltage high and out of regulation. VLOAD WITHOUT FCM 5.00 4.75 Using SYS as a Secondary Output 2 ILOAD 25mA/µs 4.50 4.25 400µs/DIV The LT8697 has output current limit. Many USB Switches implement current limit as well. For well controlled and predicable behavior, ensure that only one chip sets the output current limit, and the other chip has current limit that exceeds the desired current limit over all operating conditions. 6 4 VLOAD WITH FCM A USB or similar electronic switch can be tied between the LT8697 output and the point of load. The switch on resistance can be included in the cable drop compensation calculation. Alternately, to improve load regulation, tie the USB5V feedback input through RCDC to the output of the USB Switch so the USB Switch impedance is removed from the DC load response. Tie the output to the USB Switch input. The SYS pin regulates to a maximum of 5.8V, so the USB Switch should be chosen accordingly. 8 0 –2 8697 F05 Figure 5. Load Step Response with and without Forced Continuous Mode CURRENT (A) VOLTAGE (V) 5.25 Interfacing with a USB Switch The LT8697 has many of the features of USB Switches: programmable output current limit, filtered fault reporting and on/off functionality. In addition, unlike many USB Switches, the LT8697 output can survive shorts to 30V, enhancing system robustness. Therefore, in many cases a USB Switch is not necessary and the LT8697 can provide both the functionality of a voltage regulator and a USB Switch. The LT8697 fixes this problem by allowing the regulator to sink current from the output when USB5V is too high using FCM. Figure 5 shows the output voltage of the front page application circuit with and without FCM. 5.50 The load step response from high current to zero without the FCM is extremely slow and is limited by the SYS pin bias current. However, with FCM enabled, the output slews quickly back into regulation. If VIN is above 29V or VSYS is above 7.5V, FCM is disabled. For some applications, the SYS pin can be used as a secondary voltage output in addition to the primary voltage output regulated by the USB5V pin. The SYS pin voltage varies between 5V and 5.8V depending on the load current if cable drop compensation is used on the primary output. A 3.3V low dropout regulator can be tied to SYS to provide a secondary regulated output such as to power a USB μcontroller. The SYS output will not have cable drop compensation, but will rise above 5V depending on the USB output load current. The load on the SYS pin should 8697p 16 For more information www.linear.com/LT8697 LT8697 Applications Information be designed to limit load current. Also, an electronic switch may be necessary to prevent an output overcurrent condition on the USB5V output from bringing down the SYS output. See the Inductor Selection and Maximum Output Current discussion below to determine how much total load current can be drawn from the outputs for a given LT8697 application. above VIN = 29V the LT8697 disables forced continuous mode so the part can pulse skip to maintain regulation at any low VOUT to VIN ratio. For VIN < 29V, use the following equation to find the minimum output voltage (VOUT(MIN)) where the LT8697 can regulate the output current limit: Setting the Current Limit where fSW is the switching frequency, tON(MIN) is the minimum on-time, VSW(TOP) and VSW(BOT) are the internal switch drops (~0.3V and ~0.15V) respectively at maximum load), VSENSE is voltage across the RSENSE at the programmed output current and VL is the resistive drop across the inductor ESR at the programmed output current. If the calculated VOUT(MIN) is negative or is less than the IR drop across the resistive short on the output at the programmed current limit, then the LT8697 can regulate the output current limit. In addition to regulating the output voltage, the LT8697 includes a current regulation loop for setting the average output current limit. The LT8697 measures the voltage drop across an external current sense resistor RSENSE using the ISP and ISN pins. This resistor should be connected in series with the load current after the output capacitor. The current loop modulates the cycle-by-cycle top switch switch current limit such that the average voltage across the ISP–ISN pins does not exceed its regulation point. The LT8697 current limit can be programmed by forcing a voltage on the ICTRL pin between 0V and 1V. Program the current limit using the following equation: ILIM = VCTRL RSENSE • 20.3 The preceding ILIM equation is valid for VISP – VISN < 48mV. At 48mV VSENSE, the internal current limit loop takes over output current regulation from the ICTRL pin. The maximum programmable output current (ILIM(MAX)) is therefore found by the following equation: VOUT(MIN) = 0.1 • fSW • tON(MIN) • (VIN – VSW(TOP) + VSW(BOT)) – VSW(BOT) – VSENSE – VL In practical applications, the resistances of the cable, inductor and sense resistor are more than adequate to allow the LT8697 to regulate to the output current limit for any switching frequency and input voltage. For a 400kHz application in a worst-case condition, the programmed output current can be regulated into VOUT = 0V for any input voltage up to 42V. For a 2MHz application in a worstcase condition, the programmed output current can be regulated into VOUT = 0.3V or higher. Refer to Figure 6 to see how the front page application circuit responds to a short directly on the regulator output without a cable. 1.0 48mV ILIM(MAX) = RSENSE VCTRL = OPEN, VIN = 27V VCTRL = 0.5V, VIN = 16V VCTRL = OPEN, VIN = 16V VCTRL = 0.5V, VIN = 27V The internal 2μA pull-up on the ICTRL pin allows this pin to be floated if unused, in which case the ILIM(MAX) would be the output current limit. When in forced continuous mode, the LT8697’s ability to regulate the output current is limited by its tON(MIN). In this scenario, at very low output voltage the output current can exceed the programmed output current limit and is limited by the bottom switch current limit of 4.5A plus 1/2 the ripple current. To help mitigate this effect, at low output voltage the LT8697 folds back the switching frequency by 10:1 to allow regulation at very low duty cycle. Also, VOUT (V) 0.8 0.6 0.4 0.2 0 1 1.5 2 2.5 3 IOUT (A) 8697 F06 Figure 6. Output Current Regulation vs VOUT at fSW = 2MHz, RSENSE = 18mΩ 8697p For more information www.linear.com/LT8697 17 LT8697 Applications Information Using RCBL as an Output Current Monitor Table 3. SW Frequency vs RT Value The primary function of the RCBL pin is to set the cable drop compensation as discussed in the cable drop compensation section earlier. However, the RCBL pin produces an output voltage that is proportional to the output load current. The RCBL pin can therefore be used as an output load monitor. The voltage on the RCBL pin obeys the following relation to USB load current: VCBL = ILOAD • RSENSE • 20.55 VCBL is valid when the LT8697 is switching. Since the RCBL pin current is part of the cable drop compensation control loop, excessive capacitive loading on the RCBL pin can cause USB output voltage overshoot during load steps. Keep the capacitive loading on the RCBL pin below 100pF or isolate the load capacitance with 100kΩ in series between the RCBL pin and the input it is driving, as shown in Figure 7. RCBL 100k ADC RCBL 8697 F07 Figure 7. Using the RCBL Pin as Output Current Monitor The LT8697 uses a constant frequency PWM architecture that can be programmed to switch from 300kHz to 2.2MHz by using a resistor tied from the RT pin to ground. A table showing the necessary RT value for a desired switching frequency is in Table 3. The RT resistor required for a desired switching frequency can be calculated using the following equation: RT (kΩ) 0.3 140 0.4 102 0.5 80.6 0.6 66.5 0.7 56.2 0.8 47.5 1.0 37.4 1.2 30.1 1.4 25.5 1.6 21.5 1.8 18.7 2.0 16.5 2.2 14.7 Operating Frequency Selection and Trade-Offs Selection of the operating frequency is a trade-off between efficiency, component size, and input voltage range. The advantage of high frequency operation is that smaller inductor and capacitor values may be used. The disadvantages are lower efficiency and a reduced input voltage range with constant frequency operation. The highest switching frequency (fSW(MAX)) for a given application can be calculated as follows: fSW(MAX) = Setting the Switching Frequency RT = fSW (MHz) 43 − 5.2 fSW where RT is in kΩ and fSW is the desired switching frequency in MHz. ( 5V + VSW(BOT) tON(MIN) • VIN − VSW(TOP) + VSW(BOT) ) where VIN is the typical input voltage, VSW(TOP) and VSW(BOT) are the internal switch drops (~0.3V and ~0.15V respectively, at maximum load) and tON(MIN) is the minimum top switch on-time (see the Electrical Characteristics section). This equation shows that a slower switching frequency is necessary to accommodate a high VIN/VOUT ratio. For transient operation, VIN may go as high as the absolute maximum rating of 42V regardless of the RT value. However, the LT8697 will reduce switching frequency as necessary to maintain control of inductor current to assure safe operation. 8697p 18 For more information www.linear.com/LT8697 LT8697 Applications Information The LT8697 can operate at very high duty cycle, thus maintaining the output voltage in regulation with the input voltage only several hundred mV higher. This dropout voltage depends on load current and the RDS(ON) of the top switch. However, the LT8697 skips off-times in very high duty cycle conditions, reducing the switching frequency below that programmed by RT. In this dropout mode, the maximum allowable on-time is about 18µs. If this 18µs on-time threshold is reached, the LT8697 enforces a 400ns off-time to keep the BST capacitor charged at light loads. This behavior limits the maximum duty cycle to 97.5%, but guarantees good dropout performance across all loads and any start-up condition. For applications that cannot allow deviation from the programmed switching frequency at low VIN /VOUT ratios, use the following formula to set switching frequency: fSW(MAX) = VIN(MIN) − 5.8 − VSW(TOP) tOFF(MIN) VIN(MIN) + VSW(BOT) − VSW(TOP) 1 where VIN(MIN) is the minimum input voltage without skipped cycles, VSW(TOP) and VSW(BOT) are the internal switch drops (~0.3V, ~0.15V, respectively at maximum load), fSW is the switching frequency (set by RT), and tOFF(MIN) is the minimum switch off-time. Note that higher switching frequency will increase the minimum input voltage below which cycles will be dropped to achieve higher duty cycle. Inductor Selection and Maximum Output Current The LT8697 is designed to minimize solution size by allowing the inductor to be chosen based on the output load requirements of the application. During overload or short-circuit conditions the LT8697 safely tolerates operation with a saturated inductor through the use of a high speed peak-current mode architecture. A good first choice for the inductor value is as follows: L= 5.8V + VSW(BOT) fSW where fSW is the switching frequency in MHz, VSW(BOT) is the bottom switch drop (~0.15V) and L is the inductor value in μH. To avoid overheating and poor efficiency, an inductor must be chosen with an RMS current rating that is greater than the maximum expected output load of the application. In addition, the saturation current (typically labeled ISAT) rating of the inductor must be higher than the load current plus 1/2 of the inductor ripple current: IL(PEAK) = IOUT(MAX) + ∆IL 2 where ΔIL is the inductor ripple current as calculated below and IOUT(MAX) is the maximum output load for a given application. As a quick example, an application requiring 1A output should use an inductor with an RMS rating of greater than 1A and an ISAT of greater than 1.3A. During long duration overload or short-circuit conditions, the inductor RMS current rating requirement is greater to avoid overheating of the inductor. To keep the efficiency high, the series resistance (DCR) should be less than 0.04Ω, and the core material should be intended for high frequency applications. The LT8697 limits the peak switch current in order to protect the switches and the system from overload faults. The top switch current limit (ILIM) is at least 4.8A at low duty cycles and decreases linearly to 4A at DC = 0.8. The inductor value must then be sufficient to supply the desired maximum output current (IOUT(MAX)), which is a function of the switch current limit (ILIM) and the ripple current. IOUT(MAX) = ILIM − ∆IL 2 The peak-to-peak ripple current in the inductor can be calculated as follows: ∆IL = 5V L • fSW 5V • 1− VIN(MAX) where fSW is the switching frequency of the LT8697 and L is the value of the inductor. Therefore, the maximum output current that the LT8697 will deliver depends on the switch current limit, the inductor value, and the input and output voltages. The inductor value may have to be increased if the inductor ripple current does not allow sufficient maximum output current (IOUT(MAX)) given the 8697p For more information www.linear.com/LT8697 19 LT8697 Applications Information switching frequency and maximum input voltage used in the desired application. The optimum inductor for a given application may differ from the one indicated by this design guide. A larger value inductor provides a higher maximum load current and reduces the output voltage ripple. For applications requiring smaller load currents, the value of the inductor may be lower and the LT8697 may operate with higher ripple current. This allows use of a physically smaller inductor, or one with a lower DCR resulting in higher efficiency. For more information about maximum output current and discontinuous operation, see Linear Technology’s Application Note 44. Finally, for duty cycles greater than 50% (VOUT/VIN > 0.5), a minimum inductance LMIN is required to avoid sub-harmonic oscillation: L MIN = 5.8V + VSW(BOT) fSW • 0.8 Input Capacitor Bypass the input of the LT8697 circuit with a ceramic capacitor of X7R or X5R type placed as close as possible to the VIN and PGND pins. Y5V types have poor performance over temperature and applied voltage, and should not be used. A 4.7μF to 10μF ceramic capacitor is adequate to bypass the LT8697 and will easily handle the ripple current. Note that larger input capacitance is required when a lower switching frequency is used. If the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. This can be provided with a low performance electrolytic capacitor. Step-down regulators draw current from the input supply in pulses with very fast rise and fall times. The input capacitor is required to reduce the resulting voltage ripple at the LT8697 and to force this very high frequency switching current into a tight local loop, minimizing EMI. A 4.7μF capacitor is capable of this task, but only if it is placed close to the LT8697 (see the PCB Layout section). A second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT8697. A ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. If the LT8697 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8697’s voltage rating. This situation is easily avoided (see Linear Technology Application Note 88). Output Capacitor and Output Ripple The output capacitor has two essential functions. Along with the inductor, it filters the square wave generated by the LT8697 to produce the DC output. In this role it determines the output ripple, thus low impedance at the switching frequency is important. The second function is to store energy in order to satisfy transient loads and stabilize the LT8697’s control loop. Ceramic capacitors have very low equivalent series resistance (ESR) and provide the best ripple performance. For good starting values, see the Typical Applications section. Use X5R or X7R types. This choice will provide low output ripple and good transient response. Increasing the output capacitance will also decrease the output voltage ripple. A lower value of output capacitor can be used to save space and cost but this may cause loop instability if the output capacitor is too small. Since cable drop compensation slews the voltage across the output capacitor in response to transient load steps, a smaller output capacitor can give faster response time. See the Typical Applications in this data sheet for suggested capacitor values. When choosing a capacitor, special attention should be given to the data sheet to calculate the effective capacitance under the relevant operating conditions of voltage bias and temperature. A physically larger capacitor or one with a higher voltage rating may be required. Enable Pin The LT8697 is in shutdown when the EN/UV pin is low and active when the pin is high. The rising threshold of the EN comparator is 1.0V, with 40mV of hysteresis. The EN/UV pin can be tied to VIN if the shutdown feature is not used, or tied to a logic level if shutdown control is required. 8697p 20 For more information www.linear.com/LT8697 LT8697 Applications Information Adding a resistor divider from VIN to EN/UV programs the LT8697 to regulate the output only when VIN is above a desired voltage (see the Block Diagram). Typically, this threshold, VIN(EN), is used in situations where the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant power from the source, so source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. The VIN(EN) threshold prevents the regulator from operating at source voltages where the problems might occur. This threshold can be adjusted by setting the values R3 and R4 such that they satisfy the following equation: R3 VIN(EN) = + 1 • 1.0V R4 pin voltage. For output tracking applications, TR/SS can be externally driven by another voltage source. From 0V to 0.97V, the TR/SS voltage will override the internal 0.97V reference input to the error amplifier, thus regulating the USB5V pin voltage to 5× that of TR/SS pin. When TR/SS is above 0.97V, tracking is disabled and USB5V will regulate to 5V. The TR/SS pin may be left floating if the function is not needed. An active pull-down circuit is connected to the TR/SS pin which will discharge the external soft-start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. Fault conditions that clear the soft-start capacitor are the EN/UV pin transitioning low, VIN voltage falling too low or thermal shutdown. Output Power Good where the LT8697 will remain off until VIN is above VIN(EN). Due to the comparator’s hysteresis, switching will not stop until the input falls slightly below VIN(EN). INTVCC Regulator An internal low dropout (LDO) regulator produces the 3.4V supply from VIN that powers the drivers and the internal bias circuitry. The INTVCC can supply enough current for the LT8697’s circuitry and must be bypassed to ground with a minimum capacitance of 1μF. Use an X5R or an X7R ceramic capacitor. Good bypassing is necessary to supply the high transient currents required by the power MOSFET gate drivers. To improve efficiency the internal LDO can also draw current from the SYS pin when the SYS pin is at 3.3V or higher. SYS must be tied to the LT8697 output capacitor. If the SYS pin is below 3.3V, the internal LDO will consume current from VIN. Do not load INTVCC with more than 100µA. Output Voltage Tracking and Soft-Start The LT8697 allows the user to program its output voltage ramp rate by means of the TR/SS pin. An internal 2.2μA pulls up the TR/SS pin to INTVCC. Putting an external capacitor on TR/SS enables soft starting the output to prevent current surge on the input supply. During the soft-start ramp the output voltage will proportionally track the TR/SS When the LT8697’s output voltage is within the ±9% window of the regulation point, which is VUSB5V in the range of 4.55V to 5.45V (typical), the output voltage is considered good and the open-drain PG pin goes high impedance and is typically pulled high with an external resistor. Otherwise, the internal pull-down device will pull the PG pin low. To prevent glitching, both the upper and lower thresholds include 1.3% of hysteresis. The PG pin is also actively pulled low during several fault conditions: EN/UV pin is below 1V, INTVCC has fallen too low, VIN is too low, or thermal shutdown. Synchronization To synchronize the LT8697 oscillator to an external frequency connect a square wave (with 20% to 80% duty cycle) to the SYNC pin. The square wave amplitude should have valleys that are below 0.4V and peaks above 2.4V (up to 6V). The LT8697 may be synchronized over a 300kHz to 2.2MHz range. The RT resistor should be chosen to set the LT8697 switching frequency equal to or below the lowest synchronization input. For example, if the synchronization signal will be 500kHz and higher, the RT should be selected for 500kHz. The slope compensation is set by the RT value, while the minimum slope compensation required to avoid subharmonic oscillations is established by the inductor 8697p For more information www.linear.com/LT8697 21 LT8697 Applications Information size, input voltage, and output voltage. Since the synchronization frequency will not change the slopes of the inductor current waveform, if the inductor is large enough to avoid subharmonic oscillations at the frequency set by RT, then the slope compensation will be sufficient for all synchronization frequencies. current when held above 9V. A minimum 10k RCDC resistor must be tied from USB5V to VOUT for robust operation with VOUT above its regulation point. The remaining pins SW, ISP, ISN, PG and SYS tied at or near the output voltage have at least a 30V maximum rating. The output capacitor COUT absorbs ESD events on the LT8697 output. Output Short Protection If VIN is held low or floated while VOUT is held high, the body diode of the LT8697 internal top power switch will conduct high current from the SW pin to the VIN pin, regardless of the state of the EN/UV pin, causing damage to the LT8697. VOUT must remain equal to or lower than VIN to avoid this damage to the LT8697. The LT8697 will tolerate a shorted output. Several features are used for protection during output short-circuit and brownout conditions. The first is the switching frequency will be folded back while the output is lower than the set point to maintain inductor current control. Second, the bottom switch current is monitored such that if inductor current is beyond safe levels, switching of the top switch will be delayed until the inductor current falls to safe levels. The LT8697 withstands a short between its output and 12V or 24V automotive battery voltage. The USB5V pin draws PCB Layout For proper operation and minimum EMI, care must be taken during printed circuit board layout. Figure 8 shows the recommended component placement with trace, ground plane and via locations. Note that large, switched Figure 8. Recommended PCB Layout for the LT8697 8697p 22 For more information www.linear.com/LT8697 LT8697 Applications Information currents flow in the LT8697’s VIN pins, PGND pins, and the input capacitors (CIN1 and CIN2). The loop formed by the input capacitor should be as small as possible by placing the capacitor adjacent to the VIN and PGND pins. When using a physically large input capacitor the resulting loop may become too large in which case using a small case/ value capacitor placed close to the VIN and PGND pins plus a larger capacitor further away is preferred. These components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. Place a local ground plane under the application circuit on the layer closest to the surface layer. The SW and BST nodes should be as small as possible. Finally, keep the USB5V and RT nodes small so that the ground traces will shield them from the SW and BST nodes. The exposed pad on the bottom of the package must be soldered to ground so that the pad is connected to ground electrically and also acts as a heat sink thermally. To keep thermal resistance low, extend the ground plane as much as possible, and add thermal vias under and near the LT8697 to additional ground planes within the circuit board and on the bottom side. High Temperature Considerations For applications with higher ambient temperatures, lay out the PCB to ensure good heat sinking of the LT8697. The exposed pad on the bottom of the package must be soldered to a ground plane. This ground should be tied to large copper layers below with thermal vias; these layers will spread heat dissipated by the LT8697. Placing additional vias can reduce thermal resistance further. The maximum load current should be derated as the ambient temperature approaches the maximum junction rating. Power dissipation within the LT8697 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the inductor loss. The die temperature is calculated by multiplying the LT8697 power dissipation by the thermal resistance from junction to ambient. The LT8697 will stop switching and indicate a fault condition if safe junction temperature is exceeded. 8697p For more information www.linear.com/LT8697 23 LT8697 Typical Applications 5V Step-Down Converter with Cable Drop Compensation for Copper Cabling Over Wide Temperature Range CIN 10µF CBST 0.1µF L 10µH BST VIN EN/UV SW PG CVCC 1µF CSS 10nF RT 56.2k RSENSE 0.02Ω INTVCC SYS LT8697 ICTRL ISP SYNC ISN TR/SS USB5V RT 4 METERS AWG20 TWISTED PAIR CABLE 0.13Ω + CCDC 1nF COUT 100µF RCDC 10k 0.13Ω – VLOAD 5V 2.1A 8697 TA02 RCBL RCBL1 10k PGND GND VOUT LOAD VIN RCBL2 10k RNTC 10k fSW = 700kHz FOR VIN = 7V TO 27V CIN : X7R OR X5R COUT: 1210 CASE SIZE, X7R OR X5R CVCC: X7R OR X5R CBST: X7R OR X5R L: WÜRTH 74437368100 RNTC: MURATA NCP21XV103J03RA VIN(MAX) = 42V VIN(MIN) = 5.8V AT 1A ILOAD 6.6V AT 2.1A ILOAD Temperature Correction for Cable Drop Compensation Through Copper Cabling 5.8 VOUT VOLTAGE (V) 5.6 5.4 ILOAD = 2.1A CABLE = 4 METERS AWG 20 TWISTED-PAIR COPPER 5.2 VLOAD 5.0 4.8 –50 0 50 100 TEMPERATURE (°C) 150 8697 TA02b 8697p 24 For more information www.linear.com/LT8697 LT8697 Typical Applications Transient Response Through 3 Meters AWG 20 Twisted-Pair Cable 2MHz 5V Step-Down Converter with Cable Drop Compensation BST VIN L 3.3µH EN/UV SW CVCC 1µF CSS 10nF SYS LT8697 INTVCC ICTRL ISP SYNC ISN TR/SS USB5V RT RT 16.5k 0.1Ω CCDC 1nF RCDC 10k COUT 47µF ×2 – fSW = 2MHz FOR VIN = 8V TO 27V RCBL 18.2k PGND 0.1Ω 5 5.25 + RCBL GND 5.50 3 METERS AWG 20 TWISTED PAIR CABLE VLOAD 5V 2.4A 5.00 4.75 2 ILOAD 50mA/µs 4.25 100µs/DIV 0 8697 TA03b Transient Response 0.5A to 1.5A Load Step VIN BST EN/UV SW PG SYS INTVCC LT8697 ISP SYNC ISN TR/SS USB5V fSW = 2MHz FOR VIN = 8V TO 27V RCBL GND PGND RSENSE VOUT 0.02Ω 100k RCBL 15.4k CCDC 1nF VMON 0.41V/A CBST: X7R OR X5R CIN : X7R OR X5R COUT: 1210 CASE SIZE, X7R OR X5R CVCC: X7R OR X5R 5.00 0.13Ω + RCDC 10k COUT 47µF ×2 VLOAD 4 METERS AWG20 TWISTED PAIR CABLE 0.13Ω – VLOAD 5.1V 2.1A 8697 TA04a R5V1 500k 4.75 1.00 ILOAD 10mA/µs 2 0.50 VMON 0.41V/A 1 0 400µs/DIV 8697 TA04b CURRENT (A) ICTRL RT 5.25 CBST 0.1µF L 3.3µH VOLTAGE (V) CIN 4.7µF LOAD VIN CSS 10nF RT 16.5k 1 L: COILCRAFT XAL7070-332 CBST: X7R OR X5R VIN(MAX) = 42V CIN: X7R OR X5R COUT: 1210 CASE SIZE, X7R OR X5R VIN(MIN) = 5.7V AT 1A ILOAD 6.3V AT 2.4A ILOAD CVCC: X7R OR X5R 2MHz 5.1V Step-Down Converter with Cable Drop Compensation and Output Current Monitor CVCC 1µF 3 VLOAD 4.50 8697 TA03a 4 VOUT CURRENT (A) PG RSENSE 0.018Ω VOUT VOLTAGE (V) CBST 0.1µF CIN 4.7µF LOAD VIN 0 L1: SUMIDA CDRR105NP-3R3NC VIN(MAX) = 42V VIN(MIN) = 5.8V AT 1A ILOAD 6.5V AT 2.1ILOAD 8697p For more information www.linear.com/LT8697 25 LT8697 Typical Applications 2.2MHz, 5.05V Step-Down Converter with Negative Output Resistance CBST 0.1µF CIN 4.7µF BST VIN L 2.7µH EN/UV CVCC 1µF CSS 10nF SYS LT8697 INTVCC ICTRL ISP SYNC ISN TR/SS USB5V RT RT 14.7k fSW = 2.2MHz FOR VIN = 8V TO 27V RSENSE 0.018Ω SW PG 3 METERS AWG 20 TWISTED PAIR CABLE 0.1Ω COUT 47µF ×2 RCDC 1nV RCDC2 9.09k RCBL 15.4k PGND – R5VO5 100k RCBL GND + RCDC1 1k LOAD VIN 0.1Ω VLOAD 5.05V 2.4A 8697 TA07a L: COILCRAFT XAL7030-272 CBST: X7R OR X5R VIN(MAX) = 42V CIN: X7R OR X5R COUT: 1210 CASE SIZE, X7R OR X5R VIN(MIN) = 5.8V AT 1A ILOAD 6.5V AT 2.4A ILOAD CVCC: X7R OR X5R Output Voltage vs Load Current 5.8 VOLTAGE (V) 5.6 VOUT 5.4 5.2 5.0 VLOAD 0 0.5 1.0 1.5 2.0 ILOAD (A) 2.5 3.0 8697 TA07b 8697p 26 For more information www.linear.com/LT8697 LT8697 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UDD Package 24-Lead Plastic QFN (3mm × 5mm) UDD Package (Reference LTC DWG # 05-08-1833 Rev Ø) 24-Lead Plastic QFN (3mm × 5mm) (Reference LTC DWG # 05-08-1833 Rev Ø) 0.70 ±0.05 3.50 ±0.05 2.10 ±0.05 3.65 ±0.05 1.50 REF 1.65 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 3.50 REF 4.10 ±0.05 5.50 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3.00 ±0.10 0.75 ±0.05 1.50 REF 23 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.25 × 45° CHAMFER 24 0.40 ±0.10 PIN 1 TOP MARK (NOTE 6) 5.00 ±0.10 1 2 3.65 ±0.10 3.50 REF 1.65 ±0.10 (UDD24) QFN 0808 REV Ø 0.200 REF 0.00 – 0.05 R = 0.115 TYP 0.25 ±0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 8697p Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT8697 27 LT8697 Typical Application High Efficiency 5.2V Step-Down Converter with Programmable Output Current Limit and SYNC CIN 10µF BST ICTRL CVCC 1µF 100k CSS 10nF RT 140k INTVCC SYS LT8697 PG ISP SYNC ISN TR/SS USB5V RT RCBL GND PGND 100 95 90 RSENSE 0.018Ω SW EN/UV CURRENT LIMIT 2.67A/V FOR VCTRL = 0.2V TO 1V 300kHz TO 500kHz VIN CBST 0.1µF L 22µH COUT 100µF VOUT 5.2V 0.5A TO 2.4A RCDC 10k 85 80 fSW = 300kHz RSENSE = 18mΩ DCRL = 20mΩ RCBL = OPEN VOUT = 5.2V L = 22µH SUMIDA 75 70 65 60 8697 TA06 249k EFFICIENCY (%) VIN 6V TO 42V Efficiency vs Load CIN : X7R OR X5R COUT: 1210 CASE SIZE, X7R OR X5R CVCC: X7R OR X5R CBST: X7R OR X5R L: SUMIDA CRH15D78/ANP-220MC fSW = 300kHz TO 500kHz FOR VIN = 6.5V TO 27V VIN = 8V VIN = 12V VIN = 24V 55 50 0 0.5 1.5 2.0 1.0 LOAD CURRENT (A) 2.5 8697 TA06b Related Parts PART NUMBER DESCRIPTION COMMENTS LT8610 42V, 2.5A, 96% Efficiency, 2.2MHz Synchronous Micropower Step-Down DC/DC Converter with IQ = 2.5µA VIN(MIN) = 3.4V, VIN(MAX) = 42V, VOUT(MIN) = 0.985V, IQ = 2.5µA, ISD <1µA, MSOP-16E Package LT8611 42V, 2.5A, 96% Efficiency, 2.2MHz Synchronous Micropower Step-Down DC/DC Converter with IQ = 2.5µA and Input/Output Current Limit/Monitor VIN(MIN) = 3.4V, VIN(MAX) = 42V, VOUT(MIN) = 0.985V, IQ = 2.5µA, ISD <1µA, 3mm × 5mm QFN-24 LT3690 36V with 60V Transient Protection, 4A, 92% Efficiency, 1.5MHz Synchronous Micropower Step-Down DC/DC Converter with IQ = 70µA VIN(MIN) = 3.9V, VIN(MAX) = 36V, VOUT(MIN) = 0.985V, IQ = 70µA, ISD <1µA, 4mm × 6mm QFN-26 LT3971A-5 38V, 1.2A, 2.2MHz High Efficiency Micropower Step-Down DC/DC Converter with IQ = 2.8µA VIN(MIN) = 4.2V, VIN(MIN) = 40V, VOUT(MIN) = 1.21V, IQ = 2.8µA, ISD <1µA, MSOP-10E LT3991 55V, 1.2A, 2.2MHz High Efficiency Micropower Step-Down DC/DC Converter with IQ = 2.8µA VIN(MIN) = 4.2V, VIN(MAX) = 62V, VOUT(MIN) = 1.21V, IQ = 2.8µA, ISD <1µA, 3mm × 3mm DFN-10, MSOP-10E LT3970 40V, 350mA, 2.2MHz High Efficiency Micropower Step-Down DC/DC Converter with IQ = 2.5µA VIN(MIN) = 4.2V, VIN(MAX) = 40V, VOUT(MIN) = 1.21V, IQ = 2.5µA, ISD <1µA, 3mm × 2mm DFN-10, MSOP-10 LT3990 62V, 350mA, 2.2MHz High Efficiency Micropower Step-Down DC/DC Converter with IQ = 2.5µA VIN(MIN) = 4.2V, VIN(MAX) = 62V, VOUT(MIN) = 1.21V, IQ = 2.5µA, ISD <1µA, 3mm × 2mm DFN-10, MSOP-10 LT3480 VIN(MIN) = 3.6V, VIN(MAX) = 36V, Transient to 60V, VOUT(MIN) = 36V with Transient Protection to 60V, 2A (IOUT), 2.4MHz, High Efficiency Step-Down DC/DC Converter with Burst Mode® Operation 0.78V, IQ = 70µA, ISD <1µA, 3mm × 3mm DFN-10, MSOP-10E LT3980 58V with Transient Protection to 80V, 2A (IOUT), 2.4MHz, High Efficiency Step-Down DC/DC Converter with Burst Mode Operation VIN(MIN) = 3.6V, VIN(MAX) = 58V, Transient to 80V, VOUT(MIN) = 0.78V, IQ = 85µA, ISD <1µA, 3mm × 4mm DFN-16, MSOP-16E 8697p 28 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT8697 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT8697 LT 0713 • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2013