MPS MP2207

MP2207
16V, 4A, 1.3MHz Synchronous
Step-Down Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP2207 is an internally compensated
1.3MHz fixed frequency PWM synchronous
step-down regulator with a 3V to 6V bias supply
(VCC). MP2207 operates from a 3V to 16V input
and generates an adjustable output voltage
from 0.8V to 0.9xVIN at up to 4A load current.
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•
The MP2207 integrates an 80mΩ high-side
switch and an 80mΩ synchronous rectifier for
high efficiency without an external Schottky
diode. With peak current mode control and
internal compensation, it is stable with a output
ceramic capacitor and a small inductor. Fault
protection
includes
hiccup
short-circuit
protection, cycle-by-cycle current limiting and
thermal shutdown. Other features include
frequency synchronization and internal softstart.
The MP2207 is available in small 3mm x 3mm
10-lead QFN and SOIC8E packages.
4A Output Current
Input Supply Range: 3V to 16V
80mΩ Internal Power MOSFET Switches
All Ceramic Output Capacitors Design
Up to 95% Efficiency
1.3MHz Fixed Switching Frequency
Adjustable Output from 0.8V to 0.9xVIN
Internal Soft-Start
Frequency Synchronization Input
Thermal Shutdown
Cycle-by-Cycle Current Limiting
Hiccup Short Circuit Protection
10-lead, 3mm x 3mm QFN and SOIC8E
Packages.
APPLICATIONS
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•
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µP/ASIC/DSP/FPGA Core and I/O Supplies
Printers and LCD TVs
Network and Telecom Equipment
Point of Load Regulators
“MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic
Power Systems, Inc.
TYPICAL APPLICATION
VIN
3V to 16V
VCC
2.5V to 6V
OFF ON
C1
33uF
4, 7
5
IN
6
C4
1uF
C3
100nF
BS
SW
VCC
3, 8
MP2207
10
EN/SYNC
GND
2, 9
FB
L1
1uH
VOUT
1.8V / 4A
1
C2
47uF
MP2207 Rev. 0.92
www.MonolithicPower.com
9/1/2010
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to Change
© 2010 MPS. All Rights Reserved.
1
MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Top Marking
Temperature
MP2207DQ
Package
QFN10 (3mm x 3mm)
S9
Part Number**
Package
Top Marking
–40°C to +85°C
Temperature
MP2207DN
SOIC8E
MP2207DN
–40°C to +85°C
* For Tape & Reel, add suffix –Z (eg. MP2207DQ–Z). For RoHS Compliant Packaging, add suffix –LF (eg.
MP2207DQ–LF–Z)
** For Tape & Reel, add suffix –Z (eg. MP2207DN–Z). For RoHS Compliant Packaging, add suffix –LF (eg.
MP2207DN–LF–Z)
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
FB
1
10
EN/SYNC
GND
2
9
GND
SW
3
8
SW
IN
4
7
IN
BS
5
6
VCC
1
8
EN/SYNC
GND
2
7
SW
IN
3
6
SW
BS
4
5
VCC
EXPOSED PAD
ON BACKSIDE
CONNECT TO GND
EXPOSED PAD
ON BACKSIDE
QFN10
SOIC8E
ABSOLUTE MAXIMUM RATINGS (1)
IN to GND .................................... –0.3V to +18V
SW to GND .......................... –0.5V to VIN + 0.3V
.............................-2.5V to VIN + 2.5V for < 50ns
FB, EN/SYNC, VCC to GND.......... –0.3V to +6.5V
BS to SW .................................... –0.3V to +6.5V
Continuous Power Dissipation (TA = +25°C) (2)
QFN10 (3mm x 3mm) ................................ 2.5W
SOIC8E...................................................... 2.5W
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............ –65°C TO +150°C
Recommended Operating Conditions
FB
(3)
Supply Voltage VIN ..............................3V to 16V
Bias Voltage VCC ...................................3V to 6V
Output Voltage VOUT ..................0.8V to 0.9 x VIN
Operating Temperature.............. –40°C to +85°C
Thermal Resistance
(4)
θJA
θJC
QFN10 (3mm x 3mm) ............. 50 ...... 12... °C/W
SOIC8E .................................. 50 ...... 10... °C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
MP2207 Rev. 0.92
www.MonolithicPower.com
9/1/2010
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Preliminary Specifications Subject to Change
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MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (5)
VCC = 3.6V, VIN=12V, TA = +25°C, unless otherwise noted.
Parameters
VCC Supply Current
VCC Shutdown Current
VCC Under Voltage Lockout
Threshold
VCC Under Voltage Lockout
Hysteresis
IN Shutdown Current
IN Under Voltage Lockout
Threshold, Rising Edge
IN Under Voltage Lockout
Hysteresis
Regulated FB Voltage
Condition
VEN = VCC
VFB = 0.85V
VEN = 0V, VCC= 6V
Min
Typ
Rising Edge
μA
1
μA
2.95
mV
4
μA
2.95
300
FB Input Current
EN High Threshold
EN Low Threshold
Internal Soft-Start Time
High-Side Switch On-Resistance ISW = 300mA
Low-Side Switch On-Resistance ISW = –300mA
VEN = 0V; VIN = 12V
SW Leakage Current
VSW = 0V or 12V
BS Under Voltage Lockout
Threshold
High-Side Switch Current Limit
Sourcing
Low-Side Switch Current Limit
Sinking
Oscillator Frequency
Maximum Synch Frequency
Minimum Synch Frequency
Minimum On Time
Maximum Duty Cycle
Thermal Shutdown Threshold
Hysteresis = 20°C
0.780
0.772
-50
1.6
0.800
0.820
0.828
50
120
80
80
–10
V
mV
0.4
1
V
200
2.85
TA = +25°C
–40°C ≤ TA ≤ +85°C
VFB = 0.85V
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +85°C
Units
750
2.8
VEN = 0V
Max
10
V
V
nA
V
V
µs
mΩ
mΩ
μA
1.8
V
6.5
3.5
1.3
2
1
50
90
150
A
A
MHz
MHz
MHz
ns
%
°C
1.6
Note:
5) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization.
MP2207 Rev. 0.92
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9/1/2010
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to Change
© 2010 MPS. All Rights Reserved.
3
MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS
SOICE
Pin#
QFN
Pin #
5
6
3
4, 7
6, 7
3, 8
2
2, 9
4
5
1
1
8
10
Name
Description
Bias Supply. This supplies power to both the internal control circuit and the gate
drivers. A decoupling capacitor to ground is required close to this pin.
Input Supply. This supplies power to the high side switch. A decoupling
IN
capacitor to ground is required close to this pin to reduce switching spikes.
Switch Node Connection to the Inductor. These pins connect to the internal high
SW
and low-side power MOSFET switches. All SW pins must be connected together
externally.
Ground. Connect these pins with larger copper areas to the negative terminals
GND
of the input and output capacitors.
Bootstrap. A capacitor between this pin and SW provides a floating supply for
BS
the high-side gate driver.
Feedback. This is the input to the error amplifier. An external resistive divider
FB
connected between the output and GND is compared to the internal 0.8V
reference to set the regulation voltage.
Enable and Frequency Synchronization Input Pin. Forcing this pin below 0.4V
shuts down the part. Forcing this pin above 1.6V turns on the part. Applying a
EN/SYNC
1MHz to 2MHz clock signal to this pin synchronizes the internal oscillator
frequency to the external source.
VCC
MP2207 Rev. 0.92
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Preliminary Specifications Subject to Change
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MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 5V, VOUT = 1.8V, TA = +25ºC, unless otherwise noted.
MP2207 Rev. 0.92
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9/1/2010
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Preliminary Specifications Subject to Change
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MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 5V, VOUT = 1.8V, TA = +25ºC, unless otherwise noted. (continued)
Switching Waveform
At VCC=5V
VIN=12V, VOUT=1.8V, IOUT=4A
VOUT/AC
20mV/div
VOUT/AC
200mV/div
VOUT/AC
200mV/div
VSW
5V/div
IINDUCTOR
2A/div
IINDUCTOR
2A/div
IINDUCTOR
2A/div
400ns/div
Efficiency vs.
Load Current
Efficiency vs.
Load Current
100
Efficiency vs.
Load Current
100
100
VIN=12V
90
VIN=16V
85
80
75
VOUT=5V
VCC=3.3V
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
95
VIN=8V
VIN=12V
90
85
VIN=16V
80
75
VOUT=3.3V
VCC=5V
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
EFFICIENCY (%)
95
EFFICIENCY (%)
EFFICIENCY (%)
VIN=8V
95
VIN=8V
90
VIN=12V
85
VIN=16V
80
75
VOUT=3.3V
VCC=3.3V
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
MP2207 Rev. 0.92
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LOAD CURRENT (A)
6
MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
VCC
UVLO
UVLO
IN
EN
IN
BS
EN
EN/SYNC
LOGIC
EXCLK
LOGIC
CLK
OSC
+
--
EN/SYNC
PWM
CURRENT
COMPARATOR
SW
SLOPE
SW
0.5pF
1.2 MEG 17pF
FB
0.8V
-+
+
COMP
SLOPE
COMPENSATION
AND PEAK
CURRENT LIMIT
SOFT
-START
GND
GND
Figure 1—Functional Block Diagram
MP2207 Rev. 0.92
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MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
FUNCTIONAL DESCRIPTION
PWM Control
The MP2207 is a constant frequency peakcurrent-mode control PWM switching regulator.
Refer to the functional block diagram. The high
side N-Channel DMOS power switch turns on at
the beginning of each clock cycle. The current
in the inductor increases until the PWM current
comparator trips to turn off the high side DMOS
switch. The peak inductor current at which the
current comparator shuts off the high side
power switch is controlled by the COMP voltage
at the output of feedback error amplifier. The
transconductance from the COMP voltage to
the output current is set at 11.25A/V.
This current-mode control greatly simplifies the
feedback
compensation
design
by
approximating the switching converter as a
single-pole system. Only Type II compensation
network is needed, which is integrated into the
MP2207. The loop bandwidth is adjusted by
changing the upper resistor value of the resistor
divider at the FB pin. The internal compensation
in the MP2207 simplifies the compensation
design, minimizes external component counts,
and keeps the flexibility of external
compensation for optimal stability and transient
response.
Enable and Frequency Synchronization
(EN/SYNC PIN)
This is a dual function input pin. Forcing this pin
below 0.4V for longer than 4us shuts down the
part; forcing this pin above 1.6V for longer than
4µs turns on the part. Applying a 1MHz to
2MHz clock signal to this pin also synchronizes
the internal oscillator frequency to the external
clock. When the external clock is used, the part
turns on after detecting the first few clocks
regardless of duty cycles. If any ON or OFF
period of the clock is longer than 4µs, the signal
will be intercepted as an enable input and
disables the synchronization.
Soft-Start and Output Pre-Bias Startup
When the soft-start period starts, an internal
current source begins charging an internal softstart capacitor. During soft-start, the voltage on
the soft-start capacitor is connected to the noninverting input of the error amplifier. The softstart period lasts until the voltage on the softstart capacitor exceeds the reference voltage of
0.8V. At this point the reference voltage takes
over at the non-inverting error amplifier input.
The soft-start time is internally set at 120µs. If
the output of the MP2207 is pre-biased to a
certain voltage during startup, the IC will disable
the switching of both high-side and low-side
switches until the voltage on the internal softstart capacitor exceeds the sensed output
voltage at the FB pin.
Over Current Protection
The MP2207 offers cycle-to-cycle current
limiting for both high-side and low-side switches.
The high-side current limit is relatively constant
regardless of duty cycles. When the output is
shorted to ground, causing the output voltage to
drop below 70% of its nominal output, the IC is
shut down momentarily and begins discharging
the soft start capacitor. It will restart with a full
soft-start when the soft- start capacitor is fully
discharged. This hiccup process is repeated
until the fault is removed.
Bootstrap (BST PIN)
The gate driver for the high-side N-channel
DMOS power switch is supplied by a bootstrap
capacitor connected between the BS and SW
pins. When the low-side switch is on, the
capacitor is charged through an internal boost
diode. When the high-side switch is on and the
high-side switch turns off, the voltage on the
bootstrap capacitor is boosted above the input
voltage and the internal bootstrap diode
prevents the capacitor from discharging.
Input UVLO
Both VCC and IN pins have input UVLO
detection. Until both VCC and IN voltage
exceed under voltage lockout threshold, the
parts remain in shutdown condition. There are
also under voltage lockout hysesteres at both
VCC and IN pins.
Vcc Power Supply
Vcc is the power supply of both the internal
control circuit and the gate drivers.
Generally, the Vcc power supply could be
provided directly by a proper power rail or
generated from other Vcc generation circuits.
For instance, figure 4 shows a typical Vcc
generation circuit for VOUT=5V application.
It is noteworthy that the voltage applied on the
Vcc pin should never be higher than 6V.
MP2207 Rev. 0.92
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9/1/2010
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Preliminary Specifications Subject to Change
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MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
Selecting the Inductor
Setting the Output Voltage
The external resistor divider sets the output
voltage (see Figure 1). The feedback resistor R1
also sets the feedback loop bandwidth with the
internal compensation capacitor (see Figure 1).
The relation between R1 and feedback loop
bandwidth (fC), output capacitance (CO) is as
follows:
1.24 × 106
.
R1(KΩ) =
fC (KHz) × CO (uF)
The feedback loop bandwidth (fC) is no higher
than 1/10th of switching frequency of MP2207. In
the case of ceramic capacitor as CO, it’s usually
set to be in the range of 50KHz and 150KHz for
optimal transient performance and good phase
margin. If electrolytic capacitor is used, the loop
bandwidth is no higher than 1/4th of the ESR zero
frequency (fESR). fESR is given by:
1
fESR =
2π × RESR × CO
For example, choose fC=70KHz with ceramic
capacitor, CO=47uF, R1 is estimated to be
400KΩ. R2 is then given by:
R1
R2 =
VOUT
−1
0.8V
Table 1—Resistor Selection vs. Output
Voltage Setting
VOUT (V) R1 (kΩ) R2 (kΩ)
1.2
1.5
1.8
2.5
3.3
400
400
400
400
400
806
453
316
187
127
L (μH)
COUT
(ceramic)
0.47μH-1μH
0.47μH-1μH
0.47μH-1μH
0.47μH-1μH
0.47μH-1μH
47μF
47μF
47μF
47μF
47μF
A 0.47µH to 1µH inductor with DC current rating
at least 25% higher than the maximum load
current is recommended for most applications.
For best efficiency, the inductor DC resistance
shall be <10mΩ. See Table 2 for recommended
inductors and manufacturers. For most designs,
the inductance value can be derived from the
following equation:
L=
VOUT x(VIN − VOUT )
VIN xΔIL xfOSC
where ∆IL is Inductor Ripple Current. Choose
inductor ripple current approximately 30% of the
maximum load current, 4A.The maximum
inductor peak current is:
IL(MAX) = ILOAD +
ΔIL
2
Under light load conditions, larger inductance is
recommended for improved efficiency
Input Capacitor Selection
The input capacitor reduces the surge current
drawn from the input and switching noise from
the device. The input capacitor impedance at the
switching frequency shall be less than input
source impedance to prevent high frequency
switching current passing to the input. Ceramic
capacitors with X5R or X7R dielectrics are highly
recommended because of their low ESR and
small temperature coefficients. For most
applications, a 47µF capacitor is sufficient.
Table 2—Suggested Surface Mount Inductors
Manufacturer
Part Number
Inductance
(μH)
Max
DCR
(mΩ)
Current
Rating
(A)
Dimensions
L x W x H (mm3)
0.55
0.95
4.5
7.4
14
11
7×6.9×3
7×6.9×3
1
11
6.9
8.4×8.3×4
Wurth Electronics
744310055
744310095
TOKO
B1015AS-1R0N
MP2207 Rev. 0.92
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9/1/2010
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Preliminary Specifications Subject to Change
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MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
Output Capacitor Selection
The output capacitor keeps output voltage ripple
small and ensures regulation loop stable. The
output capacitor impedance shall be low at the
switching frequency. Ceramic capacitors with
X5R or X7R dielectrics are recommended. If
electrolytic capacitor is used, pay attention to
output ripple voltage, extra heating, and the
selection of feedback resistor R1 (refer to “Output
Voltage Setting” section) due to large ESR of
electrolytic capacitor. The output ripple ∆VOUT is
approximately:
ΔVOUT ≤
VOUT x(VIN − VOUT )
1
x(ESR +
)
VIN xfOSC xL
8xfOSC xC3
External Schottky Diode
For this part, an external schottky diode is
recommended to be placed close to "SW" and
"GND" pins, especially when the output current is
larger than 2A.
With the external schottky diode, the voltage
spike and negative kick on "SW" pin can be
minimized; moreover, the conversion efficiency
can also be improved a little.
For the external schottky diode selection, it's
noteworthy that the maximum reverse voltage
rating of the external diode should be larger than
the maximum input voltage. As for the current
rating of this diode, 0.5A rating should be
sufficient.
MP2207 Rev. 0.92
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MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
PCB LAYOUT
PCB layout is very important to achieve stable
operation. It is highly recommended to duplicate
EVB layout for optimum performance. If change
is necessary, please follow these guidelines as
follows. Here, the typical application circuit is
taken as an example to illustrate the key layout
rules should be followed.
1) For MP2207, a PCB layout with >=4 layers is
recommended.
2) The high current paths (GND, IN and SW)
should be placed very close to the device with
short, direct and wide traces.
Top Layer
3) Two input ceramic capacitors (10μF~22μF)
are strongly recommended to be placed on both
sides of the MP2207DQ package and keep them
as close as possible to the “IN” and “GND” pins.
4) A RC low pass filter is recommended for VCC
supply. The Vcc decoupling capacitor must be
placed as close as possible to “VCC” pin and
“GND” pin.
5) The external feedback resistors shall be
placed next to the FB pin. Keep the FB trace as
short as possible.
6) Keep the switching node SW short and away
from the feedback network.
Inner Layer 1
Inner Layer 2
Bottom Layer
Figure 2 —Recommended PCB Layout
MP2207 Rev. 0.92
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MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION CIRCUIT
Figure 3 —Typical Application Circuit of MP2207
D2
B0530
Vin
9V to 16V
C1
22uF
R4
10k
C2
22uF
4,7
6
Z1
4.7V
Q1
MMBT3904
C4
1uF
R3
100k
IN
C5
100nF
5
BS
SW
Vcc
3,8
MP2207
10 EN/SYNC
FB 1
GND
2,9
D1
B0530
L1
1uH
Vout
5V/4A
R1
400k
R2
76.8k
C3
47uF
Figure 4 —MP2207 with a Vcc Generation Circuit
MP2207 Rev. 0.92
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MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
PACKAGE INFORMATION
QFN10 (3mm x 3mm)
2.90
3.10
0.30
0.50
PIN 1 ID
MARKING
0.18
0.30
2.90
3.10
PIN 1 ID
INDEX AREA
1.45
1.75
PIN 1 ID
SEE DETAIL A
10
1
2.25
2.55
0.50
BSC
5
6
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
R0.20 TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
NOTE:
2.90
0.70
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5.
5) DRAWING IS NOT TO SCALE.
1.70
0.25
2.50
0.50
RECOMMENDED LAND PATTERN
MP2207 Rev. 0.92
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MP2207 – 16V, 4A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
SOIC8E (EXPOSED PAD)
0.189(4.80)
0.197(5.00)
0.124(3.15)
0.136(3.45)
8
5
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
0.089(2.26)
0.101(2.56)
4
TOP VIEW
BOTTOM VIEW
SEE DETAIL "A"
0.051(1.30)
0.067(1.70)
SEATING PLANE
0.000(0.00)
0.006(0.15)
0.013(0.33)
0.020(0.51)
0.0075(0.19)
0.0098(0.25)
SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0.050(1.27)
0.024(0.61)
0o-8o
0.016(0.41)
0.050(1.27)
0.063(1.60)
DETAIL "A"
0.103(2.62)
0.138(3.51)
RECOMMENDED LAND PATTERN
0.213(5.40)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP2207 Rev. 0.92
www.MonolithicPower.com
9/1/2010
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to Change
© 2010 MPS. All Rights Reserved.
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