NN30195A VIN = 4.5 V to 5.6 V, 6 A Synchronous DC-DC Step down Regulator comprising of Controller IC and Power MOSFET FEATURES DESCRIPTION z High-Speed Response DC-DC Step Down Regulator Circuit that employs Hysteretic Control System z Two 25 mΩ (Typ.) MOSFETs for High Efficiency at 6 A z SKIP (discontinuous) Mode for Light Load Efficiency z Up to 6 A Output Current z Input VoltageRange : AVIN : 4.5 V to 5.6 V PVIN : 2.9 V to 5.6 V Output Voltage Range : 0.6 V to 3.5 V Selectable Switching Frequency 500 kHz , 1 MHz , 2 MHz z Adjustable Soft Start z Low Operating and Standby Quiescent Current z Open Drain Power Good Indication for Output Over , Under Voltage z Built-in Under Voltage Lockout (UVLO), Thermal Shut Down (TSD), Over Voltage Detection (OVD), Under Voltage Detection (UVD), Over Current Protection (OCP), Short Circuit Protection (SCP) z HQFN024-A3-0404A ( Size : 4 mm X 4 mm, 0.5 mm pitch ), 24pin Plastic Quad Flat Non-leaded Package Heat Slug Down (QFN Type) NN30195A is a synchronous DC-DC Step down Regulator (1-ch) comprising of a Controller IC and two power MOSFETs and employs the hysteretic control system. By this system, when load current changes suddenly, it responds at high speed and minimizes the changes of output voltage. Since it is possible to use capacitors with small capacitance and it is unnecessary to add external parts for system phase compensation, this IC realizes downsizing of set and reducing in the number of external parts. Output voltage is adjustable by user. Maximum current is 6 A. APPLICATIONS High Current Distributed Power Systems such as ・HDDs (Hard Disk Drives) ・SSDs (Solid State Drives) ・PCs ・Game consoles ・Servers ・Security Cameras ・Network TVs ・Home Appliances ・OA Equipment etc. SIMPLIFIED APPLICATION EFFICIENCY CURVE VREG Frequency = 500 kHz 100 90 CTL2 80 100k Ω 22μF VOUT BST AVIN NN30195A AVIN 10μF 0.1μF 1μH 2k Ω DCDCOUT 1.8V LX VFB VREG SS 70 60 FCCM/ Vo= 1.0V FCCM/ Vo= 1.2V FCCM/ Vo= 1.8V FCCM/ Vo= 3.3V SKIP/ Vo= 1.0V SKIP/ Vo= 1.2V SKIP/ Vo= 1.8V SKIP/ Vo= 3.3V 50 40 30 22μF x 2 1k Ω Efficiency (%) PGOOD 20 AGND PGND 10 10nF of mass production set is not guaranteed. You should perform enough evaluation and verification on the design of mass production set. You are fully responsible for the incorporation of the above application circuit and information in the design of your equipment. Publication date: October 2012 1 0.100 Notes) This application circuit is an example. The operation 0.010 0 0.001 1μF 10.000 CTL1 PVIN 1.000 PVIN IOUT (A) Condition ) VIN = 5.0 V, Vout = 1.0 V , 1.2 V , 1.8 V , 3.3 V, Lo = 1 µH, Co = 44 µF (22 µF x 2), Frequency = 500 kHz Ver. CEB NN30195A ABSOLUTE MAXIMUM RATINGS Parameter Symbol Rating Unit Notes Supply voltage VIN 6.0 V *1 Operating free-air temperature Topr – 40 to + 85 °C *2 Operating junction temperature Tj – 40 to + 150 °C *2 Storage temperature Tstg – 55 to + 150 °C *2 Input Voltage Range MODE,CTL1,CTL2,VFB, VOUT -0.3 to ( VIN + 0.3 ) V *1, *3 LX,PGOOD -0.3 to ( VIN + 0.3 ) V *1, *3 HBM (Human Body Model) 2 kV — Output Voltage Range ESD Notes) Do not apply external currents and voltages to any pin not specifically mentioned. This product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating. This rating is the maximum rating and device operating at this range is not guaranteeable as it is higher than our stated recommended operating range. When subjected under the absolute maximum rating for a long time, the reliability of the product may be affected. *1:The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. VIN is voltage for AVIN, PVIN. *2:Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25 °C. *3:( VIN + 0.3 ) V must not exceed 6 V. POWER DISSIPATION RATING θJA PD ( Ta = 25 °C) PD ( Ta = 85 °C ) Notes 61.6 °C / W 2.03 W 1.06 W *1 PACKAGE 24 pin Plastic Quad Flat Non-leaded Package Heat Slug Down (QFN Type) Note). For the actual usage, please refer to the PD-Ta characteristics diagram in the package specification, follow the power supply voltage, load and ambient temperature conditions to ensure that there is enough margin and the thermal design does not exceed the allowable value. *1:Glass Epoxy Substrate ( 4 Layers ) [ Glass-Epoxy: 50 X 50 X 0.8 t ( mm ) ] Die Pad Exposed , Soldered. CAUTION Although this has limited built-in ESD protection circuit, but permanent damage may occur on it. Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS gates 2 Ver. CEB NN30195A RECOMMENDED OPERATING CONDITIONS Parameter Supply voltage range Input Voltage Range Output Voltage Range Pin Name Min. Typ. Max. Unit Notes AVIN 4.5 5.0 5.6 V — PVIN 2.9 5.0 5.6 V — MODE – 0.3 — VIN + 0.3 V *1 CTL1 – 0.3 — VIN + 0.3 V *1 CTL2 – 0.3 — VIN + 0.3 V *1 LX – 0.3 — VIN + 0.3 V *1 PGOOD – 0.3 — VIN + 0.3 V *1 Note) Do not apply external currents and voltages to any pin not specifically mentioned. Voltage values, unless otherwise specified, are with respect to GND. GND is voltage for AGND, PGND. AGND = PGND VIN is voltage for AVIN, PVIN. AVIN = PVIN. The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *1 : ( VIN + 0.3 ) V must not be exceeded 6 V. 3 Ver. CEB NN30195A ELECRTRICAL CHARACTERISTICS Co = 22 µF X 2, Lo= 1 µH, VOUT Setting = 1.0 V, VIN = AVIN = PVIN = 5 V, Switching Frequency = 1 MHz, MODE = Low (Skip), Ta = 25 °C ± 2 °C unless otherwise noted. Parameter Symbol Condition Min Limits Typ Max Unit Note Current Consumption Consumption current at active IVDDACT CTL1 = 5 V, IOUT = 0 A RFB1 = 1.0 kΩ RFB2 = 1.5 kΩ — 300 700 µA — Consumption current at standby IVDDSTB CTL1 = CTL2 = 0 V — — 2 µA — Logic Pin CTL1 pin Low-level input voltage VCTL1L — — — 0.3 V — CTL1 pin High-level input voltage VCTL1H — 1.5 — — V — — 3.5 10.0 µA — CTL1 pin leak current ILEAKCTL1 CTL1 = 5 V CTL2 pin Low-level input voltage VCTL2L — — — 0.3 V — CTL2 pin High-level input voltage VCTL2H — 1.5 — — V — — 3.5 10.0 µA — CTL2 pin leak current ILEAKCTL2 CTL2 = 5 V MODE pin Low-level input voltage VMODEL — — — VREG × 0.3 V — MODE pin High-level input voltage VMODEH — VREG × 0.7 — — V — MODE pin leak current ILEAKMD MODE = 5 V — 3.5 10.0 µA — VREG output voltage VREGOUT IVREG = – 6 mA 2.35 2.55 2.75 V — VREG drop out voltage VREGDO IVREG = 0 A to – 6 mA — — 50 mV — VREG 4 Ver. CEB NN30195A ELECRTRICAL CHARACTERISTICS ( Continued ) Co = 22 µF X 2, Lo= 1 µH, VOUT Setting = 1.0 V, VIN = AVIN = PVIN = 5 V, Switching Frequency = 1 MHz, MODE = Low (Skip), Ta = 25 °C ± 2 °C unless otherwise noted. Parameter Symbol Condition VFBTS — Min Limits Typ Max 0.594 0.600 0.606 V — Unit Note VFB VFB comparator threshold VFB pin leak current 1 ILEAKFB1 VFB = 0 V –1 — 1 µA — VFB pin leak current 2 ILEAKFB2 VFB = 3.6 V –1 — 1 µA — Under Voltage Lock Out PVIN UVLO start voltage 1 VUVLODET1 PVIN = 5 V to 0 V 2.35 2.60 2.85 V — PVIN UVLO recover voltage 1 VUVLORMV1 PVIN = 0 V to 5 V 2.55 2.80 3.05 V — AVIN UVLO start voltage 2 VUVLODET2 AVIN = 5 V to 0 V 3.15 3.40 3.65 V — AVIN UVLO recover voltage 2 VUVLORMV2 AVIN = 0 V to 5 V 3.25 3.50 3.75 V — PGOOD PGOOD Threshold 1 (VFB ratio for UVD detect) PGOOD Hysteresis 1 (VFB ratio for UVD release) PGOOD Threshold 2 (VFB ratio for OVD detect) PGOOD Hysteresis 2 (VFB ratio for OVD release) PGOOD ON resistance VTHPG1 PGOOD : High to Low 78 85 92 % — VHYSPG1 PGOOD : Low to High 2 5 8 % — VTHPG2 PGOOD : High to Low 108 115 122 % — VHYSPG2 PGOOD : Low to High 2 5 8 % — CTL1 = CTL2 = 0 V — 15 20 Ω — RPG 5 Ver. CEB NN30195A ELECRTRICAL CHARACTERISTICS ( Continued ) Co = 22 µF X 2, Lo= 1 µH, VOUT Setting = 1.0 V, VIN = AVIN = PVIN = 5 V, Switching Frequency = 1 MHz, MODE = Low (Skip), Ta = 25 °C ± 2 °C unless otherwise noted. Parameter Symbol DC-DC line regulation DDREGIN DC-DC load regulation DDREGLD Min Limits Typ Max PVIN = 4.5 V to 5.6 V IOUT = – 3 A — 0.5 1.5 %/V — IOUT = – 10 mA to – 6 A — 3 — % *1 Condition Unit Note DC-DC DC-DC efficiency 1 DDEFF1 IOUT = – 10 mA — 70 — % *1 DC-DC efficiency 2 DDEFF2 IOUT = – 3 A — 81 — % *1 DC-DC output ripple voltage 1 DDVRPL1 IOUT = – 20 mA — 25 — mV [p-p] *1 DC-DC output ripple voltage 2 DDVRPL2 IOUT = – 3 A — 10 — mV [p-p] *1 DC-DC load transient response DDDVAC IOUT = – 100 mA ↔ – 3 A Δt = 0.5 A / µs — 20 — mV *1 DC-DC High Side MOS ON resistance DDRONH VGS = 5 V — 25 50 mΩ — DC-DC Low Side MOS ON resistance DDRONL VGS = 5 V — 25 50 mΩ — DV = PVIN – VOUT — 1.4 — V *1 MIN Input and output voltage difference DV *1 ：Typical Value checked by design. 6 Ver. CEB NN30195A ELECRTRICAL CHARACTERISTICS ( Continued ) Co = 22 µF X 2, Lo= 1 µH, VOUT Setting = 1.0 V, VIN = AVIN = PVIN = 5 V, Switching Frequency = 1 MHz, MODE = Low (Skip), Ta = 25 °C ± 2 °C unless otherwise noted. Parameter Min Limits Typ Max — 9.0 — A *1 FB = 0.6 V to 0.0 V 55 70 85 % — Symbol Condition DC-DC output current limit DDILMT — DC-DC Output GND Short Protection Threshold DDSHPTH Unit Note PROTECTION Soft-Start Timing SS Charge Current ISSCHG VSS = 0.3 V –4 –2 — µA — SS Discharge Resistance (Shut-down) RSSDIS CTL1 = CTL2 = 0 V — 2 4 kΩ — DC-DC Switching Frequency 1 DDFSW1 IOUT = – 6 A CTL1 = 0 V CTL2 = 5 V — 500 — kHz *1 DC-DC Switching Frequency 2 DDFSW2 IOUT = – 6 A CTL1 = 5 V CTL2 = 0 V — 1000 — kHz *1 DC-DC Switching Frequency 3 DDFSW3 IOUT = – 6 A CTL1 = 5 V CTL2 = 5 V — 2000 — kHz *1 Switching Frequency Adjustment *1 ：Typical Value checked by design. 7 Ver. CEB NN30195A CTL2 VREG VFB VOUT Top View SS AVIN PIN CONFIGURATION 18 17 16 15 14 13 PGOOD 19 12 CTL1 25 AGND AGND 20 11 AGND BST 21 10 MODE 22 PVIN 27 LX 26 PVIN 23 24 8 PGND 7 1 2 3 4 5 6 LX PIN FUNCTIONS Pin No. 9 Pin name Type Description LX Output Power MOSFET output pin PGND Ground Ground pin for Power MOSFET 10 MODE Input 11 AGND Ground 12 CTL1 Input ON/OFF control pin 1 / Frequency selection pin 13 CTL2 Input ON/OFF control pin 2 / Frequency selection pin 14 VREG Output 15 VFB Input Comparator negative input pin 16 VOUT Input Output voltage sense pin 17 SS Output 18 AVIN 19 PGOOD Output Power good open drain pin 20 AGND Ground Ground pin 21 BST Output Supply input pin for high side FET gate driver 1 2 3 4 5 6 7 8 9 Skip / FCCM mode select pin Ground pin LDO output pin (Power supply for internal control circuit) Soft start capacitor connect pin Power supply Power supply pin 22 23 PVIN Power supply Power supply pin for Power MOSFET 24 25 AGND 26 PVIN 27 LX Ground Ground pin for radiation of heat Power supply Power supply pin for radiation of heat Output Power MOSFET output pin for radiation of heat Notes) Concerning detail about pin description, please refer to OPERATION and APPLICATION INFORMATION section. 8 Ver. CEB NN30195A FUNCTIONAL BLOCK DIAGRAM SS 17 CTL1 CTL2 12 CTL1C OSC PVIN AVIN SS 18 22,23,24,26 Soft-Start ON/OFF 13 FSEL 19 PGOOD BGR VREG 14 VREF VREG VREG:2.55V + - 0.6V +10% VOUT 16 UVLO OCP SCP TSD AVIN + - 0.6V +10% 21 Fault VFB 15 VREF Aux Timer REF 0.6V Soft-Start Current Sense + + BS SW HPD ON CMP HGD Control Logic Ton Timer + Comp FSEL BST Toff Timer + Comp LX 1,2,3,4,5,6,27 LPD VIN Coast 10 MODE LGO FCCM/Skip PGND 7,8,9 11,20,25 AGND Notes) This block diagram is for explaining functions. Part of the block diagram may be omitted, or it may be simplified. 9 Ver. CEB NN30195A OPERATION Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. 1. Protection (1).Output Over-Current Protection (OCP) function And Short-Circuit Protection (SCP) function 1) The Over Current Protection is activated at about 9 A (Typ.) During the OCP, the output voltage continues to drop at the specified current. 2) The Short-Circuit Protection function is implemented when the output voltage decreases and the VFB pin reaches to about 70 % of the set voltage of 0.6 V. 3) The SCP operates intermittently at 2 ms-ON, 16 ms OFF intervals. VFB 115 % 110 % 0.6 V 0.6 V 90 % 85 % 1 ms 1) 2) 1 ms 3) 4) PGOOD Note: PGOOD Pin is pulled up to VREG pin Figure : OVD and UVD Operation (3).Thermal Shut Down (TSD) When the IC internal temperature becomes more than about 140 °C, TSD operates and DCDC turns off. 1) Ground short protection hysteresis Output Voltage [V] Over Current Protection ( typ : 9 A ) 6.1 A to 13 A 2) 3) Intermittent operation area (Ground short protection detection about 70% of Vout ) 2. Pin Setting (1).Operating Mode Setting The IC can operate at two different modes : Skip mode and Forced Continuous Conduction mode (FCCM). In Skip mode, the IC is working under pulse skipping mechanism to improve efficiency at light load condition. In FCCM mode, the IC is working at fixed frequency to avoid EMI issues. The Operating Mode can be set by MODE pin as follows. Pendency characteristics about 1.5 A Output current [A] Figure : OCP and SCP Operation (2).Over Voltage Detection (OVD) and Under Voltage Detection (UVD) 1).The NMOS connected to the PGOOD pin turns ON when the output voltage rises and the VFB pin voltage reaches 115 % of its set voltage (0.6 V). 2).After (1) above, the NMOS connected to the PGOOD pin is turned OFF after 1 ms when the output voltage drops and the VFB pin voltage reaches 110 % of its set voltage (0.6 V). 3).The NMOS connected to the PGOOD pin turns ON when the output voltage drops and the VFB pin voltage reaches 85 % of its set voltage (0.6 V). 4).After (3) above, the NMOS connected to the PGOOD pin is turned OFF after 1 ms when the output voltage drops and the VFB pin voltage reaches 90 % of its set voltage (0.6 V). 10 MODE pin Mode Low Skip High FCCM (2).Switching Frequency Setting The IC can operate at three different frequency : 1000 kHz, 500 kHz and 2000 kHz. The Switching Frequency can be set by CTL1 & CTL2 pin as follows. CTL1 pin Low Low High High CTL2 pin Low High Frequency [kHz] 0 ( DCDC OFF) 500 Low High 1000 2000 Ver. CEB NN30195A OPERATION ( Continued ) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. 3. Output Voltage Setting The Output Voltage can be set by external resistance of FB pin, and its calculation is as follows. (VIN = 5 V, IOUT = 0 A, FCCM, Fsw = 1 MHz) VOUT = ( 1 + RFB2 ) × 0.6 0.6 × Css 2μ When Css is set at 10 nF, soft-start time is approximately 3 ms. VOUT RFB1 Soft Start Time(sec) = RFB1 VFB ( 0.6 V ) CTL1 or CTL2 RFB2 2.2 V 2.55 V VREG Below resistors are recommended for following popular output voltage. UVLO VOUT [V] 3.3 1.8 1.0 RFB1 [Ω] 4.5 k 2.0 k 1.0 k RFB2 [Ω] 1.0 k 1.0 k 1.5 k Soft Start Time (s) SS 0.6 V VFB Note: RFB2 can be set to a maximum value of 10 kΩ. A larger FBR2 value will be more susceptible to noise. VFB comparator threshold is adjusted to ± 1 %, but the actual output voltage accuracy becomes more than ± 1 % due to the influence from the circuits other than VFB comparator. In the case of VOUT setting = 1.0 V, the actual output voltage accuracy becomes ± 2 %. (VIN = 5.0 V, IOUT = 0 A, FCCM, Fsw = 1 MHz). 4. Soft Start Setting Soft Start function maintains the smooth control of the output voltage during start up by adjusting soft start time. When the CTL1 or CTL2 (or both) pin becomes High, the current (2 µA) begin to charge toward the external capacitor (Css) of SS pin, and the voltage of SS pin increases straightly. Because the voltage of FB pin is controlled by the voltage of SS pin during start up, the voltage of FB increase straightly to the regulation voltage (0.6 V) together with the voltage of SS pin and keep the regulation voltage after that. On the other hand, the voltage of SS pin increase to about 2.8 V and keep the voltage. The calculation of Soft Start Time is as follows. 11 VOUT Figure : Soft Start Operation 5. Power ON / OFF sequence (1) When the CTL1/2 pin is set to “High” after the VIN settles, UVLO is released if VIN exceeds its threshold, then the VREG starts up. (2) When VREG voltage exceeds its threshold, the SOFT START sequence is enabled. The capacitor connected to the SS pin begins to charge and the SS pin voltage increases linearly. (3) The VOUT pin (DCDC Output) voltage increases at the same rate as the SS pin. Normal operation begins after the VOUT pin reaches the set voltage. (4) When the CTL1/2 pin is set to “Low”, VREG and UVLO stop operation. The VOUT pin / SS pin voltage starts to drop and the VOUT pin discharge by internal MOSFET (R = 50 Ω). Note: The SS pin capacitor should be discharged completely before restarting the startup sequence. An incomplete discharge process might result in an overshoot of the output voltage. Ver. CEB NN30195A OPERATION ( Continued ) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Vo(Eo) VIN Q1 Ei CTL1 / 2 VREG IL Lo Ic Io Co Q2 2.55 V 2.2 V Rc UVLO SS Given the desired input and output voltages, the inductor value and operating frequency determine the ripple Current. 0.6 × Css Soft Start Time (s) = 2µ 0.6 V ΔIL = Eo ⋅ (Ei − Eo ) Ei ⋅ Lo ⋅ f VFB Iox = VOUT 0.2 × Css + 1.25 m Delay Time (s) = 2µ PGOOD (1) (2) (3) (4) Figure : Power ON/OFF sequence Highest efficiency operation is obtained at low frequency with small ripple current. However, achieving this requires a large inductor. There is a trade-off among component size, efficiency and operating frequency. A reasonable starting point is to choose a ripple current that is about 40 % of IOUT(MAX). The largest ripple current occurs at the highest VIN. To guarantee that ripple current does not exceed a specified maximum, the inductance should be chosen according to: Lo ≥ 6. Inductor and Output Capacitor Setting ΔIL 2 Eo ⋅ (Ei − Eo ) @ Ei = Ei_max 2 Ei ⋅ Iox ⋅ f And its maximum current rating is IL Io IL_max = Io_max + The selection of COUT is primarily determined by the ESR (Rc) required to minimize voltage ripple and load transients. The output ripple Vrpl is approximately bounded by: 0 ⊿IL/2 0 Ic Vrpl = Vop − Vob = Ei ⋅ ⊿IL/2 Vo Eo ΔIL (@ Ei = Ei_max) 2 Vrpl = Ei ⋅ ΔIL Co ⋅ Rc 2 + 2 Lo 8Co ⋅ f Co ⋅ Rc 2 Eo ⋅ (Ei − Eo ) + 2 Lo 8Ei ⋅ Lo ⋅ Co ⋅ f 2 From the above equation, to achieve desired output ripple, low ESR ceramic capacitors are recommended, and its required RMS current rating is: Ton T=1/f Ic(rms)_max = 12 ΔIL (@ Ei = Ei_max) 2 3 Ver. CEB NN30195A OPERATION ( Continued ) 7.Start / Stop sequence Start / Stop control of NN30195A is performed by CTL1 pin. The start / stop sequence is as follows. (Css=10 nF) VIN (Pin) CTL1/2 (Pin) 1.23V VREF (Int) 0.75V UVLO (Int) OSC stop CLK (Int) 2.55V VREG (Pin) 2.2V 75us 2.4ms Soft-Start VFB (Pin) POG (Pin) 0.6V 90% 2.25ms Power Good Flap Start / Stop sequence in case that CTL1/2 pin is connected to power supply (VIN) is as follows. (Css=10 nF) VIN (Pin) CTL1/2 (Pin) 3.5V 3.4V VIN 0.75V VREF (Int) 1.23V UVLO (Int) OSC stop CLK (Int) VREG (Pin) VFB (Pin) 2.55V 2.2V 75us 2.4ms Soft-Start 90% 0.6V Power Good Flap POG (Pin) 2.25ms Note) All values given in the above figure are typical values. 13 Ver. CEB NN30195A TYPICAL CHARACTERISTICS CURVES (1) Output Ripple Voltage Condition : VIN=5V,Vout = 1.0V,Frequency = 1000kHz,Skip Mode I Load = 0A I Load = 1A Vout Vout LX LX I Load = 3A I Load = 6A Vout Vout LX LX 14 Ver. CEB NN30195A TYPICAL CHARACTERISTICS CURVES ( Continued ) (1) Output Ripple Voltage ( Continued ) Condition : VIN=5V,Vout = 1.0V,Frequency = 1000kHz,FCCM Mode I Load = 0A I Load = 1A Vout Vout LX LX I Load = 3A I Load = 6A Vout Vout LX LX 15 Ver. CEB NN30195A TYPICAL CHARACTERISTICS CURVES ( Continued ) (2) Load transient Condition : VIN = 5.0 V, Vout = 1.0 V, Frequency = 1 MHz, Iout = 10 mA ÅÆ 6 A ( 0.5 A / μs ) Skip Mode VOUT (50 mV/div) FCCM Mode 35.1mV 30.4mV VOUT (50 mV/div) 27.1mV 44.1mV IOUT (5 A/div) IOUT (5 A/div) Time (100 us/div) Time (100 us/div) Condition : VIN = 5.0 V, Vout = 1.0 V, Frequency = 1 MHz, Iout = 2.5 A ÅÆ 5 A ( 0.15 A / μs ) Skip Mode VOUT (50 mV/div) FCCM Mode VOUT (50 mV/div) 13.7mV 14.1mV 11.5mV 13.9mV IOUT (2 A/div) IOUT (2 A/div) Time (100 us/div) Time (100 us/div) (3) Efficiency Condition : Vin = 5 V, Vout = 1.05 V / 1.2 V / 1.8V / 3.3V / 5.0 V, L = 4.7 μH, Cout = 66 μF (22 μF x 3), Frequency = 250 kHz Condition : Vin = 5 V, Vout = 1.05 V / 1.2 V / 1.8V / 3.3V / 5.0 V, L = 1 μH, Cout = 66 μF (22 μF x 3), Frequency = 750kHz Frequency = 1000 kHz 90 90 80 80 70 70 60 Efficiency (%) 100 100 FCCM/ Vo= 1.0V FCCM/ Vo= 1.2V FCCM/ Vo= 1.8V FCCM/ Vo= 3.3V SKIP/ Vo= 1.0V SKIP/ Vo= 1.2V SKIP/ Vo= 1.8V SKIP/ Vo= 3.3V 50 40 30 20 10 60 FCCM/ Vo= 1.0V FCCM/ Vo= 1.2V FCCM/ Vo= 1.8V FCCM/ Vo= 3.3V SKIP/ Vo= 1.0V SKIP/ Vo= 1.2V SKIP/ Vo= 1.8V SKIP/ Vo= 3.3V 50 40 30 20 10 10.000 1.000 0.100 0.010 10.000 1.000 0.100 0.010 0.001 0 0 0.001 Efficiency (%) Frequency = 500 kHz IOUT (A) IOUT (A) 16 Ver. CEB NN30195A TYPICAL CHARACTERISTICS CURVES ( Continued ) (4) Load regulation Condition : VIN = 5.0 V, Vout = 1.0 V, Frequency = 500 kHz Load Regulation_f = 500kHz (FCCM mode) 1.080 1.080 1.060 1.060 1.040 1.040 1.020 1.020 1.000 IOUT (A) 6.00 5.00 0.00 6.00 5.00 4.00 0.900 3.00 0.920 0.900 2.00 0.940 0.920 1.00 0.960 0.940 4.00 0.980 0.960 3.00 0.980 2.00 1.000 1.00 VOUT (V) 1.100 0.00 VOUT (V) Load Regulation_f = 500kHz (skip m ode) 1.100 IOUT (A) Condition : VIN = 5.0 V, Vout = 1.0 V, Frequency = 1 MHz L o ad Reg u la tio n _f = 10 00kHz (FC C M m o d e) Load Regulation_f = 1000kHz (skip mode) 1.100 1.100 1.080 1.080 1.060 1.040 1.020 1.020 1.000 IOUT (A) 6.00 5.00 0.00 6.00 5.00 4.00 0.900 3.00 0.920 0.900 2.00 0.940 0.920 1.00 0.960 0.940 4.00 0.980 0.960 3.00 0.980 2.00 1.000 1.00 VOUT (V) 1.040 0.00 VOUT (V) 1.060 IOUT (A) (5) Line regulation Condition : VIN = 5 V, Vout = 1.0 V, Frequency = 1 MHz, Iout = 1.5 A Line Regulation_f = 1000kHz (FC CM m ode) 1.0 1.0 0.8 0.8 5.0 0.0 V IN (V ) 4.0 0.0 5.0 0.0 4.0 0.2 3.0 0.2 2.0 0.4 1.0 0.4 3.0 0.6 2.0 0.6 1.0 VOUT (V) 1.2 0.0 VOUT (V) Line Regulation_f = 1000kHz (skip m ode) 1.2 V IN (V ) 17 Ver. CEB NN30195A TYPICAL CHARACTERISTICS CURVES ( Continued ) (6) start/shut down Condition : VIN = 5.0 V, Vout = 1.0 V, Frequency = 1 MHz, SKIP mode, Iout = 0 A EN (2 V/div) EN (2 V/div) SS (2 V/div) SS (2 V/div) VOUT (0.5 V/div) VOUT (0.5 V/div) Time (10 ms/div) Time (10 ms/div) Condition : VIN = 5.0 V, Vout = 1.0 V, Frequency = 1 MHz, FCCM mode, Iout = 0 A EN (2 V/div) EN (2 V/div) SS (2 V/div) SS (2 V/div) VOUT (0.5 V/div) VOUT (0.5 V/div) Time (10 ms/div) Time (10 ms/div) Condition : VIN = 5.0 V, Vout = 1.0 V, Frequency = 1 MHz, SKIP mode, Rload = 0.5 Ω EN (2 V/div) EN (2 V/div) SS (2 V/div) SS (2 V/div) VOUT (0.5 V/div) VOUT (0.5 V/div) Time (10 ms/div) Time (10 ms/div) Condition : VIN = 5.0 V, Vout = 1.0 V, Frequency = 1 MHz, FCCM mode, Rload = 0.5 Ω EN (2 V/div) EN (2 V/div) SS (2 V/div) SS (2 V/div) VOUT (0.5 V/div) VOUT (0.5 V/div) Time (10 ms/div) Time (10 ms/div) 18 Ver. CEB NN30195A TYPICAL CHARACTERISTICS CURVES ( Continued ) (7) Short Current Protection Condition : VIN = 5.0 V, Vout = 1.0 V, Frequency = 1 MHz Skip Mode FCCM Mode LX (5 V/div) LX (5 V/div) SS (2 V/div) SS (2 V/div) VOUT (1 V/div) VOUT (1 V/div) IOUT (10 A/div) IOUT (10 A/div) Time (10 ms/div) Time (10 ms/div) (8) Switching Frequency Condition : Vin = 5.0 V, Vout = 1.0 V, Frequency = 1 MHz, Iout = 10 mA ~ 10 A LX Average Frequency (MHz) Skip Mode LX Average Frequency (MHz) FCCM Mode 1.2 LX Average Frequency (MHz) LX Average Frequency (MHz) 1.2 1.0 0.8 0.6 0.4 0.2 0.0 1 0.8 0.6 0.4 0.2 0 0.01 0.1 1 10 0.01 ILOAD (A) 0.1 1 10 ILOAD (A) Condition : Vout = 1.0 V, Frequency = 1 MHz, Iout = 3 A LX Average Frequency (MHz) FCCM Mode 1.00 1.00 0.98 0.98 LX Average Frequency (MHz) LX Average Frequency (M Hz) LX Average Frequency (MHz) Skip Mode 0.96 0.94 0.92 0.90 0.88 0.86 0.84 0.96 0.94 0.92 0.90 0.88 0.86 0.84 0.82 0.82 0.80 0.80 4.4 4.6 4.8 5.0 VIN(V) 5.2 5.4 5.6 4.4 4.6 4.8 5.0 5.2 5.4 5.6 VIN(V) 19 Ver. CEB NN30195A TYPICAL CHARACTERISTICS CURVES ( Continued ) (9) Thermal Performance Condition : VIN=5V , Vout = 1.0V , Frequency = 1000kHz , ILoad = 5A , FCCM Mode 20 Ver. CEB NN30195A APPLICATIONS INFORMATION Condition : Vout = 1.0 V, Frequency = 1 MHz, SKIP mode R-PG PGOOD C-AVIN1 C-AVIN2 LX R-FB2 12 C-AVIN1 C-AVIN2 VOUT C-DCDCOUT1 C-DCDCOUT2 C-DCDCOUT3 VOUT VFB R-FB1 CTL2 L-LX C-VREG VREG C-SS C-BST VFB R-FB2 L-LX AVIN VOUT CTL1 11 AGND MODE PGND 10 C-PVIN2 C-PVIN3 R-FB1 16 15 6 13 5 14 4 9 C-SS 24 3 8 SS VOUT C-VREG 23 18 22 17 21 2 7 AVIN C-DCDCOUT1 C-DCDCOUT2 BST PVIN AGND 20 1 LX PVIN AVIN 19 C-BST C-PVIN2 C-PVIN3 PVIN DCDCOUT PGND Figure : layout Figure : Application circuit Figure : Top Layer with silk screen ( Top View ) with Evaluation board Figure : Bottom Layer with silk screen ( Bottom View ) with Evaluation board Notes) This application circuit and layout is an example. The operation of mass production set is not guaranteed. You should perform enough evaluation and verification on the design of mass production set. You are fully responsible for the incorporation of the above application circuit and information in the design of your equipment. 21 Ver. CEB NN30195A APPLICATIONS INFORMATION ( Continued ) Reference Designator QTY Value Manufacturer Part Number C-AVIN1 1 10 µF Murata GRM21BR71A106KE51L C-AVIN2 1 0.1 µF Murata GRM188R72A104KA35L C-BST 1 0.1 µF Murata GRM188R72A104KA35L C-DCDCOUT 2 22 µF Murata GRM31CR71E226KE15L C-PVIN2 1 22 µF Murata GRM31CR71A226KE15L C-PVIN3 1 0.1 µF Murata GRM188R72A104KA35L C-SS 1 10 nF Murata GRM188R72A103KA01L C-VREG 1 1.0 µF Murata GRM188R71E105KA12L L-LX 1 1.0 µH Panasonic ETQP3W1R0WFN R-AVIN 1 0 Panasonic ERJ3GEY0R00V R-FB1 1 1.0 kΩ Panasonic ERJ3EKF1001V R-FB2 1 1.5 kΩ Panasonic ERJ3EKF1501V R-FB3 1 0 Panasonic ERJ3GEY0R00V R-FB6 1 0 Panasonic ERJ3GEY0R00V R-FB6 1 0 Panasonic ERJ3GEY0R00V R-PG 1 100 kΩ Panasonic ERJ3EKF1003V Figure : Recommended component 22 Ver. CEB NN30195A PACKAGE INFORMATION ( Reference Data ) Outline Drawing Unit : mm 23 Ver. CEB NN30195A PACKAGE INFORMATION ( Reference Data ) Power dissipation (Supplementary explanation) 24 Ver. CEB NN30195A IMPORTANT NOTICE 1.The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. 2.When using the LSI for new models, verify the safety including the long-term reliability for each product. 3.When the application system is designed by using this LSI, be sure to confirm notes in this book. Be sure to read the notes to descriptions and the usage notes in the book. 4.The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information de-scribed in this book. 5.This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 6.This LSI is intended to be used for general electronic equipment. Consult our sales staff in advance for information on the following applications: Special applications in which exceptional quality and reliability are required, or if the failure or malfunction of this LSI may directly jeopardize life or harm the human body. Any applications other than the standard applications intended. (1) Space appliance (such as artificial satellite, and rocket) (2) Traffic control equipment (such as for automobile, airplane, train, and ship) (3) Medical equipment for life support (4) Submarine transponder (5) Control equipment for power plant (6) Disaster prevention and security device (7) Weapon (8) Others : Applications of which reliability equivalent to (1) to (7) is required It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the LSI described in this book for any special application, unless our company agrees to your using the LSI in this book for any special application. 7.This LSI is neither designed nor intended for use in automotive applications or environments unless the specific product is designated by our company as compliant with the ISO/TS 16949 requirements. Our company shall not be held responsible for any damage incurred by you or any third party as a result of or in connection with your using the LSI in automotive application, unless our company agrees to your using the LSI in this book for such application. 8.If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. 9. Please use this product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Our company shall not be held responsible for any damage incurred as a result of your using the LSI not complying with the applicable laws and regulations. 25 Ver. CEB NN30195A USAGE NOTES 1. When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. 2. Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. 3. Pay attention to the direction of LSI. When mounting it in the wrong direction onto the PCB (printed-circuit-board), it might smoke or ignite. 4. Pay attention in the PCB (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins. In addition, refer to the Pin Description for the pin configuration. 5. Perform a visual inspection on the PCB before applying power, otherwise damage might happen due to problems such as a solder-bridge between the pins of the semiconductor device. Also, perform a full technical verification on the assembly quality, because the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the LSI during transportation. 6. Take notice in the use of this product that it might break or occasionally smoke when an abnormal state occurs such as output pin-VCC short (Power supply fault), output pin-GND short (Ground fault), or output-to-output-pin short (load short) . And, safety measures such as an installation of fuses are recommended because the extent of the abovementioned damage and smoke emission will depend on the current capability of the power supply. 7. The protection circuit is for maintaining safety against abnormal operation. Therefore, the protection circuit should not work during normal operation. Especially for the thermal protection circuit, if the area of safe operation or the absolute maximum rating is momentarily exceeded due to output pin to VCC short (Power supply fault), or output pin to GND short (Ground fault), the LSI might be damaged before the thermal protection circuit could operate. 8. Unless specified in the product specifications, make sure that negative voltage or excessive voltage are not applied to the pins because the device might be damaged, which could happen due to negative voltage or excessive voltage generated during the ON and OFF timing when the inductive load of a motor coil or actuator coils of optical pick-up is being driven. 9. The product which has specified ASO (Area of Safe Operation) should be operated in ASO 10. Verify the risks which might be caused by the malfunctions of external components. 11. Connect the metallic plates on the back side of the LSI with their respective potentials (AGND, PVIN, LX). The thermal resistance and the electrical characteristics are guaranteed only when the metallic plates are connected with their respective potentials. 26 Ver. CEB Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) The products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. Consult our sales staff in advance for information on the following applications: – Special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application. (4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20100202