TRIQUINT TQM829007

TQM829007
0.6-1.0GHz ¼W Digital Variable Gain Amplifier
Applications
3G / 4G Wireless Infrastructure
CDMA, WCDMA, LTE
Repeaters
ISM Infrastructure
28-pin 6x6mm leadless SMT package
22
23
24
25
21 GND
S
P
I
DATA 2
20 GND
DSA
CLK 3
Matching
19 GND
18 GND
NC 4
GND 5
17 GND
RFIN 6
16 RFOUT
AMP1
15 GND
Vcc_AMP2 14
GND 13
DC Biasing
GND 12
GND 11
Vcc_AMP1/ 8
GND 10
DC Biasing
GND 7
Backside
Paddle - GND
Pin Configuration
The TQM829007 is a digital variable gain amplifier
(DVGA) featuring high linearity performance in a fully
integrated module. The amplifier module features the
integration of a low noise amplifier gain block, a digitalstep attenuator (DSA), along with a high linearity ¼W
amplifier. The module has the added features of integrating
all matching components with bias chokes and blocking
capacitors. The internal DSA offers 0.5 dB step, 6-bit, and
31.5 dB range and is controlled with a serial periphery
interface (SPITM).
Pin #
1
2
3
4, 22
6
8
14
16
28
All Other Pins
The TQM829007 features variable gain from 0 to 31.5 dB
at 0.9 GHz, has +40 dBm Output IP3, and +24.3 dBm
P1dB. The amplifier also has a very low 2.1 dB Noise
Figure (at maximum gain) allowing it to be an ideal DVGA
for both receiver and transmitter applications.
The
amplifier operates from a single +5V supply and is
available in a compact 28-pin 6x6 mm leadless SMT
package.
The TQM829007 is pin compatible with the TQM879006
(1.4-2.7GHz, 0.25W DVGA) and TQM879008 (1.5-2.7
GHz, 0.5W DVGA). This allows one to size the right type
of device for specific system level requirements as well as
making the DVGA family ideal for applications where a
common PCB layout is used for different frequency bands.
© 2012 TriQuint Semiconductor, Inc.
26
LE 1
General Description
Data Sheet: Rev F 04/27/12
27
0.6-1.0 GHz Frequency Range
31.5 dB Maximum Gain at 0.9 GHz
31.5 dB Gain Range in 0.5 dB Steps
+40 dBm Output IP3
+24.3 dBm Output P1dB
2.1 dB Noise Figure at Max. Gain State
Fully Internally Matched Module
Integrated Blocking Capacitors, Bias Inductors
3-wire SPI Control Programming
AMP2
•
•
•
•
•
•
•
•
•
Functional Block Diagram
28
Product Features
GND 9
•
•
•
•
Symbol
LE
DATA
CLK
NC
RFIN
VCC_AMP1
VCC_AMP2
RFOUT
VCC_SPI
GND
Ordering Information
Part No.
TQM829007
Description
0.6-1.0 GHz Digital Variable Gain Amp
Fully Assembled Evaluation Board
TQM829007-PCB
Includes USB control board (EVH)
Standard T/R size = 2500 pieces on a 13” reel.
- 1 of 12-
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TQM829007
0.6-1.0GHz ¼W Digital Variable Gain Amplifier
Specifications
Absolute Maximum Ratings
Parameter
Storage Temperature
RF Input Power, CW, 50Ω,T = 25ºC
Vcc (pins 8, 14, 28)
Digital Input Voltage
Recommended Operating Conditions
Rating
Parameter
-55 to 150 oC
+12 dBm
+5.5 V
Vcc+ 0.5V
Vcc (pins 8, 14, 28)
Case Temperature
Junction Temperature, TJ
Min
4.75
-40
Typ
5
Max Units
5.25
85
170
V
o
C
o
C
TJ specified for >106 hours MTTF
Operation of this device outside the parameter ranges given
above may cause permanent damage.
Electrical specifications are measured at specified test conditions.
Specifications are not guaranteed over all recommended operating
conditions.
Electrical Specifications
Test conditions unless otherwise noted: 25ºC, Vcc = +5V, Maximum Gain State.
Parameter
Operational Freq Range
Test Frequency
Gain
Gain Control Range
Accuracy Error
Control Interface
Input Return Loss
Output Return Loss
Output P1dB
Output IP3
Noise Figure
I/O Impedance
Supply Voltage
Supply Current
Thermal Resistance, θjc
Conditions
0.5 dB Step Size
All States, 3 wire SPI, 6 states
3-wire serial interface
Pout = +11 dBm/tone, ∆f = 1MHz Spacing
Module (junction to case)
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
- 2 of 12-
Min
600
Typ
Max
1000
900
28.5
31.7
31.5
±(0.5+5% of Attenuation setting) Max
6
16
22
+24.3
+36.5
+40
2.1
50
+5
130
174
215
36.7
Units
MHz
MHz
dB
dB
dB
Bit
dB
dB
dBm
dBm
dB
Ω
V
mA
o
C/W
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TQM829007
0.6-1.0GHz ¼W Digital Variable Gain Amplifier
J3-20
J3-19
Vcc_AMP
GND
J3-18
J3-17
J3-16
J3-14
J3-15
LE
J3-13
J3-11
J3-12
DATA
CLK
J3-10
J3-8
J3-9
J3-6
J3-7
J3-5
J3-4
J3-3
J3-2
GND
SPI_Vcc
J3-1
Application Circuit (TQM829007-PCB)
0Ω
7
C12
4.7uF
NC
GND
GND
SPI_Vcc
GND
GND
U1
6X6_ 28PIN
NC
GND
GND
GND
RF_OUT
RF_IN
GND
8
Vcc_AMP
2
RF
Input
6
SPI_CLK
GND
9
10
11
GND
C1
J1
22
12
GND
5
23
GND
GND
4
24
SPI_DATA
GND
3
25
GND
GND
2
26
SPI_LE
Vcc_AMP1
1
27
GND
28
0.1uF
GND
C8
13
14
21
20
19
18
17
16
C2
J2
15
0Ω
RF
Output
C13
FB1
FB2
0Ω
0Ω
4.7uF
Notes:
1. For PCB Board Layout, see page 9 for more information.
2. All Components are of 0603 size unless stated otherwise.
3. For SPI Timing Diagram, see page 6.
4. 0 Ω jumpers may be replaced with copper traces in the target application layout.
5. Different ground pins are used for SPI (digital) and analog supply voltages.
6. The primary RF microstrip characteristic line impedance is 50 Ω.
7. The single power supply is used to provide supply voltage to AMP1 and AMP2.
Bill of Material: TQM829007-PCB
Reference Desg.
Value
Description
C8
0.1 uF
C12, C13
4.7 uF
Cap, Chip, 0603, 6.3V, X5R, 20%
various
C1, C2, FB1, FB2
0Ω
Res, Chip, 0603, 1/16W, 5%
various
C4
Do Not Place
U1
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
Manufacturer
Part Number
0.6 – 1.0 GHz ¼ W DVGA
TriQuint
TQM829007
Cap, Chip, 0603, 16V, X7R, 10%
various
- 3 of 12-
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TQM829007
0.6-1.0GHz ¼W Digital Variable Gain Amplifier
Typical Performance, Maximum Gain State
Frequency
Gain
Input Return Loss
Output Return Loss
Output P1dB
Output IP3 @ Pout = 11 dBm/tone, ∆f = 1 MHz
Noise Figure
Supply Voltage
Supply Current
GHz
0.6
dB
dB
dB
dBm
dBm
dB
V
mA
30.5
10
8
+24.6
+40
2.2
0.7
0.8
31
10.5
10
+24.5
+39.5
2.2
0.9
31.5
12
14
+24.3
+39.3
2.0
+5
174
31.7
16
22
+24.3
+39.5
2.1
1.0
31.6
20
18
+24.4
+38.7
2.1
Note:
1. The evaluation board can be used with TriQuint’s USB interface board. Refer to TriQuint’s website for more information.
Typical Performance Plots
35
Gain vs. Freq over Attenuation States
34
Temp. = 25oC
30
32
25
20
15
10
5
0dB
0.5dB
1dB
2dB
4dB
8dB
16dB
31.5dB
30
Gain (dB)
Gain (dB)
Gain vs. Freq over Temperature
Maximum Gain State
+85°C
+25°C
−40°C
28
26
0
24
-5
0.6
0.7
0.9
0.8
1.0
1.1
0.6
0.7
0.8
Frequency (GHz)
S11 vs. Freq over Attenuation States
0
0dB
0.5dB
1dB
2dB
4dB
8dB
16dB
31.5dB
1.1
Maximum Gain State
+85°C
+25°C
−40°C
-5
-10
S11 (dB)
S11 (dB)
1.0
S11 vs. Freq over Temperature
0
Temp. = 25oC
-5
0.9
Frequency (GHz)
-15
-20
-10
-15
-20
-25
-25
0.6
0.7
0.8
0.9
1.0
1.1
Frequency (GHz)
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
0.6
0.7
0.8
0.9
1.0
1.1
Frequency (GHz)
- 4 of 12-
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0.6-1.0GHz ¼W Digital Variable Gain Amplifier
S22 vs. Freq over Attenuation States
0
Temp. =
0dB
0.5dB
1dB
2dB
4dB
8dB
16dB
31.5dB
Maximum Gain State
+85°C
+25°C
−40°C
-5
-10
S22 (dB)
S22 (dB)
-5
S22 vs. Freq over Temperature
0
25oC
-15
-20
-10
-15
-20
-25
-25
0.7
0.6
0.8
0.9
1.0
1.1
0.6
0.7
0.8
Frequency (GHz)
OIP3 vs. Frequency
50
OIP3 (dBm)
OIP3 (dBm)
1.1
40
1 MHz Tone Spacing
Pout/Tone = 11dBm
Frequency : 900 MHz
45
35
40
35
+85°C
+25°C
−40°C
30
30
25
0.6
0.7
0.8
0.9
1.0
0
4
Frequency (GHz)
Maximum Gain State
4.0
+85°C
+25°C
−40°C
26
8
12
16
Attenuation State (dB)
P1dB vs. Frequency
27
Noise Figure vs. Frequency
Maximum Gain State
+85°C
+25°C
−40°C
3.0
25
NF (dB)
P1dB (dBm)
1.0
OIP3 vs. Attenuation State
50
1 MHz Tone Spacing
Pout/Tone = 11dBm
Maximum Gain State
+85°C
+25°C
−40°C
45
0.9
Frequency (GHz)
24
2.0
1.0
23
22
0.0
0.6
0.7
0.8
0.9
1.0
Frequency (GHz)
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
0.6
0.7
0.8
0.9
1.0
Frequency (GHz)
- 5 of 12-
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0.6-1.0GHz ¼W Digital Variable Gain Amplifier
Serial Control Interface
SERIN (MSB in First 6-Bit Word) Control Logic Truth Table
MSB
D5
1
1
1
1
1
1
0
0
6-Bit Control Word to DSA
D4
1
1
1
1
1
0
1
0
D3
1
1
1
1
0
1
1
0
D2
1
1
1
0
1
1
1
0
D1
1
1
0
1
1
1
1
0
LSB
D0
1
0
1
1
1
1
1
0
Attenuation
State
Reference : IL
0.5 dB
1 dB
2 dB
4 dB
8 dB
16 dB
31.5 dB
Any combination of the possible 64 states will provide an attenuation of approximately
the sum of bits selected
Serial Control Interface Timing Diagram
CLK is disabled when LE is high
D5-D0
MSB-LSB
D5-D0
MSB-LSB
LE
tPLO
CLK
SERIN
tSDSUP
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
tLESUP
tSDHLD
- 6 of 12-
tLEPW
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TQM829007
0.6-1.0GHz ¼W Digital Variable Gain Amplifier
Serial Control Timing Characteristics
Test conditions: 25ºC
Parameter
Clock Frequency
LE Setup Time, tLESUP
LE Pulse Width, tLEPW
SERIN set-up time, tSDSUP
SERIN hold-time, tSDHLD
LE Pulse Spacing tLE
Propagation Delay tPLO
Condition
50% Duty Cycle
after last CLK rising edge
before CLK rising edge
after CLK rising edge
LE to LE pulse spacing
LE to Parallel output valid
Min
10
30
10
10
630
Max
10
Units
30
MHz
ns
ns
ns
ns
ns
ns
Max
Units
Serial Control DC Logic Characteristics
Test conditions: 25ºC
Parameter
Input Low Voltage, VIL
Input High Voltage, VIH
Input Current, IIH / IIL
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
Condition
On SERIN, LE and CLK
- 7 of 12-
Min
0
2.4
-10
0.8
Vcc
+10
V
V
µA
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TQM829007
0.6-1.0GHz ¼W Digital Variable Gain Amplifier
Detailed Device Description
The TQM829007 is a 50 Ω internally matched digital variable gain amplifier (DVGA) featuring high linearity over the entire
gain control range. The amplifier module features the integration of a low noise amplifier gain block, a digital-step attenuator,
along with a high linearity ¼W amplifier as shown in the functional diagram below. The module is unconditionally stable.
Internal blocking capacitors and bias structures keep external parts count to a minimum. The DVGA has an operational
frequency range from 0.6 – 1.0 GHz.
For any further technical questions, please email to [email protected].
Functional Schematic Diagram
DC Block
DC Block
DSA
AMP1
Pin 6
DC Block
Pin 8
M
SPI
DC Bias
Pin 1
LE
DC Block
AMP2
M
Pin 16
DC Bias
Pin 2
Pin 3
DATA
CLK
Pin 14
Where M = Matching Network.
Chain Analysis Table
The chain analysis of DVGA module is shown below in the table. This table provides the typical performance of individual
stages in the module as well as overall module performance.
Function
Gain (dB)
NF (dB)
OIP3 (dBm)
P1dB (dBm)
Icc (mA)
Individual Stage Performance
AMP1
DSA
14.5
2.0
40.6
21.4
85
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
-1.2
1.2
56
28.8
2.0
- 8 of 12-
AMP2
18.4
2.1
39.5
24.3
87
Overall
Performance
31.7
2.1
39.5
24.3
174
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TQM829007
0.6-1.0GHz ¼W Digital Variable Gain Amplifier
Detailed Device Description
AMP1
AMP1 is a wide band low noise amplifier gain block in DVGA module. The amplifier provides 14.5 dB gain, 2.0 dB noise
figure, +40.6 dBm OIP3 at 0.9 GHz while only drawing 85 mA current. External DC blocks and biasing is not required.
AMP1 is DC blocked internally and is connected internally to two bypass capacitors (100 pF, 0.1 uF) followed by 68 nH
inductor inside the module as shown in the figure below.
Pin 8
0.1 uF
100 pF
AMP1
68 nH
To DSA
(internal)
Pin 6
DC Block
DC Block
DSA (Digital Step Attenuator)
DVGA has a serial digital step attenuator that is controlled with 6-bit serial periphery interface (SPITM) and has 0.5 dB step
size with 31.5 dB attenuation range. This 50-ohm RF DSA maintains high attenuation accuracy over frequency and
temperature. “000000” represents maximum attenuation state. External bypass capacitors are needed to compensate the
inductance effect associated with long transmission lines on the evaluation board.
AMP2
AMP2 is high linearity ¼-W amplifier in DVGA module. The amplifier provides 18.4 dB gain, +24.3 dBm P1dB, +39.5 dBm
OIP3 at 0.9 GHz while only drawing 87 mA current. The amplifier is tuned over 0.6 – 1.0 GHz bandwidth using internal
matching components. AMP2 is DC blocked internally and is connected internally to two bypass capacitors (100 pF, 0.1 uF)
followed by a 47 nH inductor inside the module as shown in the figure below. External DC blocks and biasing is not required.
Pin 14
0.1 uF
100 pF
AMP2
From DSA
(internal)
47 nH
M
M
DC Block
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
Pin 16
DC Block
- 9 of 12-
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0.6-1.0GHz ¼W Digital Variable Gain Amplifier
Pin Configuration and Description
Pin
Symbol
Description
1
LE
2
DATA
3
4, 22
6
CLK
N/C
RFIN
8
VCC_AMP1
14
VCC_AMP2
16
RFOUT
Serial Latch Enable Input. When LE is high, latch is clear and content of SPI control the attenuator.
When LE is low, data in SPI is latched.
Serial data input. The data and clock pins allow the data to be entered serially into SPI and is
independent of Latch state.
Serial clock input.
No connect or open. This pin is not connected in this module
Input, matched to 50 ohms. Internally DC blocked.
Supply Voltage to AMP1. This pin is connected internally to 2 bypass capacitors (100 pF, 0.1 uF)
followed by a 68 nH inductor inside the module.
Supply Voltage to AMP2. This pin is connected internally to 2 bypass capacitors (100 pF, 0.1 uF)
followed by a 47 nH inductor inside the module.
Output matched to 50 ohms. Internally DC blocked.
28
All other Pins
VCC_SPI
GND
Supply voltage for SPI and DSA chip. This pin is connected to 0.1 uF bypass capacitor internally.
RF/DC Ground Connection
Applications Information
PC Board Layout
Top RF layer is .014” NELCO N4000-13 material, єr (typical) = 3.7,
4 total layers (0.062” thick) for mechanical rigidity. Metal layers are 1oz copper. Microstrip line details: width = .030”, spacing = .036”.
The pad pattern shown has been developed and tested for optimized
assembly at TriQuint Semiconductor. The PCB land pattern has been
developed to accommodate lead and package tolerances. Since surface
mount processes vary from supplier to supplier, careful process
development is recommended.
For further technical information, Refer to www.TriQuint.com
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
- 10 of 12-
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0.6-1.0GHz ¼W Digital Variable Gain Amplifier
Mechanical Information
Package Information and Dimensions
This package is RoHS-compliant. The package bottom
finish is electrolytic plated Au over Ni. It is compatible
with both lead-free
(maximum 260 °C reflow
temperature) and lead (maximum 245 °C reflow
temperature) soldering processes. Also recommend
adding active fluxes of 2% during solder reflow.
The component will be laser marked with
“TQM829007” product label with an alphanumeric lot
code on the top surface of the package.
PCB Mounting Pattern
Notes:
1.
2.
3.
4.
All dimensions are in millimeters. Angles are in degrees.
Use 1 oz. copper minimum for top and bottom layer metal.
Vias are required under the backside paddle of this device for proper RF/DC grounding and thermal dissipation. We recommend a
0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25mm (0.10”).
Ensure good package backside paddle solder attach for reliable operation and best electrical performance.
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
- 11 of 12-
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0.6-1.0GHz ¼W Digital Variable Gain Amplifier
Product Compliance Information
ESD Information
Solderability
Compatible with both lead-free (maximum 260 °C
reflow temperature) and tin/lead (maximum 245 °C
reflow temperature) soldering processes.
ESD Rating:
Value:
Test:
Standard:
Class 1C
Passes ≥ 1000 V to < 2000 V
Human Body Model (HBM)
JEDEC Standard JESD22-A114
ESD Rating:
Value:
Test:
Standard:
Class IV
Passes ≥ 1000 V
Charged Device Model (CDM)
JEDEC Standard JESD22-C101
This part is compliant with EU 2002/95/EC RoHS
directive (Restrictions on the Use of Certain Hazardous
Substances in Electrical and Electronic Equipment).
This product also has the following attributes:
• Halogen Free (Chlorine, Bromine)
• Antimony Free
• TBBP-A (C15H12Br402) Free
• PFOS Free
• SVHC Free
MSL Rating
Level 3 at +260 °C convection reflow
The part is rated Moisture Sensitivity Level 3 at 260°C per JEDEC
standard IPC/JEDEC J-STD-020.
Contact Information
For the latest specifications, additional product information, worldwide sales and distribution locations, and information about
TriQuint:
Web: www.triquint.com
Email: [email protected]
Tel:
Fax:
+1.503.615.9000
+1.503.615.8902
For technical questions and application information:
Email: [email protected]
Important Notice
The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information contained
herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained herein. TriQuint
assumes no responsibility or liability whatsoever for the use of the information contained herein. The information contained
herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is entirely with
the user. All information contained herein is subject to change without notice. Customers should obtain and verify the latest
relevant information before placing orders for TriQuint products. The information contained herein or any use of such
information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property
rights, whether with regard to such information itself or anything described by such information.
TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining
applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death.
Data Sheet: Rev F 04/27/12
© 2012 TriQuint Semiconductor, Inc.
- 12 of 12-
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