SHENZHENFREESCALE AOL1432A

AOL1432A
N-Channel SDMOSTM POWER Transistor
General Description
TM
The AOL1432A is fabricated with SDMOS
trench technology that combines excellent RDS(ON) with low
gate charge. The result is outstanding efficiency with controlled switching behavior. This universal technology
is well suited for PWM, load switching and general purpose applications.
Features
VDS (V) = 25V
(V GS = 10V)
ID = 44A
RDS(ON) < 7.5mΩ (VGS = 10V)
RDS(ON) <14mΩ (VGS = 4.5V)
UltraSO-8TM Top View
D
D
Bottom tab
connected to
drain
S
G
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
Continuous Drain
Current G
Pulsed Drain Current
Continuous Drain
A
Current
TC=25°C
ID
IDM
C
IDSM
IAR
Repetitive avalanche energy L=50μH C
EAR
TA=70°C
TC=25°C
TA=70°C
35
A
W
15
2.1
W
1.3
TJ, TSTG
t ≤ 10s
Steady-State
Steady-State
mJ
31
30
-55 to 175
Symbol
A
A
10
PDSM
Junction and Storage Temperature Range
1/7
31
PD
TA=25°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
Maximum Junction-to-Case B
V
12
Avalanche Current C
Power Dissipation A
±20
120
TA=25°C
TC=100°C
Units
V
44
TC=100°C
Power Dissipation B
Maximum
25
RθJA
RθJC
Typ
14.2
48
3.5
°C
Max
20
60
5
Units
°C/W
°C/W
°C/W
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AOL1432A
N-Channel SDMOSTM POWER Transistor
Electrical Characteristics (TJ=25°C unless otherwise noted)
Parameter
Symbol
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250uA, VGS=0V
50
Gate-Body leakage current
VDS=0V, VGS=±20V
VGS(th)
Gate Threshold Voltage
VDS=VGS, ID=250μA
1.2
ID(ON)
On state drain current
VGS=10V, VDS=5V
120
VGS=10V, ID=30A
TJ=125°C
VGS=4.5V, ID=20A
gFS
Forward Transconductance
VSD
IS=1A, VGS=0V
Diode Forward Voltage
Maximum Body-Diode Continuous Current
IS
VDS=5V, ID=30A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qg(4.5V) Total Gate Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Qrr
VGS=0V, VDS=12.5V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=12.5V, ID=30A
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge IF=30A, dI/dt=500A/μs
μA
100
nA
2
3
V
6
7.5
8.6
12
11.5
14
mΩ
1
V
44
A
A
50
mΩ
S
0.7
990
1180
1450
pF
210
275
350
pF
125
175
245
pF
1.1
1.7
2.5
Ω
18
21.7
26
nC
9
11
13
nC
3
4
5
nC
4.5
6.4
9
nC
VGS=10V, VDS=12.5V,
RL=0.42Ω, RGEN=3Ω
IF=30A, dI/dt=500A/μs
Units
V
10
TJ=55°C
Static Drain-Source On-Resistance
Max
25
VDS=25V, VGS=0V
IGSS
RDS(ON)
Typ
6.8
ns
13.8
ns
21.5
ns
8.7
ns
8.4
10.6
13
16
13
20
ns
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation P DSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation P D is based on T J(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature T J(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 μs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of T J(MAX)=175°C.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA
curve provides a single pulse rating.
Rev0 : July 2008
2/7
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AOL1432A
N-Channel SDMOSTM POWER Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
100
10V
5V
6V
80
VDS=5V
80
4.5V
7V
60
ID(A)
ID (A)
60
4V
40
40
VGS=3.5V
20
125°C
20
25°C
0
0
0
1
2
3
4
0
5
1
2
3
4
5
6
VGS(Volts)
Figure 2: Transfer Characteristics
VDS (Volts)
Fig 1: On-Region Characteristics
18
2
Normalized On-Resistance
16
RDS(ON) (mΩ)
14
VGS=4.5V
12
10
8
VGS=10V
6
4
2
1.8
VGS=10V, 30A
1.6
1.4
1.2
VGS=4.5V, 20A
17
5
2
10
1
0
0
5
0.8
10
15
20
25
30
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
0
25
50
75
100
125
150
175
0
200
Temperature (°C)
18
Figure 4: On-Resistance vs. Junction Temperature
30
1.0E+02
ID=30A
1.0E+01
25
40
1.0E+00
IS (A)
RDS(ON) (mΩ)
20
125°C
15
125°C
1.0E-01
1.0E-02
25°C
1.0E-03
10
25°C
1.0E-04
5
1.0E-05
0
0.0
2
4
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
3/7
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics
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AOL1432A
N-Channel SDMOSTM POWER Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
1800
1400
Capacitance (pF)
VGS (Volts)
1600
VDS=12.5V
ID=30A
8
6
4
Ciss
1200
1000
800
600
Coss
400
2
200
0
0
5
10
15
20
Qg (nC)
Figure 7: Gate-Charge Characteristics
25
0
RDS(ON)
limited
10
15
20
VDS (Volts)
Figure 8: Capacitance Characteristics
10.0
100μs
1ms
10ms
DC
1.0
TJ(Max)=175°C
TC=25°C
0.1
0.0
0.01
0.1
25
TJ(Max)=175°C
TA=25°C
17
5
2
10
120
80
40
1
VDS (Volts)
10
100
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=5°C/W
0
0.0001
0.001
0.01
0.1
1
0
10
Pulse Width (s)
18
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
160
10μs
Power (W)
10μs
100.0
ID (Amps)
5
200
1000.0
ZθJC Normalized Transient
Thermal Resistance
Crss
0
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
1
PD
0.1
Ton
0.01
0.00001
Single Pulse
0.0001
0.001
0.01
0.1
T
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
4/7
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AOL1432A
N-Channel SDMOSTM POWER Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
40
60
Power Dissipation (W)
ID(A), Peak Avalanche Current
70
50
TA=25°C
40
TA=100°C
30
20
TA=125°C
TA=150°C
10
30
20
10
0
0
0.000001
0.00001
0.0001
0
0.001
25
100
125
150
175
TA=25°C
40
1000
Power (W)
Current rating ID(A)
75
10000
50
30
20
17
5
2
10
100
10
10
0
1
0
25
50
75
100
125
150
175
0
10
1
0
0
0.01
0.1
1
10
0100
1000
Pulse Width (s)
18
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H)
TCASE (°C)
Figure 14: Current De-rating (Note B)
ZθJA Normalized Transient
Thermal Resistance
50
TCASE (°C)
Figure 13: Power De-rating (Note B)
Time in avalanche, tA (s)
Figure 12: Single Pulse Avalanche capability
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=60°C/W
40
0.1
PD
0.01
Single Pulse
Ton
0.001
0.00001
0.0001
0.001
0.01
0.1
1
T
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
5/7
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AOL1432A
N-Channel SDMOSTM POWER Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
30
di/dt=800A/us
25
125ºC
3
16
12
di/dt=800A/us
14
10
2.5
125ºC
12
6
Qrr
10
125ºC
trr (ns)
15
25ºC
2
0
15
20
25
1
S
25ºC
0.5
0
30
0
0
IB (A)
Figure 17: Diode Reverse Recovery Charge and
Peak Current vs. Conduction Current
25
1.5
125ºC
2
0
10
25ºC
8
4
5
5
trr
6
4
Irm
0
2
10
S
8
25ºC
Irm (A)
Qrr (nC)
20
5
10
15
20
25
30
IB (A)
Figure 18: Diode Reverse Recovery Time and Soft
Coefficient vs. Conduction Current
15
10
2.5
Is=20A
125ºC
Qrr
5
0
200
400
600
4
25ºC
2
800
0
1000
di/dt (A/μs)
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
6/7
9
125ºC
Irm
0
6
trr (ns)
10
12
Irm (A)
Qrr (nC)
25ºC
15
8
125ºC
2
1.5
25ºC
trr
125º
6
3
1
0.5
25ºC
S
0
0
200
S
Is=20A
20
400
600
800
0
1000
di/dt (A/μs)
Figure 20: Diode Reverse Recovery Time and Soft
Coefficient vs. di/dt
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AOL1432A
N-Channel SDMOSTM POWER Transistor
Gate Charge Test Circuit & W aveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
Vgs
90%
+ Vdd
DUT
VDC
-
Rg
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
t off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
E AR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
7/7
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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