SHENZHENFREESCALE AON6450

AON6450
100V N-Channel MOSFET
General Description
The AON6450 is fabricated with SDMOS TM trench technology that combines excellent RDS(ON) with low gate
charge.The result is outstanding efficiency with controlled switching behavior. This universal technology is well
suited for PWM, load switching and general purpose applications.
Features
VDS
100V
ID (at VGS=10V)
52A
RDS(ON) (at VGS=10V)
< 14.5mΩ
RDS(ON) (at VGS = 7V)
< 17.5mΩ
Top View
D
1
8
2
7
3
6
4
5
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain
Current
VGS
TC=25°C
Pulsed Drain Current C
Continuous Drain
Current
TA=25°C
V
A
110
9
IDSM
A
7
Avalanche Current C
IAR
41
A
Repetitive avalanche energy L=0.1mH C
TC=25°C
EAR
84
mJ
Power Dissipation B
TC=100°C
TA=25°C
Power Dissipation A
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
83
PD
2.3
Steady-State
Steady-State
RθJA
RθJC
W
1.4
TJ, TSTG
Symbol
t ≤ 10s
W
33
PDSM
TA=70°C
Junction and Storage Temperature Range
1/7
±25
33
IDM
TA=70°C
Units
V
52
ID
TC=100°C
Maximum
100
-55 to 150
Typ
14
40
1
°C
Max
17
55
1.5
Units
°C/W
°C/W
°C/W
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AON6450
100V N-Channel MOSFET
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=250µA, VGS=0V
100
Typ
10
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=250µA
2.8
ID(ON)
On state drain current
VGS=10V, VDS=5V
110
TJ=55°C
50
VDS=0V, VGS= ±25V
100
VGS=10V, ID=20A
3.3
22.8
27.5
VGS=7V, ID=20A
14
17.5
mΩ
VDS=5V, ID=20A
52
1
V
85
A
Forward Transconductance
VSD
Diode Forward Voltage
IS=1A,VGS=0V
0.7
IS
Maximum Body-Diode Continuous Current G
TJ=125°C
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Rg
Gate resistance
V
14.5
gFS
Output Capacitance
nA
12.1
Static Drain-Source On-Resistance
Reverse Transfer Capacitance
3.8
µA
A
RDS(ON)
Coss
Units
V
VDS=100V, VGS=0V
IDSS
Crss
Max
VGS=0V, VDS=50V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
VGS=10V, VDS=50V, ID=20A
mΩ
S
2000
2570
3100
pF
170
250
330
pF
50
80
120
pF
0.4
0.8
1.2
Ω
34
43
52
nC
11
14
17
nC
8
13.5
19
nC
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
IF=20A, dI/dt=500A/µs
17
24
31
Qrr
Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs
75
108
140
VGS=10V, VDS=50V, RL=2.5Ω,
RGEN=3Ω
15
ns
5
ns
28.5
ns
5
ns
ns
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 150°C may be used if the PCB allow s it.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.
G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
2/7
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AON6450
100V N-Channel MOSFET
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
110
110
10V
100
7V
90
7.5V
90
6.5V
80
70
70
60
60
ID(A)
ID (A)
80
50
6V
40
VDS=5V
100
50
40
30
30
20
10
10
0
0
0
1
2
3
125°C
20
VGS=5.5V
4
25°C
0
5
2
3
4
5
6
7
8
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
16
Normalized On-Resistance
2.2
15
VGS=7V
RDS(ON) (mΩ )
1
14
13
VGS=10V
12
2
VGS=10V
ID=20A
1.8
17
5
2
VGS=7V10
1.6
1.4
1.2
ID=20A
1
0.8
11
0
5
0
10
15
20
25
30
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
25
50
75
100
125
150
175
0
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
18
(Note E)
30
1.0E+02
ID=20A
1.0E+01
25
40
125°C
20
IS (A)
RDS(ON) (mΩ )
1.0E+00
125°C
1.0E-01
1.0E-02
15
1.0E-03
10
25°C
1.0E-04
1.0E-05
5
5
6
7
8
9
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
3/7
25°C
0.0
0.2
0.4
0.6
0.8
VSD (Volts)
Figure 6: Body-Diode Characteristics
1.0
(Note E)
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AON6450
100V N-Channel MOSFET
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
3500
10
VDS=50V
ID=20A
3000
Ciss
Capacitance (pF)
VGS (Volts)
8
6
4
2500
2000
1500
Coss
1000
2
Crss
500
0
0
0
10
20
30
40
0
50
Qg (nC)
Figure 7: Gate-Charge Characteristics
20
40
60
80
VDS (Volts)
Figure 8: Capacitance Characteristics
400
1000.0
TJ(Max)=150°C
TC=25°C
350
10µs
100.0
RDS(ON)
limited
10.0
300
10µs
Power (W)
ID (Amps)
100
100µs
DC
1ms
1.0
TJ(Max)=150°C
TC=25°C
0.1
250
17
5
2
10
200
150
100
50
0.0
0
0.01
0.1
1
10
VDS (Volts)
100
1000
0.0001
0.001
0.01
0.1
1
0
10
Pulse Width (s)
18
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
RθJC=1.5°C/W
1
0.1
PD
Single Pulse
Ton
T
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
4/7
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AON6450
100V N-Channel MOSFET
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
90
TA=25°C
80
50
Power Dissipation (W)
IAR (A) Peak Avalanche Current
60
TA=100°C
40
TA=150°C
30
20
10
TA=125°C
70
60
50
40
30
20
10
0
0
0
0.000001
0.00001
0.0001
Time in avalanche, tA (s)
Figure 12: Single Pulse Avalanche capability (Note
C)
25
50
75
100
150
10000
60
TA=25°C
50
1000
40
Power (W)
Current rating ID(A)
125
TCASE (°C)
Figure 13: Power De-rating (Note F)
30
20
17
5
2
10
100
10
10
1
0.0001
0
0
25
50
75
100
125
0.01
1
100
TCASE (°C)
Figure 14: Current De-rating (Note F)
10000
0
18
150
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note G)
Zθ JA Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
RθJA=55°C/W
0.1
PD
0.01
Ton
Single Pulse
T
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note G)
5/7
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AON6450
100V N-Channel MOSFET
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
26
20
18
25ºC
16
Qrr
90
125ºC
0.8
10
12
30
25ºC
Irm
5
10
15
20
25
0
30
0
0
IS (A)
Figure 17: Diode Reverse Recovery Charge and Peak
Current vs. Conduction Current
Is=20A
180
125ºC
22
25ºC
18
15
90
14
125ºC
Qrr
10
60
25ºC
30
Irm
0
2
0
200
400
600
800
1000
di/dt (A/µ
µs)
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
30
2
35
125ºC
1.5
25
trr
20
1
25ºC
15
25ºC
10
6
25
Is=20A
trr (ns)
120
20
40
Irm (A)
Qrr (nC)
10
30
150
6/7
5
IS (A)
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
26
210
0.4
125ºC
8
0
25ºC
S
5
10
0
1.2
25ºC
15
14
60
1.6
trr
trr (ns)
120
20
Irm (A)
Qrr (nC)
150
125ºC
di/dt=800A/µs
25
22
S
180
2
30
24
125ºC
di/dt=800A/µs
S
210
0.5
S
5
125ºC
0
0
0
200
400
600
800
1000
di/dt (A/µ
µs)
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
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AON6450
100V N-Channel MOSFET
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
Vgs
90%
+ Vdd
DUT
VDC
-
Rg
10%
Vgs
Vgs
td(on)
tr
td(off)
ton
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
EAR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
7/7
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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