NSC 54ABT245

54ABT245
Octal Bidirectional Transceiver with TRI-STATE ® Outputs
General Description
The ’ABT245 contains eight non-inverting bidirectional buffers with TRI-STATE outputs and is intended for bus-oriented
applications. Current sinking capability is 48 mA on both the
A and B ports. The Transmit/Receive (T/R) input determines
the direction of data flow through the bidirectional transceiver. Transmit (active HIGH) enables data from A ports to B
ports; Receive (active LOW) enables data from B ports to A
ports. The Output Enable input, when HIGH, disables both A
and B ports by placing them in a High Z condition.
Features
n Bidirectional non-inverting buffers
n A and B output sink capability of 48 mA, source
capability of 24 mA
n Guaranteed output skew
n Guaranteed multiple output switching specifications
n Output switching specified for both 50 pF and 250 pF
loads
n Guaranteed simultaneous switching, noise level and
dynamic threshold performance
n Guaranteed latchup protection
n High impedance glitch-free bus loading during entire
power up and power down cycle
n Non-destructive hot insertion capability
n Disable time is less than enable time to avoid bus
contention
n Standard Microcircuit Drawing (SMD) 5962-9214801
Ordering Code:
Military
Package
Package Description
Number
54ABT245J-QML
J20A
20-Lead Ceramic Dual-In-Line
54ABT245W-QML
W20A
20-Lead Cerpak
54ABT245E-QML
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
Logic Symbol
DS100204-1
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100204
www.national.com
54ABT245 Octal Bidirectional Transceiver with TRI-STATE Outputs
July 1998
Connection Diagrams
Pin Assignment for DIP
and Flatpak.
Pin Assignment for LCC
DS100204-3
Pin Descriptions
DS100204-5
Pin Names
Description
OE
Output Enable Input (Active LOW)
T/R
Transmit/Receive Input
A0–A7
Side A Inputs or TRI-STATE Outputs
B0–B7
Side B Inputs or TRI-STATE Outputs
Truth Table
Inputs
OE
Output
T/R
L
L
Bus B Data to Bus A
L
H
Bus A Data to Bus B
H
X
High Z State
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Logic Diagram
DS100204-4
www.national.com
2
Absolute Maximum Ratings (Note 1)
in LOW State (Max)
DC Latchup Source Current
Over Voltage Latchup (I/O)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
Ceramic
VCC Pin Potential to
Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Any Output
in the Disabled or
Power-off State
in the HIGH State
Current Applied to Output
twice the rated IOL (mA)
−500 mA
10V
Recommended Operating
Conditions
−65˚C to +150˚C
−55˚C to +125˚C
Free Air Ambient Temperature
Military
Supply Voltage
Military
Minimum Input Edge Rate
Data Input
Enable Input
−55˚C to +175˚C
−0.5V to +7.0V
−0.5V to +7.0V
−30 mA to +5.0 mA
−55˚C to +125˚C
+4.5V to +5.5V
(∆V/∆t)
50 mV/ns
20 mV/ns
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under these
conditions is not implied.
−0.5V to 5.5V
−0.5V to VCC
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
Parameter
ABT245
Min Typ
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VCD
Input Clamp Diode Voltage
VOH
Output HIGH
Voltage
Max
2.0
V
Recognized HIGH Signal
V
−1.2
V
Recognized LOW Signal
IIN = −18 mA (OE, T/R)
Min
V
Min
54ABT
2.0
V
Min
V
Min
µA
Max
µA
Max
µA
Max
µA
Max
V
0.0
IIH
Input HIGH Current
54ABT
0.55
5
5
IBVI
Input HIGH Current Breakdown Test
7
IBVIT
Input HIGH Current Breakdown Test
(I/O)
100
IIL
Input LOW Current
−5
−5
Input Leakage Test
Conditions
0.8
2.5
Output LOW
Voltage
IIH + I
VCC
54ABT
VOL
VID
Units
4.75
IOH = −3 mA (An, Bn)
IOH = −24 mA (An, Bn)
IOL = 48 mA (An, Bn)
VIN = 2.7V (OE, T/R) (Note 3)
VIN = VCC (OE, T/R)
VIN = 7.0V (OE, T/R)
VIN = 5.5V (An, Bn)
VIN = 0.5V (OE, T/R) (Note 3)
VIN = 0.0V (OE, T/R)
IID = 1.9 µA (OE, T/R)
All Other Pins Grounded
VOUT = 2.7V (An, Bn); OE = 2.0V
VOUT = 0.5V (An, Bn); OE = 2.0V
Output Leakage Current
50
µA
0 − 5.5V
IIL + IOZL
Output Leakage Current
−50
µA
0 − 5.5V
IOS
Output Short-Circuit Current
−275
mA
Max
ICEX
Output High Leakage Current
50
µA
Max
IZZ
Bus Drainage Test
100
µA
0.0
ICCH
Power Supply Current
50
µA
Max
All Outputs HIGH
ICCL
Power Supply Current
30
mA
Max
ICCZ
Power Supply Current
50
µA
Max
Additional
Outputs Enabled
2.5
mA
All Outputs LOW
OE = VCC, T/R = GND or VCC;
All Other GND or VCC
VI = VCC − 2.1V
ICC/Input
Outputs TRI-STATE
2.5
mA
Outputs TRI-STATE
50
µA
ICCT
OZH
−100
Max
VOUT = 0.0V (An, Bn)
VOUT = VCC (An, Bn)
VOUT = 5.5V (An, Bn);
All Others GND
OE, T/R VI = VCC − 2.1V
Data Input VI = VCC − 2.1V
All Others at VCCor GND.
3
www.national.com
DC Electrical Characteristics
Symbol
(Continued)
Parameter
ABT245
Min Typ
ICCD
Dynamic ICC
Max
No Load
0.1
Units
Conditions
VCC
mA/
MHz
Outputs Open
(Note 3)
OE = GND, T/R = GND or VCC
Max
One Bit Toggling, 50% Duty Cycle
(Note 4)
Note 3: Guaranteed but not tested.
Note 4: For 8 bits toggling, ICCD < 0.8 mA/MHz.
DC Electrical Characteristics
Symbol
Parameter
Min
Max
Units
VCC
VOLP
Quiet Output Maximum Dynamic VOL
1.1
V
5.0
VOLV
Quiet Output Minimum Dynamic VOL
-0.45
V
5.0
Conditions
CL = 50 pF,
RL = 500Ω
TA = 25˚C (Note 5)
TA = 25˚C(Note 5)
Note 5: Max number of outputs defined as (n). n − 1 data inputs are driven 0V to 3V. One output at LOW.
AC Electrical Characteristics
Symbol
Parameter
54ABT
TA = −55˚C to +125˚C
VCC = 4.5V–5.5V
Units
CL = 50 pF
Min
Max
tPLH
Propagation Delay
1.0
4.8
tPHL
Data to Outputs
1.0
4.8
tPZH
Output Enable
1.0
6.7
tPZL
Time
2.0
7.5
tPHZ
Output Disable
1.7
7.4
tPLZ
Time
1.7
6.5
ns
ns
ns
Capacitance
Symbol
Parameter
Typ
Units
CIN
Input Capacitance
5.0
pF
CI/O (Note 6)
I/O Capacitance
11.0
pF
Note 6: CI/O is measured at frequency f = 1 MHz, per MIL-STD-883B, Method 3012.
www.national.com
4
Conditions
TA = 25˚C
VCC = 0V (OE , T/R)
VCC = 5.0V (An, Bn)
Capacitance
(Continued)
tPLH vs Temperature (TA)
CL = 50 pF, 1 Output Switching
tPHL vs Temperature (TA)
CL = 50 pF, 1 Output Switching
DS100204-14
tPLH vs Load Capacitance
1 Output Switching, TA = 25˚C
DS100204-15
tPHL vs Load Capacitance
1 Output Switching, TA = 25˚C
DS100204-16
DS100204-17
Dashed lines represent design characteristics; for specified guarantees, refer to AC Characteristics Table.
tPLH vs Load Capacitance
8 Outputs Switching, TA = −40˚C to +85˚C
tPHL vs Load Capacitance
8 Outputs Switching, TA = 25˚C
DS100204-18
DS100204-19
5
www.national.com
Capacitance
(Continued)
tPZL vs Temperature (TA)
CL = 50 pF, 1 Output Switching
tPLZ vs Temperature (TA)
CL = 50 pF, 1 Output Switching
DS100204-20
tPZL vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
DS100204-21
tPLZ vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
DS100204-22
DS100204-23
Dashed lines represent design characteristics; for specified guarantees, refer to AC Characteristics Table.
tPZH vs Temperature (TA)
CL = 50 pF, 1 Output Switching
tPHZ vs Temperature (TA)
CL = 50 pF, 1 Output Switching
DS100204-24
www.national.com
DS100204-25
6
Capacitance
(Continued)
tPZH vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
tPHZ vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
DS100204-26
tPZH vs Load Capacitance
8 Outputs Switching, TA = 25˚C
DS100204-27
tPZL vs Load Capacitance
8 Outputs Switching, TA = 25˚C
DS100204-28
DS100204-29
Dashed lines represent design characteristics; for specified guarantees, refer to AC Characteristics Table.
tPLH and tPHL vs Number Outputs Switching
VCC = 5.0V, TA = 25˚C, CL = 50 pF
ICC vs Frequency, Average, TA = 25˚C,
All Outputs Unloaded/Unterminated
DS100204-30
DS100204-31
Dashed lines represent design characteristics; for specified guarantees, refer to AC Characteristics Table.
7
www.national.com
AC Loading
DS100204-6
DS100204-7
*Includes jig and probe capacitance
FIGURE 2. Test Input Signal Levels
FIGURE 1. Standard AC Test Load
Amplitude
Rep. Rate
tw
tr
tf
3.0V
1 MHz
500 ns
2.5 ns
2.5 ns
FIGURE 3. Test Input Signal Requirements
AC Waveforms
DS100204-8
DS100204-10
FIGURE 4. Propagation Delay Waveforms
for Inverting and Non-Inverting Functions
www.national.com
FIGURE 5. TRI-STATE Output HIGH
and LOW Enable and Disable Times
8
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Terminal Ceramic Chip Carrier (L)
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J20A
9
www.national.com
54ABT245 Octal Bidirectional Transceiver with TRI-STATE Outputs
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Ceramic Flatpak (F)
NS Package Number W20A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into
sonably expected to cause the failure of the life support
the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness.
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: [email protected]
www.national.com
National Semiconductor
Europe
Fax: +49 (0) 1 80-530 85 86
Email: [email protected]
Deutsch Tel: +49 (0) 1 80-530 85 85
English Tel: +49 (0) 1 80-532 78 32
Français Tel: +49 (0) 1 80-532 93 58
Italiano Tel: +49 (0) 1 80-534 16 80
National Semiconductor
Asia Pacific Customer
Response Group
Tel: 65-2544466
Fax: 65-2504466
Email: [email protected]
National Semiconductor
Japan Ltd.
Tel: 81-3-5620-6175
Fax: 81-3-5620-6179
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.