Revised August 1999 74FR245 Octal Bidirectional Transceiver with 3-STATE Outputs General Description Features The 74FR245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 64 mA on both the A and B Ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A Ports to B Ports; Receive (active-LOW) enables data from B Ports to A Ports. The Output Enable input, when HIGH, disables both A and B Ports by placing them in a High Z condition. ■ Non-inverting buffers ■ Bidirectional data path ■ A and B output sink capability of 64 mA, source capability of 15 mA ■ Guaranteed pin-to-pin skew Ordering Code: Order Number Package Number Package Description 74FR245SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74FR245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74FR245PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Truth Table Pin Names Inputs Description Output OE T/R OE Output Enable Input (Active-LOW) T/R Transmit/Receive Input L L A0–A7 Side A Inputs or 3-STATE Outputs L H Bus A Data to Bus B Side B Inputs or 3-STATE Outputs H X High Z State B0–B7 © 1999 Fairchild Semiconductor Corporation Bus B Data to Bus A H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial DS010887 www.fairchildsemi.com 74FR245 Octal Bidirectional Transceiver with 3-STATE Outputs August 1990 74FR245 Logic Diagram www.fairchildsemi.com 2 Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Current Applied to Output in LOW State (Max) Note 2: Either voltage limit or current limit is sufficient to protect inputs. twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V DC Electrical Characteristics Symbol Parameter Min Typ Max 2.0 Units VCC V Conditions VIH Input HIGH Voltage VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA VOH Output HIGH Voltage V Min IOH = −3 mA (An, Bn) V Min IOH = −15 mA (An, Bn) VOL Output LOW Voltage 0.55 V Min IOL = 64 mA (An, Bn) 5 µA Max VIN = 2.7V (OE, T/R) 7 µA Max VIN = 7.0V (OE, T/R) 100 µA Max VIN = 5.5V (An, B n) −250 µA Max VIN = 0.5V (OE, T/R) V 0.0 2.4 2.0 IIH Input HIGH Current IBVI Input HIGH Current IBVIT Input HIGH Current Breakdown Test Breakdown Test (I/O) IIL Input LOW Current VID Input Leakage Test 4.75 Recognized HIGH Signal Recognized LOW Signal IID = 1.9 µA All Other Pins Grounded IOD Output Circuit Leakage Current VIOD = 150 mV 3.75 µA 0.0 25 µA Max VOUT = 2.7V (An, Bn) −150 µA Max VOUT = 0.5V (An, Bn) −225 mA Max VOUT = 0.0V (An, Bn) 50 µA Max VOUT = VCC (An, Bn) All Other Pins Grounded IIH + IOZH Output Leakage Current IIL + IOZL Output Leakage Current IOS Output Short-Circuit Current ICEX Output HIGH Leakage Current IZZ Bus Drainage Test 100 µA 0.0 VOUT = 5.25V (An, Bn) ICCH Power Supply Current 55 75 mA Max All Outputs HIGH ICCL Power Supply Current 75 110 mA Max All Outputs LOW ICCZ Power Supply Current 55 75 mA Max Outputs 3-STATE CIN Input Capacitance −100 8.0 pF 5.0 OE, T/R 17.0 pF 5.0 An, Bn 3 www.fairchildsemi.com 74FR245 Absolute Maximum Ratings(Note 1) 74FR245 AC Electrical Characteristics Symbol Parameter TA = +25°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF Min Typ Max Min Max tPLH Propagation Delay 1.0 2.6 3.9 1.0 3.9 tPHL An to Bn or Bn to An 1.0 1.7 3.9 1.0 3.9 tPZH Output Enable Time tPZL tPHZ Output Disable Time tPLZ 2.5 5.0 7.0 2.5 7.0 2.5 4.3 7.0 2.5 7.0 1.7 3.7 6.5 1.7 6.5 1.7 3.6 6.5 1.7 6.5 Units ns ns ns Extended AC Characteristics Symbol Parameter TA = 0°C to +70°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 250 pF Eight Outputs Switching (Note 4) Units (Note 3) Min Max Min Max tPLH Propagation Delay 1.0 5.9 2.5 7.5 tPHL An to Bn or Bn to An 1.0 5.9 2.5 7.5 tPZH Output Enable Time 2.5 11.9 2.5 11.9 tPZL tPHZ Output Disable Time tPLZ tOSHL Pin to Pin Skew (Note 5) for HL Transitions tOSLH Pin to Pin Skew (Note 5) for LH Transitions tOST Pin to Pin Skew (Note 5) for HL/LH Transitions 1.3 6.5 1.3 6.5 ns ns ns 1.7 ns 1.0 ns 3.3 ns Note 3: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase, i.e., all LOW-toHIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc. Note 4: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load. This specification pertains to single output switching only. Note 5: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW (tOSHL), LOW-to-HIGH (tOSLH), or HIGH-to-LOW and/or LOW-to-HIGH (tOST). Specifications guaranteed with all outputs switching in phase. www.fairchildsemi.com 4 74FR245 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com 74FR245 Octal Bidirectional Transceiver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6